JP3456054B2 - High breakdown voltage lateral semiconductor element - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lateral high withstand voltage semiconductor element used for a power IC or the like.

[0002]

2. Description of the Related Art FIG. 7 is a cross-sectional view of a conventional lateral high breakdown voltage semiconductor element (diode). p ^- n is formed by epitaxial growth on the substrate 1 ^- area 2 is formed, further p ^- connection region 4 and p ⁺ region connecting the substrate 1 and the surface is formed, n ^- n in the surface layer of the region 2 ⁺ The cathode region 3 is formed. The connection region 4, the p ⁻ substrate 1, the n ⁻ region 2, and the n ⁺ cathode region 3 constitute a pn diode,
An anode electrode 5 is formed on the connection region 4, and a cathode electrode 6 is formed on the n ⁺ cathode region 3. Also p
^- substrate 1 and the n ^- first junction is a pn junction between the region 2 31
Is formed, and the connection region 4 and the n ⁻ region 2 form a second junction 32 which is a pn junction. Normally, the impurity concentration of the connection region 4 is set higher than that of the n ⁻ region 2, and the depletion layer extending from the second junction 32 during reverse bias is mainly n ^−.
It extends to the region 2 side.

FIG. 8 shows a cross-sectional view of the device of FIG. 7, a spread diagram of the depletion layer, and a field intensity distribution diagram. FIG. 8 (a) shows the case where the depletion layer does not reach the entire surface of the n ⁻ region 2. , (B) shows a case where the depletion layer reaches the entire surface of the n ⁻ region. In FIG. 3A, when the impurity concentration of the n ⁻ region 2 is set to be relatively low and the thickness is set to be large,
Depletion layer edge 20 extending from the junction 31 and the second junction 32
Is the voltage of the dielectric breakdown voltage E _MAX of the second junction 32,
^- not reach the entire surface area 2, n ⁺ cathode region 3 side n ^- region 2 of the surface is not depleted. Meanwhile, the same figure (b)
At n ⁻ region 2, the impurity concentration is set to be relatively high and the thickness is set to be relatively thin so that the depletion layer edge 20 extending from the first junction 31 and the second junction 32 into the n ⁻ region 2 is the second junction. The entire surface of the n ⁻ region 2 is reached at a voltage equal to or lower than the dielectric breakdown voltage of 32. Of course, the impurity concentration and thickness of the p ⁻ substrate 1 need to be optimized. That is, FIG.
In this state, since the entire surface of the n ⁻ region 2 on the n ⁺ cathode region 3 side is not depleted , the electric field intensity E on the surface of the n ⁻ region 2 has a peak at the second junction 32. On the other hand, in the same figure (b), the entire surface of the n ⁻ region 2 is depleted by the depletion layer extending from the first junction 31. Therefore, peaks of the electric field strength appear at two locations of the second junction 32 and the third junction 33 between the n ⁺ cathode region 3 and the n ⁻ region 2. The voltage applied to the element is represented by a value obtained by integrating the electric field strength E with the extension distance of the depletion layer, that is, an area (shown by a hatched portion). In addition, the breakdown voltage of the element is the breakdown electric field strength E
It is expressed by the voltage that reaches _MAX , so the larger this area, the higher the breakdown voltage. Comparing the figure (a) and the figure (b), this area is much larger in the figure (b).
You can have a breakdown voltage higher figure (b). An impurity concentration of regions 2, moreover n ^{- -} higher n is an element of the structure of FIG. (B) be relatively thin thickness of the region 2 can be obtained a high withstand voltage, in particular on-resistance of the device This resurf structure is very effective for MOSFETs and the like that depend on the impurity concentration of the n ⁻ region 2.

[0004]

However, this device has the following problems.
In order to obtain a high breakdown voltage, the first junction 31 and the second junction 32
So that the extension of the depletion layer edge 20 from the surface of the n ⁻ region 2 is made uniform at all points on the surface of the n ⁻ region 2, for example, the opposite n ⁺ cathode region 3 end and the connection region 4 end are concentric in a plane perpendicular to the paper surface. The effect can be improved by forming. However, in the case of a small-capacity element, the chip area is small and can be made into concentric circles, but in the case of a large-capacity element, in order to increase the area efficiency (ratio of the area of the active region to the chip area), In many cases, the end of the n ⁺ cathode region and the end of the connection region 3 are composed of a curved portion (element termination portion) and a straight portion (normal portion). Therefore, the extension of the depletion layer edge 20 cannot be made uniform at all points, and it becomes difficult to obtain a predetermined breakdown voltage.

FIG. 9 shows a plan view of a large capacity element. Here, as an example of increasing the capacity, a comb tooth-shaped plane pattern is shown. Region 2 is surrounded, n ^{- -} n in the connection region 4 region 2
The n ⁺ cathode region 3 is surrounded by. An anode electrode (not shown) is formed on the connection region 4, an anode pad 25 shown by a dotted line is formed on a part thereof, and an external lead wire is bonded to this part. Further, a cathode electrode (not shown) is formed on the n ⁺ cathode region 3, a cathode pad 26 shown by a dotted line is formed in a part thereof, and an external lead wire is bonded to this part. In this comb tooth-shaped plane pattern, in order to reduce the ON voltage of the element while obtaining a predetermined breakdown voltage, the facing length of the connection region 4 end and the n ⁺ cathode region 3 end (perpendicular to the plane of FIG. 4). The width W of the surface of the n ⁻ region 2 sandwiched between them (opposing width between the end of the connection region 4 and the end of the n ⁺ cathode region 3) is a predetermined withstand voltage. It is necessary to make the length as narrow as possible under the condition that can secure. In such a plane pattern, a of the curved portion (element end portion)
Part and b part and c part of the straight line part (normal part) exist,
The extension of the depletion layer when a voltage is applied is different, and the electric field strength distribution is also different.

FIG. 10 shows a cross-sectional view of the device, a depletion layer spread diagram and an electric field intensity distribution diagram. FIG. 10A is a sectional view taken along the line A--A of FIG. 9, and FIG. 6B is a view showing the BB cutting part of the b part, and FIG. 6C is a view showing the CC cutting part of the c part of FIG. It is to be noted that FIGS. 11A and 11B show an element termination portion, and FIG. 11C shows a normal portion. In FIG.
^- around the region 2 is surrounded by connected areas 4, n ^- because the ratio of the volume of the connection region 4 with respect to the volume of the region 2 is increased, between the connecting region 4 and the n ⁺ cathode region 3 of n ^-
The region 2 is depleted at a low voltage, the maximum electric field strength appears at the third junction 33 between the n ⁺ cathode region 3 and the n ⁻ region 2, and dielectric breakdown occurs at this portion. On the contrary, in FIG.
^- it has reduced the ratio of the volume of the connecting region 4 to the volume of the region 2, n between the connecting region 4 and the n ⁺ cathode region 3
^- region 2 totally depleted Sarezu even at a high voltage, the depletion layer end 20 the n ^- before reaching the entire surface of the region 2, the maximum electric field strength connection region 4 and the n ^- second junction 32 between the region 2 Appears and dielectric breakdown occurs at this part. On the other hand, in FIG.
^- area 2 and the connecting region 4 is linearly opposed and n ^- region 2 and the n ⁺ cathode region 3 also in order to linearly opposed, the maximum electric field strength appear equal to the cathode side and the anode side, dielectric breakdown Occur. Therefore, the electric field strength E increases due to the extension of the depletion layer immediately before the electric field strength E reaches the breakdown electric field strength E _MAX.
The integrated value (area shown by hatching in the electric field intensity distribution diagram) is the same in FIG. 6A and FIG.
It is smaller and therefore has a lower breakdown voltage. The example shown here is a case where the impurity concentration and the thickness of the n ⁻ region 2 of the straight line portion are optimized, but when the curved line portion is optimized, this time the other curve portions and the straight line portion have dielectric breakdown at a low voltage. Cause In any case, it is difficult to optimize the entire area of an element having a plane pattern in which a curved portion (element end portion) and a straight portion (normal portion) are mixed as compared with an element which is not mixed. Yes, the breakdown voltage decreases.

In order to avoid this problem, if the radius of curvature of these element end portions is increased, the area efficiency is reduced, the chip area for obtaining the same element capacitance is increased, and the cost is increased. Further, in FIG. 9, it is possible to make the width W of the n ⁻ region 2 of the element termination portion larger than that in the normal portion, but this effect is small in the portion b because the depletion layer extends less than the normal portion. Further, in FIG. 10 (a) (portion a in FIG. 9),
By adding an n region (n buffer) having a concentration lower than that of the n ⁺ cathode region 3, the depletion layer end 20 is extended more toward the cathode side of the element termination portion than the cathode side of the normal portion, and the cathode side of the element termination portion is expanded. Although it is possible to slightly reduce the electric field strength of, the effect is not sufficient. In addition, FIG.
(B) (part b in FIG. 9), by adding a p region (p buffer) having a concentration lower than that of the connection region 4 (anode region), the depletion layer end 20 is moved from the anode side of the normal part to the element termination part. It is possible to extend a large amount to the anode side to slightly relax the electric field strength, but this is also not sufficiently effective.

The present invention, in order to solve the above problems,
In the n ⁻ region 2, the a part at the end of the device is c
The impurity concentration is increased so as to be an n region having a higher concentration than that of the part, and conversely, the conductivity type of the opposite conductivity type is formed so that an n region having a lower concentration than the c part of the normal part is formed in the b part of the element termination part. It is an object of the present invention to provide a high breakdown voltage lateral semiconductor device in which the electric field strength is relaxed by introducing the p-type impurity and the high breakdown voltage can be secured.

[0009]

In order to achieve the above object, a second region of a second conductivity type selectively formed in a surface layer of a first region of the first conductivity type and a surface of the second region. A high-concentration third region of the first conductivity type or a second conductivity type selectively formed in the layer, the high-concentration connection of the first conductivity type connecting the surface of the second region and the first region Forming a fourth region, which is a region, and connecting the fourth region and the second region to the second junction and the first region
When a voltage for reverse biasing the first junction in which the region and the second region are in contact is applied, before the electric field strength near the first junction and the second junction reaches the breakdown electric field strength, by depletion layer extending to the second region reaches the entire front surface of the second region, lateral semiconductor having also a relatively high concentration of impurity concentration in the second region a high breakdown voltage is obtained structure (so-called RESURF structure) In the element, the surface area of the second area is a curved area
In it the element terminating portion of the second region impurity concentration and a second region of the
This is to set the impurity concentration of the second region of the normal portion whose surface portion is a linear region to different values.

Further , the radius of curvature of the surface portion of the fourth region is larger than that of the surface portion of the third region, and the impurity concentration of the second region of the element termination portion is set to the second region of the normal portion.
It is effective to set the density to be higher than the area.

The radius of curvature of the surface of the fourth region is the third
Has a radius of curvature smaller than the radius of curvature of the surface of the region,
It is effective to set the impurity concentration of the second region of the element termination portion to be lower than that of the second region of the normal portion. Further, by forming the fifth region of the second conductivity type having a higher concentration than the impurity concentration of the normal portion on the surface layer of the second region of the element termination portion having the same impurity concentration as the second portion of the normal portion, The average impurity concentration of the second region including the fifth region of the element termination portion (the average value of the impurity concentrations of the second region and the fifth region) may be higher than that of the second region of the normal portion.

Further, the first conductivity type impurities are introduced into the surface layer of the second region of the element termination portion having the same impurity concentration as that of the second region of the normal portion to obtain a net impurity concentration (from the second conductivity type impurity concentration). The value obtained by subtracting the impurity concentration of the first conductivity type) forms the fifth region of the second conductivity type having a lower concentration than that of the normal portion, so that the average impurity concentration of the second region including the fifth region of the element termination portion is formed. (The total amount of impurities in the second region and the fifth region is defined as the second region.
The value obtained by dividing the total volume of the region and the fifth region) is preferably lower than that of the second region of the normal part.

It is preferable that a plurality of diffusion mask windows (diffusion windows) for forming the fifth region are formed on the entire surface of the element termination portion or locally.

[0014]

Normal portion in the region n ^{- -} [action] n corresponding to a portion of the device termination portion of FIG. 9 by adding a high concentration of n area than, n of the element terminating portion ^- area of the entire surface is low voltage It is possible to prevent depletion in the above, and to prevent generation of a portion having a strong electric field strength on the cathode side. In addition, FIG.
N of the normal portion in the region ^- n corresponding to the b portion of the device termination portion ^-
By adding an n region having a concentration lower than that of the region, it is possible to deplete the entire surface of the n ⁻ region of the device termination portion even at a low voltage, thereby preventing generation of a portion having a strong electric field strength in the anode portion. can do.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a cross-sectional view of an essential part in which a first embodiment of the present invention is applied to a diode, and shows a cross-sectional view of an element termination portion corresponding to part a in FIG. p ^- region 2 is selectively formed, n ^{- -} n on the surface layer of the substrate 1 to form a selectively n ⁺ cathode region 3 in the surface layer of the region 2, n ^- region 2 surface and p ^- substrate 1
An n region 7 is formed by forming a p ⁺ connection region 4 for connecting with and contacting the connection region 4 on the surface layer of the n ⁻ region 2 and being separated from the n ⁺ cathode region 3 . Further, an anode electrode 5 is formed on the connection region 4, and a cathode electrode 6 is formed on the n ⁺ cathode region 3. When a voltage for reverse biasing the second junction 32 in which the connection region 4 and the n ⁻ region 2 are in contact with each other and the first junction 31 in which the p ⁻ substrate 1 and the n ⁻ region 2 are in contact with each other is applied, Before the electric field strength in the vicinity of the second junction 32 reaches the breakdown electric field strength, the depletion layer edge 20 extending from the first junction 31 into the n ⁻ region 2 and further into the n region 7 becomes n regions 7 and n ^−. The impurity concentration of n region 7 is adjusted to a relatively high concentration so as to reach the vicinity of the surface of region 2. The n region 7 may or may not reach the p ⁻ substrate 1. That is, n ⁻ region 2 and n
The average impurity concentration obtained by dividing the total amount of the n-type impurities in the region 7 by the volume thereof is increased in accordance with the radius of curvature of the element termination portion as compared with the n-type impurity concentration in the normal region n ⁻ region 2. Therefore, the depletion layer may be designed to extend to the same extent as the normal portion.

FIG. 2 is a sectional view of an essential part of a second embodiment of the present invention applied to a diode, and shows a sectional view of an element termination portion corresponding to part b of FIG. A region corresponding to the n region 7 of FIG. 1 is formed by the n ⁻ region 8 having a smaller amount than the n type impurity amount of the n ⁻ region 2. When a voltage for reverse biasing the first junction 31 and the second junction 32 is applied, before the electric field strength near the first junction 31 and the second junction 32 reaches the dielectric breakdown electric field strength, the first junction 31 from n ^- region 2 and the n ^- depletion edge 20 extending to the region 8 the n ^- region 8 and the n ^- region 2
The impurity concentration of the n ⁻ region 8 is adjusted to a relatively low concentration so as to reach the vicinity of the surface. The n ⁻ region 8 may or may not reach the p ⁻ substrate 1. That is, the average impurity concentration obtained by dividing the total amount of n-type impurities in the n ⁻ region 2 and the n ⁻ region 8 at the element end portion by the volume thereof is n ^{− in the} normal portion according to the radius of curvature of the element end portion. The depletion layer edge 20 may be designed to extend to the same extent as in the normal portion by reducing the n-type impurity concentration in the region 2. However, since the n ^-- region 8 is formed by introducing, for example, an opposite conductivity type (p-type) impurity, the impurity amount of the n ^-- region 8 is changed from the original n-type impurity amount. The amount of impurities remaining after subtracting the amount of impurities.

FIG. 3 shows a horizontal IGB according to a third embodiment of the present invention.
FIG. 10 is a cross-sectional view of a main part when applied to T, and shows a cross-sectional view of the main part of a portion corresponding to part a of FIG. 9. n ^- region 2 on p ^- substrate 1
Is formed, a connection region 4 that is a p ⁺ region that is in contact with the p ⁻ substrate 1 from the surface is formed in the n ⁻ region 2, and a p well region 10 is further formed, and the connection region 4 and the surface layer of the p well region 10 are formed. P ^{+ +} contact region 11 and n ⁺ emitter region 9
Forming the door, n ⁺ emitter region 9 and the n ^- across the insulating film on the surface of the p-well region 10 sandwiched between the region 2 is the gate electrode 18 is formed, p ⁺⁺ contact regions 11 and n ⁺ emitter An emitter electrode 12 is formed on the surface of the region 9. Further, apart from these regions, the n buffer region 14 and the n buffer region 14 are selectively formed in the surface layer of the n ⁻ region 2.
The p ⁺ collector region 13 is formed in the surface layer of the above, and the collector electrode 15 is formed thereon. Furthermore, the gate electrode 1
8, a gate terminal G, an emitter terminal E and a collector terminal C which are respectively in contact with the emitter electrode 12 and the collector electrode 15 are formed. Further, n-type impurities are diffused into the surface layer of the n ⁻ region 2 sandwiched between the p well region 10 and the n buffer region 14 through the diffusion mask 17 having the diffusion window 16 to form the n region 7. The difference from FIG. 1 is that
To increase the average impurity concentration of regions 7 and n ⁻ region 2, n-type impurities are diffused through a number of locally windowed diffusion windows 16. In a lateral IGBT,
Normally, since there is an n buffer region 14 for preventing punch-through of the p ⁺ collector region 13 (corresponding to the cathode portion in the case of a diode), the above-mentioned average n-type impurity concentration is increased in the same step. In order to form the region of 1, the impurity concentration of the n buffer region 14 is too high. Therefore, by introducing impurities through a large number of local diffusion windows 16 as in this embodiment, the average impurity concentration can be adjusted to an optimum value without increasing the number of steps.

FIG. 4 shows a horizontal type IGBT according to a fourth embodiment of the present invention.
FIG. 10 is a cross-sectional view of a main part when applied to T, and shows a cross-sectional view of the main part of a portion corresponding to part b of FIG. 9. The difference from FIG. 2 is that a large number of p-type impurities are added to the surface layer of the n ⁻ region 2 in order to reduce the average impurity concentration in the region where the n ⁻ region 2 and the n ⁻ region 8 are combined at the end of the device. The point is that diffusion is performed from the locally opened diffusion window 16 to form the n ⁻ region 8. Horizontal IGB
In T, the p-well region 10 is usually present, and if the n ^-- region 8 for reducing the average n-type impurity concentration is formed in the same step, the p-well region 10 is formed.
The impurity concentration of is too high, causing p-shift. for that reason,
By introducing p-type impurities from a large number of local diffusion windows 16 as in this embodiment, the average impurity concentration is adjusted to an optimum value without increasing the number of steps. This diffusion window 16
Is narrowed to a small width, for example, about 1 μm,
^- the surface concentration of the p-type impurity diffused into region 2 n ^- region 2
The surface concentration of n ⁻ region 2 can be reduced to p
The n ^-- region 8 can be formed without rolling.

Although the n region 7 and the n ⁻ region 8 are formed in a wavy shape in FIGS. 3 and 4, they may be formed individually in an island shape. In addition, the n ^-- region 8 may be turned over by p
^- it may be made to the area. Further, FIG. 3, the diffusion mask 1 having a diffusion window 16 for the convenience impurity introduced in FIG. 4
7 is shown in the cross-sectional view, this diffusion mask 16 is necessary only at the time of introducing impurities and need not be left until the final stage. Further, in this embodiment, the n buffer region 14 is used to introduce impurities.
Further, although the impurity introducing step used for the p-well region 10 is used, it goes without saying that any other appropriate impurity introducing step may be used.

FIGS. 5 and 6 are plan views showing the diffusion window 16 for introducing impurities in FIGS. 3 and 4, showing a semicircular pattern diagram and a radial pattern diagram, respectively. In FIGS. 5 and 6, n
^- diffusion mask having locally large number Apertures spreading window 16 in the oxide film on the surface of the region 2 and the like are formed. Here, only the position of the diffusion window 16 is shown, and the diffusion mask itself is not shown. Needless to say, other various patterns can be considered for the shape of the diffusion window 16, such as a large number of minute circles arranged. Further, explanations of other reference numerals in the drawings are omitted since they are similar to the other drawings.

In many cases, the element is manufactured by simultaneously applying the first and second embodiments and the third and fourth embodiments at the same time. In some cases, the example may be applied alone. For example, it is possible to apply an embodiment that matches only the more dominant element end portion due to the size of the curvature radius and the like. Further, although the examples in which these embodiments are applied to the diode and the IGBT have been described, it goes without saying that they can be applied to many elements such as MOSFETs and MOS gate thyristors.

[0022]

According to the present invention, by optimizing the average impurity concentration of the n ⁻ region of the element termination portion to a value different from the impurity concentration of the normal portion, electric field concentration in this portion is prevented. The element breakdown voltage can be improved. Further, in order to improve the area efficiency, it is possible to increase the breakdown voltage even in a large-capacity lateral semiconductor element having a large number of element end portions having a small radius of curvature. Further, since the average impurity concentration in the n ⁻ region can be optimized by utilizing the existing process, the breakdown voltage can be increased without increasing the manufacturing cost.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of an essential part in which a first embodiment of the present invention is applied to a diode, and is a cross-sectional view of an element termination part corresponding to part a of FIG.

FIG. 2 is a cross-sectional view of an essential part in which a second embodiment of the present invention is applied to a diode, and is a cross-sectional view of an element termination part corresponding to part b of FIG.

3 is a cross-sectional view of a main part when a third embodiment of the present invention is applied to a lateral IGBT, and is a cross-sectional view of a main part of a portion corresponding to part a of FIG.

FIG. 4 is a cross-sectional view of a main part when a fourth embodiment of the present invention is applied to a lateral IGBT, and is a cross-sectional view of the main part of a portion corresponding to part b of FIG.

FIG. 5 is a semicircular pattern diagram showing a diffusion window 16 for introducing impurities in the third and fourth examples.

FIG. 6 is a radial pattern diagram showing diffusion windows 16 for introducing impurities in the third and fourth embodiments.

FIG. 7 is a cross-sectional view of a conventional high breakdown voltage lateral semiconductor element (diode).

8 is a cross-sectional view of the device of FIG. 4, a spread view of a depletion layer, and an electric field strength distribution view.

FIG. 9 is a plan view of a large capacity element.

10A and 10B are a device cross-sectional view, a depletion layer spread diagram, and an electric field intensity distribution diagram, where FIG. 10A is a portion of FIG. 9, FIG. 9B is a portion b of FIG. 9, and FIG. Figure showing each of

[Explanation of symbols]

1 p ^- substrate 2 n ^- region 3 n ⁺ cathode region 4 connection region (p ⁺ region) 5 anode electrode 6 cathode electrode 7 n region 8 n ^- region 9 n ⁺ emitter region 10 p-well region 11 p ⁺⁺ contact regions 12 n ⁺ emitter electrode 13 p ⁺ collector region 14 n buffer region 15 collector electrode 16 diffusion window 17 diffusion mask 18 gate electrode 20 depletion layer end 25 anode pad 26 cathode pad 31 first junction 32 second junction 33 third junction G gate terminal E emitter terminal C collector terminal W n ^- width of the area surface

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 29/06 H01L 29/78 H01L 29/861

Claims (6)

(57) [Claims] 1. A second region of a second conductivity type selectively formed on a surface layer of a first region of a first conductivity type, and a first conductivity type selectively formed on a surface layer of a second region. Alternatively, a fourth region, which is a high-concentration connection region of the first conductivity type, is formed, which includes a high-concentration third region of the second conductivity type and which connects the surface of the second region and the first region. When a voltage for reverse biasing the second junction in which the region and the second region are in contact and the first junction in which the first region and the second region are in contact is applied, the electric field strength near the first junction and the second junction before but reaching the breakdown field strength, the depletion layer extending from the first joint to the second region is all the front surface of the second region
By reaching the in lateral semiconductor device having a structure that even if the impurity concentration at a relatively high concentration of high-voltage obtained in the second region, the surface portion of the second region of the device termination portion is curved region The impurity concentration in the second region and the surface of the second region are straight lines
A high withstand voltage lateral semiconductor device, wherein the impurity concentration of the second region of the normal portion, which is a region, is set to different values. Wherein the curvature of the surface portion of the fourth region radius, the third area surface portion radius of curvature greater than the radius of curvature of the possess, second impurity concentration of the second region is usually part of the device termination portion 2. The high breakdown voltage lateral semiconductor device according to claim 1, wherein the impurity concentration of the region is set to be higher than that of the region. 3. The radius of curvature of the surface portion of the fourth region is smaller than the radius of curvature of the surface portion of the third region, and the impurity concentration of the second region of the element termination portion is the second of the normal portion. 2. The high breakdown voltage lateral semiconductor device according to claim 1, wherein the impurity concentration of the region is set to be lower than that of the region. 4. A fifth region of the second conductivity type having a higher concentration than the impurity concentration of the normal portion is formed in the surface layer of the second region of the element termination portion having the same impurity concentration as the second region of the normal portion. By doing so, the average impurity concentration of the second region including the fifth region of the element termination portion (the average value of the impurity concentrations of the second region and the fifth region)
3. The high breakdown voltage lateral semiconductor element according to claim 2, wherein the concentration is higher than that of the second region of the normal portion. 5. A first conductivity type impurity is introduced into the surface layer of the second region of the device termination portion having the same impurity concentration as that of the second region of the normal portion to obtain a net impurity concentration (second conductivity type impurity concentration). The value obtained by subtracting the impurity concentration of the first conductivity type from the above) forms the fifth region of the second conductivity type having a lower concentration than that of the normal portion, so that the average impurity of the second region including the fifth region of the element termination portion is formed. concentration (second region and the value of the total amount of impurities divided by the total volume of the second region <br/> a fifth region of the fifth region) of the normal portion second
4. The high breakdown voltage lateral semiconductor device according to claim 3, wherein the concentration is lower than that of the region. 6. The method of claim 4 windows diffusion mask for forming a fifth region (diffusion window) is characterized in that it is or locally plurality formation formed in the element terminal portion entirely Further <br /> is a high voltage lateral semiconductor device described in 5 .