JP3434652B2 - Shaping circuit and shaping control method - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an ATM (Asynch)
The present invention relates to transmission traffic flow rate control (hereinafter referred to as "shaping") of ATM cells of an ATM exchange using the technology of ronous transfer mode).

[0002]

2. Description of the Related Art Shaping is the scheduling of cell transfer so that the rate declared by each connection is protected when data is converted into ATM cells and transferred. A circuit for performing this shaping, that is, the shaping circuit 1 is generally configured as shown in FIG. The shaping circuit 1 mainly includes a reference timer 2 and a determination circuit 3.
The calculation circuit 4 and the memory 5 are included, and the determination circuit 3 is controlled in cell units.

The cell SYNC signal is a synchronization signal representing the beginning of the ATM cell, and the reference timer 2 operates by this signal. The reference timer value obtained by the operation of the reference timer 2 is output to the determination circuit 3 and the calculation unit 4. In the determination circuit 3, the sendable time stored in the memory 5 is compared with the reference timer value, and when the reference timer value is equal to or more than the sendable time, the transmission OK signal is sent.

In the calculation section 4, the reference timer value from the reference timer 2 and the shaping setting value are added to calculate the next transmittable time. The next transmittable time is stored in the memory 5 and used for the next determination by the determination circuit 3.

The determination circuit 3 is controlled on a cell-by-cell basis. Therefore, continuous values cannot be set as the shaping value. That is, as shown in FIG. 3, only discrete values such as shaping values of 100%, 50%, 33%, and 25% can be set.

To solve this problem, there is a sliding window method. As shown in FIG. 4, this sliding window system has an internal memory for sequentially storing K VPI / VCI values. The VPI / VCI value stored in this window is shifted once at each cell timing (for each cell), and K VPI / VCI values are sequentially stored. And the VPI / hold in the window
By holding the number of VCI values in the internal memory and controlling this, the shaping value can be set finely.

[0007]

By the way, in the sliding window system having the above-mentioned structure, the window size must be increased in order to make the step size of the shaping value finer. For example, the shaping value is 1
To control from 1% to 100% in units of%, the window size must be 100.

However, if the step size of the shaping value is made fine, the window size becomes large, the hardware scale becomes large, and the size of the apparatus itself becomes large.

[0009]

In order to solve the above-mentioned problems, a first invention is to set a next transmittable time, which is a time until the next cell can be transmitted, to a reference shaping value which is a reference set time. In the shaping circuit for controlling the cell transmission control according to the next available transmission time,
l Cell time is an arbitrary value, and the standard shaping value is l
Calculated by dividing the set shaping value from the cell time, and if the value obtained by advancing the previous next transmittable time is equal to or greater than the reference timer value, the reference shaping value is added to the previous next transmittable time, and the previous next transmittable time is added. When the value obtained by advancing the available time is smaller than the reference timer value, the next sending available time determining unit that adds the reference shaping value to the reference timer value and sets the next available sending time is characterized.

As a result, the optimum next transmittable time can be determined depending on the presence or absence of the transmission cell.

Further, the set shaping value can be finely set from 0% to 100% by dividing the set shaping value from the 1 cell time to obtain the reference shaping value and adjusting the reference shaping value appropriately.

A second invention is the same as the first invention,
It is characterized by including a fluctuation control unit for managing the fluctuation of the cell and specifying the next available transmission time.

As a result, cells can be transmitted within a range where cell fluctuations are allowed by the next-stage network, and quality up to cell transmission delay can be improved.

According to a third aspect of the present invention, the next transmittable time, which is the time until the next cell can be transmitted, is controlled according to the reference shaping value which is the reference set time, and the cell can be transmitted by this next transmittable time. In the shaping control method for performing transmission control, the l-cell time is set to an arbitrary value, the reference shaping value is obtained by dividing the set shaping value from the l-cell time, and the value obtained by advancing the previous next transmittable time is equal to or greater than the reference timer value In the case of, the reference shaping value is added to the previous next sendable time, and when the value obtained by advancing the previous next sendable time is smaller than the reference timer value, the reference shaping value is added to the reference timer value. The next available transmission time is a feature.

As a result, the optimum next transmittable time can be determined depending on the presence or absence of the transmission cell.

Further, by adjusting the reference shaping value appropriately, the set shaping value can be changed from 0% to 100%.
It can be set up in detail.

A fourth invention is based on the third invention.
It is characterized by performing fluctuation control for managing the fluctuation of the cell and specifying the next transmittable time.

As a result, the cells can be transmitted within the range in which the network of the next stage allows the fluctuation of the cells, and the quality up to the cell transmission delay can be improved.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the accompanying drawings. Also in this embodiment, the case where the shaping circuit 11 is used in an ATM switch will be described as an example, as in the case of the conventional technique.

[First Embodiment] FIG. 1 is a block diagram showing a shaping circuit 11 according to the present embodiment. Here, the configuration when n = 64 is shown.

The shaping circuit 11 according to the present embodiment.
Is composed of a shaping conversion circuit 12, a reference timer 13, a determination circuit 14, a comparison circuit 15, a first addition circuit 16, an OR circuit 17, a selector 18, a second addition circuit 19, and a memory 20.

The shaping conversion circuit 12 is composed of a division circuit, calculates [reference shaping value = n / set shaping value], and outputs the reference shaping value.

The reference timer 13 is composed of a counter and is counted up (for each cell) by the cell SYNC signal. As a result, the counter output value from the reference timer 13 represents the current state, and the shaping control is performed with this as a reference.

The determination circuit 14 is composed of a comparator. The determination circuit 14 compares the A input value with the B input value, and when the A input value is greater than or equal to the B input value, sets the output to "H". That is, the reference timer 13 representing the current state
When the counter output value (A input value) from is greater than or equal to the next transmittable time (B input value) stored in the memory 20, the output is set to "H". The output signal “H” is a transmission OK signal, and is a signal that the transmission permission is issued by the shaping control.

The comparison circuit 15 is also composed of a comparator similar to the determination circuit 14. In this comparison circuit 15, A
The input value and the B input value are compared, and when the B input value is equal to or larger than the A input value, the "H" signal is output. The input value of A is
This is a counter output value from the reference timer 13. The B input value is an output value from the first adding circuit 16.

The first adder circuit 16 is composed of an adder circuit and outputs a value obtained by adding the A input value and the B input value. The A input value is the upper 7 bits of the next transmittable time which is the output value from the memory 20. The B input value is an output value from the OR circuit 17.

The OR circuit 17 outputs all the signals of the lower 6 bits in the next transmittable time from the memory 20 to O.
It is a circuit that takes R logic. The first adder circuit 16 and the OR circuit 17 perform a carry-up process.

The selector 18 is a circuit which selects either the counter output value from the reference timer 13 or the next transmittable time from the memory 20 and outputs it to the second adder circuit 19. The selection of this output value is made based on the output result of the comparison circuit 15. That is, if "H" is output from the comparison circuit 15, the next transmittable time from the memory 20 is selected, and if "L" is output, the counter output value from the reference timer 13 is selected. It is output to the 2 addition circuit 19.

The second adder circuit 19 is the first adder circuit 16 described above.
It is composed of the same adder circuit as. The output value of the selector 18 is input as the A input value and the reference shaping value of the shaping conversion circuit 12 is input as the B input value to the second addition circuit 19. The A input value and the B input value are added, and the value calculated thereby is output as the next transmittable time.

The comparison circuit 15, the first addition circuit 16, the OR circuit 17, the selector 18 and the second addition circuit 1
9, the next transmission available time determination unit is configured.

The memory 20 is a storage element for storing the next transmittable time from the second adder circuit 19, and is overwritten with new data. That is, when the next transmittable time is newly input, the previously stored next transmittable time is overwritten, and the latest next transmittable time is always stored, and when the determination circuit 14 determines the next cell. Read out. This memory 20 operates in response to the output of ATM cells from a cell buffer (not shown).

The shaping circuit 11 having the above-described configuration is composed of hard elements. In addition, the comparison circuit 15, the first addition circuit 16, the OR circuit 17, the selector 18, and the second addition circuit 19 perform shaping control, and based on the current time and the set shaping value, determine the time when the next cell can be transmitted. calculate.

In the present embodiment, shaping control is performed with 1 cell time as n. As a result, 1 / n becomes the minimum step size. For example, when n = 100, the set shaping value is 0 to 10 according to the calculation [reference shaping value = n / set shaping value] in the shaping conversion circuit 12.
The reference shaping value is 100% when 0, 99% when 101, and 98% when 102.

In FIG. 1, n = 64. n
If the value of is changed, the bit configuration in FIG. 1 will be changed.

[Operation] Next, the operation of the shaping circuit 11 having the above configuration will be described with reference to FIGS. 1, 5 and 6. 5 and 6 are timing charts for explaining the operation of the shaping circuit 11, FIG. 5 shows the case where ATM cells are continuously received, and FIG. 6 shows the case where they are received discontinuously.

First, the case where cells are continuously received will be described with reference to FIG. In this case, there is always an ATM cell to be transmitted when the next transmittable time has elapsed, and the comparison circuit 1
The output of 5 is always "H". In FIG. 5, the upper part shows the operation when the set shaping value is 50%, and the lower part shows the operation when the set shaping value is 30%.

When the set shaping value is 30%, the operation is as follows. The reference shaping value is [n /
Setting shaping value], and 64 / 0.3 = 213.

First, when the first cell SYNC signal is received, the reference timer value "0" is output from the reference timer 13. The reference timer value “0” is input as the A input value of the determination circuit 14. On the other hand, the B input value becomes the next transmittable time “0” because the memory 20 is empty,
The input value is the same. Therefore, the determination circuit 14 immediately outputs the transmission OK signal. As a result, ATM cells are output from the cell buffer (not shown). This A
The memory 20 operates by the output of the TM cell.

Reference timer value "0" from the reference timer 13
Is also input as the A input value of the comparison circuit 15. On the other hand, since the memory 20 is empty, both the A input value and the B input value of the first addition circuit 16 are “0”, and the B input value of the comparison circuit 15 is also “0”. As a result, the comparison circuit 15 outputs the “H” signal, and the selector 18 selects the output value from the memory 20. In response to this, the second addition circuit 19
Then, the A input value “0” and the B input value “213” are added, and the next transmittable time “213” is stored in the memory 20.

Next, when the second cell SYNC signal is received, the reference timer value "64" is output from the reference timer 13. The determination circuit 14 compares the reference timer value “64” from the reference timer 13 as the A input value with the output value “213” from the memory 20 as the B input value. At this time, since the B input value is large, the determination circuit 14 does not output the transmission OK signal. As a result, no ATM cell is output from the cell buffer. Also, AT
Since M cells are not output, the memory 20 does not operate and is not rewritten.

Next, when the third cell SYNC signal is received, the reference timer 13 outputs the reference timer value "128". The determination circuit 14 compares the reference timer value “128” from the reference timer 13 as the A input value with the output value “213” from the memory 20 as the B input value. At this time as well, since the B input value is large, the determination circuit 14
Does not output the transmission OK signal. The same applies to the case of the fourth cell SYNC signal.

Next, when the fifth cell SYNC signal is received, the reference timer 13 outputs the reference timer value "256". In the determination circuit 14, “25” as the A input value
6 "is compared with" 213 "as the B input value.
At this time, since the input value A is large, the determination circuit 14 outputs the transmission OK signal. As a result, the ATM cell is output from the cell buffer, and the memory 20 receives the ATM cell.
Works.

In the comparison circuit 15, the item information "256" from the reference timer 13 is input as the A input value. On the other hand, since “213” is stored in the memory 20, the OR circuit 17 outputs “1” indicating that “213” is a number that cannot be divided by “64”. This output "1" is to carry the lower 6 bits,
The B input value of the first addition circuit 16 becomes “64”. Since the A input value has the upper 7 bits, it means “192”.
These are added, and the B input value of the comparison circuit 15 becomes "25.
6 ”, which is the same value as the A input value“ 256 ”. Therefore, the comparison circuit 15 outputs "H", and the selector 18 selects the output value from the memory 20. As a result, in the second adder circuit 19, the A input value “213” and the B input value
The input value “213” is added, and the next transmittable time “4
26 ”is stored in the memory 20.

Similarly, when the sixth and seventh cell SYNC signals are received, since the output value of the memory 20 is larger, the transmission OK signal is not output and the memory 20 does not operate.

Next, when the eighth cell SYNC signal is received, the A input value in the decision circuit 14 becomes large.
A transmission OK signal is output, and an ATM cell is output from the cell buffer. In response to this, the memory 20 is rewritten in the same manner as described above.

Thereafter, the same operation is repeated.

Even when the set shaping value is 50%, the same operation as when the set shaping value is 30% is performed. At this time, the reference shaping value is [n / setting shaping value], which is 64 / 0.5 = 128.

Next, a case where ATM cells are discontinuously received will be described with reference to FIG. Here, only the operation when the set shaping value is 30% is shown.

First, when the first cell SYNC signal is received, the reference timer value "0" is output from the reference timer 13 as in the case of continuous reception of ATM cells. Since the output value of the memory 20 is also “0”, the determination circuit 14 immediately outputs the transmission OK signal. As a result, an ATM cell is output from the cell buffer (not shown) and the memory 20 operates.

The comparator circuit 15 to the second adder circuit 19 also operate in the same manner as described above, and the next transmittable time "213".
Are stored in the memory 20.

Until the fourth cell SYNC signal is received,
Since the B input value is larger than the A input value in the determination circuit 14, the transmission OK signal is not output from the determination circuit 14 and the memory 20 is not rewritten as in the above.

Next, when the fifth cell SYNC signal is received, the reference timer 13 outputs the reference timer value "256". In the determination circuit 14, “25” as the A input value
6 ”is compared with“ 213 ”as the B input value, and A
Since the input value is larger, the decision circuit 14 sends O
The K signal is output. However, in this case, since the ATM cell to be transmitted is not stored in the cell buffer,
No cells are output. As a result, the memory 20 does not operate and is not rewritten.

Similarly, when the sixth cell SYNC signal is received, the transmission OK signal is output, but since the ATM cell to be transmitted is not stored in the cell buffer, the ATM cell is not output. The memory 20 also does not operate.

When the seventh cell SYNC signal is received, if the ATM cell is stored in the cell buffer, the OK signal from the decision circuit 14 is received and the ATM cell is transmitted from the cell buffer. It In response to this, the memory 20 also operates.

In the comparison circuit 15, the reference timer value "384" from the reference timer 13 is input as the A input value. On the other hand, since “213” is stored in the memory 20, the output value “256” carried up by the first addition circuit 16 and the OR circuit 17 is input as the B input value of the comparison circuit 15. At this time, the A input value becomes larger, so the comparison circuit 15 outputs "L". As a result, the selector 18 selects the output value from the reference timer 13. In response to this, the second addition circuit 19 adds the A input value “384” and the B input value “213”, and stores the next sendable time “597” in the memory 20.

Thereafter, similarly, the transmission OK signal is not output from the determination circuit 14 until the output value from the reference timer 13 becomes larger than the output value "597" from the memory 20,
The memory 20 cannot be rewritten.

When the 11th cell SYNC signal is received, the A input value "640" becomes larger than the B input value "597", and the determination circuit 14 outputs the transmission OK signal. At this time, if the ATM cell to be transmitted is stored in the cell buffer, the ATM cell is output and the memory 2
0 operates as described above.

If the ATM cell to be transmitted is not stored in the cell buffer, the ATM cell is transmitted immediately when the ATM cell is stored in the cell buffer, and the reference timer value at that time is taken in as the next transmittable time. .

[Effect] As described above, when the value obtained by raising the previous next sendable time by the first addition circuit 16 and the OR circuit 17 is equal to or greater than the reference timer value, the previous next sendable time is used as a reference. The shaping values are added to make the next transmittable time. If the carry value is smaller than the reference timer value, the reference shaping value is added to the reference timer value to obtain the next transmittable time. As a result, the optimum next transmittable time can be determined depending on whether there is an ATM cell to be transmitted or not.

The set shaping value is set to 0 by appropriately adjusting the 1-cell time n and the reference shaping value.
It becomes possible to finely set from 100% to 100%.

By changing the value of the 1-cell time n, the minimum step size of the reference timer value can be variably adjusted.

Further, by forming the entire shaping circuit 11 in hardware, the time for shaping control in the software processing can be reduced. That is, in the ATM exchange, the shaping control can be surely performed while preventing the original decrease in the exchange processing speed.

[Second Embodiment] Next, a second embodiment of the present invention will be described. FIG. 7 is a block diagram showing the shaping circuit according to the present embodiment. Again, n
The configuration when = 64. The shaping circuit 25 of this embodiment is the shaping circuit 11 of the first embodiment.
The CDV management is added to the shaping control by. Note that CDV means cell fluctuation (Cell Del
ay Variation).

CDV embedding is a control that enables transmission within a CDV allowable value range that was previously determined on the network when the connection was set.

The shaping circuit 25 of the present embodiment has a configuration in which a third adder circuit 26, a subtraction circuit 27 and a CDV conversion circuit 28 are added to the shaping circuit 11 of the first embodiment.

The CDV conversion circuit 28 is composed of a multiplication circuit and performs a multiplication process of [reference CDV value = n × set CDV value]. The set CDV value is C that is actually allowed.
This is a value for setting the DV value (cell fluctuation). This CD
The V conversion circuit 28 outputs the CDV value, but may not output the CDV value under a certain condition. That is, the first cell SYNC after the first cell SYNC signal is input and the decision circuit 14 outputs the transmission OK signal, but this ATM cell is not transmitted because there is no ATM cell in the cell buffer.
When a signal is input, the CDV conversion circuit 28 outputs the CDV
No value is output, and CDV is input from the next cell SYNC signal input.
The value is designed to be output. The output from the CDV conversion circuit 28 is output to the third addition circuit 26 and the subtraction circuit 27.

The third addition circuit 26 is a CDV conversion circuit 28.
Is added to the output value from the memory 20 and the added value is output to the "1" side of the first adder circuit 16, the OR circuit 17, and the selector 18.

The subtraction circuit 27 subtracts the output value of the CDV conversion circuit 28 from the output value of the second addition circuit 19 and outputs the memory 2
It is designed to output to 0.

The third adder circuit 26, the subtraction circuit 27, and the CDV conversion circuit 28 constitute a fluctuation control section.

[Operation] Next, the operation of the shaping circuit 25 having the above configuration will be described with reference to FIG. Note that FIG.
6 is a timing chart for explaining the operation of the shaping circuit 25. The upper part of FIG. 8 is an example when ATM cells are continuously received, and the lower part is an example when discontinuously received. Note that, as in the case of the first embodiment, n =
64 will be described as an example. Shaping value is 30%, setting C
The DV value is 2 cells (n × CDV value = 128). Since the shaping value is 30%, (64 / 0.3) = 213 is set as the reference shaping value (setting value) from (n / shaping value) = setting value.

First, the case where ATM cells are continuously received will be described with reference to the upper part of FIG. In this case, there is an ATM cell to be transmitted when the next transmittable time has elapsed, and the output of the comparison circuit 15 is always "H".

When the first cell SYNC signal is received, the reference timer 13 outputs the reference timer value "0". The reference timer value “0” is input as the A input value of the determination circuit 14. On the other hand, the B input value becomes the next transmittable time “0” because the memory 20 is empty, and the A input value and the B input value are the same. Therefore, the determination circuit 14 immediately outputs the transmission OK signal. As a result, ATM cells are output from the cell buffer (not shown). The memory 20 operates by the output of this ATM cell.

The reference timer value “0” from the reference timer 13 is also input as the A input value of the comparison circuit 15. On the other hand, the CDV conversion circuit 28 does not output the CDV value because it is the first cell SYNC signal input. In the third addition circuit 26, both the output from the CDV conversion circuit 28 and the output from the memory 20 are “0”, so that the output value “0” is output to the first addition circuit 16 and the OR circuit 17. As a result, the B input value of the comparison circuit 15 also becomes "0". As a result, “H” is output from the comparison circuit 15, and the selector 18 selects the output value from the third addition circuit 26. In response to this, the second
In the adder circuit 19, the A input value “0” and the B input value “21”
3 ”is added and“ 213 ”is input as the A input value of the subtraction circuit 27. Then, in the subtraction circuit 27, the CDV of the CDV conversion circuit 28 is changed from "213" as the A input value.
The value “128” is subtracted and the next sendable time “85” is stored in the memory 20.

Then, when the second cell SYNC signal is received, the reference timer 13 outputs the reference timer value "64". The determination circuit 14 compares the reference timer value “64” from the reference timer 13 as the A input value with the output value “85” from the memory 20 as the B input value. At this time, since the B input value is large, the determination circuit 14 does not output the transmission OK signal. As a result, the memory 20 also does not operate.

Next, when the third cell SYNC signal is received, the reference timer 13 outputs the reference timer value "128". In the determination circuit 14, “12” is input as the A input value.
8 "is compared with" 85 "as the B input value, and the A input value becomes larger, so transmission from the determination circuit 14 is OK.
The signal is output. As a result, ATM cells are output from the cell buffer (not shown). The memory 20 operates by the output of this ATM cell.

In the comparison circuit 15, the reference timer value "128" is input as the A input value. On the other hand, in the third adding circuit 26, the CDV value “1
28 ”and the next transmittable time“ 85 ”of the memory 20 are added, and the output value“ 213 ”becomes the first addition circuit 16 and O.
Output to the R circuit 17. As a result, B of the comparison circuit 15
The input value becomes “256”, and the comparison circuit 15 outputs “H”. The selector 18 receives the "H" signal and selects the output value from the third adder circuit 26. In response to this, the second addition circuit 19 adds the A input value "213" and the B input value "213" to "426", and the elimination circuit 27 changes from "426" to the CDV value "128". Is subtracted to become "298". And this "298"
Is stored in the memory 20 as the next transmittable time.

Thereafter, similarly, the reference timer value "32
An ATM cell is output from the cell buffer at 0, “512”, “768”, etc., and the next transmittable time calculated by fetching the previous next transmittable time is stored in the memory 20.

On the other hand, when ATM cells are not continuously received, the operation is as follows. A description will be given based on the lower part of FIG.

The operation when the first and second cell SYNC signals are received is similar to the processing when the above-mentioned ATM cells are continuously received.

Next, when the third cell SYNC signal is received, the reference timer value "128" is output from the reference timer 13 and the transmission OK signal is output from the determination circuit 14, which is transmitted to the cell buffer. Since no ATM cell is stored, no ATM cell is output. As a result, the memory 20 also does not operate. The same applies to the case of the fourth cell SYNC signal.

If an ATM cell is stored in the cell buffer at the time of receiving the fifth cell SYNC signal, the OK signal is sent from the decision circuit 14 and the ATM cell is immediately transmitted from the cell buffer. . The memory 20 operates by the transmission of the ATM cell.

In the comparison circuit 15, the reference timer value "256" is input as the A input value. On the other hand, in the CDV conversion circuit 28, since no ATM cell is output from the cell buffer in response to the previous transmission OK signal transmission, the CDV conversion circuit 28
The V value becomes “0”. In the third adding circuit 26, the CDV value “0” and the next transmittable time “85” of the memory 20 are added, and the output value “85” is added to the first adding circuit 16 and the OR.
Output to the circuit 17. As a result, the B input value of the comparison circuit 15 becomes “128”, and the comparison circuit 15 outputs “L”. The selector 18 receives the "L" signal,
The reference timer value “256” is selected from the reference timer 13. In response to this, the second addition circuit 19 adds the A input value “256” and the B input value “213” to obtain “46”.
Then, the subtraction circuit 27 subtracts the CDV value “128” from “469” to obtain “341”. Then, this "341" is stored in the memory 20 as the next transmittable time.

By setting the next transmittable time to "341", the next transmission OK signal is output when the reference timer value is "384". That is, the interval of signal transmission is shortened to manage the fluctuation of the cell because of the correction of the signal not being transmitted between the reference timer value “0” and the reference timer value “256”.

[Effect] As described above, also in the case of the second embodiment, the same effect as that of the first embodiment can be obtained.

Furthermore, in the present embodiment, by setting the CDV value of the cell, it is possible to send the ATM cell within the CDV range in which the network of the next stage allows the fluctuation of the cell, and the ATM cell sending delay is reached. The quality can be improved.

[Usage Mode] In each of the above-described embodiments, the case where the shaping circuits 11 and 25 are used in the ATM switch has been described as an example. However, in addition to this, an ATM interface card (NIC) on the terminal side or the like is used. It can be applied to all the devices that operate.

In each of the above embodiments, the method of shaping the ATM cell is proposed, but the present invention can be applied to any signal that needs to be rectified.

[0088]

As described above in detail, the shaping circuit of the present invention has the following effects.

(1) The previous next transmittable time and the reference timer value are compared, and the reference shaping value is selectively added to the previous next transmittable time or the reference timer value to obtain the next transmittable time. Since this is done, the optimum next transmittable time can be determined depending on the presence or absence of the transmission cell.

(2) Further, the l-cell time is set to an arbitrary value, and the reference shaping value is obtained by dividing the set shaping value from the l-cell time. Therefore, the reference shaping value can be adjusted appropriately to set the shaping value. Can be finely set from 0% to 100%.

(3) Also, by changing the value of the l-cell time, it becomes possible to variably adjust the minimum step size of the reference timer value.

(4) Since the cell fluctuation is managed and the next possible transmission time is specified, the cell fluctuation can be transmitted within the range permitted by the network in the next stage, and the cell transmission delay is not reached. The quality of can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a shaping circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional shaping circuit.

[Figure 3] Shaping values are 100%, 50%, 33% and 25%
It is a figure which shows the output cell flow of.

FIG. 4 is a schematic diagram showing a sliding window.

FIG. 5 is a timing chart for explaining the operation when cells are continuously received in the shaping circuit of the first embodiment.

FIG. 6 is a timing chart explaining an operation when cells are discontinuously received in the shaping circuit of the first embodiment.

FIG. 7 is a block diagram showing a shaping circuit according to a second embodiment of the present invention.

FIG. 8 is a timing chart explaining the operation when a cell is received in the shaping circuit of the second embodiment.

[Explanation of symbols]

11, 25: shaping circuit, 12: shaping conversion circuit, 13: reference timer, 14: determination circuit, 15: comparison circuit, 16: first addition circuit, 17: OR circuit, 18:
Selector, 19: second adder circuit, 20: memory, 26:
Third adder circuit, 27: subtraction circuit, 28: CDV conversion circuit.

Continuation of the front page (56) Reference JP 10-23037 (JP, A) JP 6-216930 (JP, A) JP 7-99494 (JP, A) JP 7-95211 (JP , A) JP-A-3-297245 (JP, A) Miyoshi et al., A study on ATM cell output control in ABR, Proceedings of 1996 IEICE General Conference, Japan, IEICE, 1996. Year, Communications 2 (B-636), p68 (58) Fields investigated (Int.Cl. ⁷ , DB name) H04L 12/28

Claims (4)

(57) [Claims] 1. A next transmittable time, which is a time until the next cell can be transmitted, is controlled according to a reference shaping value which is a reference set time, and cell transmission control is performed by this next transmittable time. In the shaping circuit, 1 cell time is set to an arbitrary value, and the reference shaping value is set to 1
Calculated by dividing the set shaping value from the cell time, and if the value obtained by advancing the previous next transmittable time is equal to or greater than the reference timer value, the reference shaping value is added to the previous next transmittable time, and the previous next transmittable time is added. When the value obtained by advancing the available time is smaller than the reference timer value, the reference shaping value is added to the reference timer value, and the next sendable time determining unit sets the next sendable time as a shaping circuit. . 2. The shaping circuit according to claim 1, further comprising a fluctuation control unit that manages fluctuations of cells and specifies a next transmittable time. 3. The next transmittable time, which is the time until the next cell can be transmitted, is controlled according to a reference shaping value, which is a reference set time, and the cell transmission is controlled by this next transmittable time. In the shaping control method, 1 cell time is an arbitrary numerical value, and the reference shaping value is 1
It is calculated by dividing the set shaping value from the cell time, and if the value obtained by advancing the previous next transmittable time is equal to or greater than the reference timer value, the reference shaping value is added to the previous next transmittable time and the previous next transmittable time is added. A shaping control method, characterized in that, when the value obtained by advancing the available time is smaller than the reference timer value, the reference shaping value is added to the reference timer value to obtain the next transmittable time. 4. The shaping control method according to claim 3, wherein the fluctuation control is performed to manage the fluctuation of the cell and specify the next transmittable time.