JP3433765B2 - Digital signal processor for waveform modification - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an output having a shape different from that of an input waveform before compression by making parameters used for waveform prediction calculation different between compression and expansion. The present invention relates to a digital signal processor for waveform change obtained after a waveform is expanded. 2. Description of the Related Art A musical sound waveform or the like is sampled and converted into digital data, and the converted digital data is written in a memory. At the time of sound generation, the digital data written in the memory is read out to reproduce the musical sound waveform. This is widely done in electronic musical instruments. In such an electronic musical instrument, in order to reproduce from a memory a musical tone that is similar to a musical tone of a natural musical instrument, it is necessary to store sample data for each pitch or each sound range. It is known that the amount will be enormous. However, since a memory system having a huge memory capacity is expensive, employing such a memory system is not preferable in terms of cost effectiveness. Conventionally, digital data is compressed and stored in a memory as a small amount of data, and decompressed at the time of reading, thereby enabling generation of high-quality musical sound without requiring a memory system having a huge memory capacity. . As an example of a compression / decompression device of an electronic musical instrument that compresses digital data, stores it in a memory, and decompresses it when reading, the compression / decompression device described in Japanese Patent Publication No. 3-9474 is shown in FIG. As shown in FIG. First, the principle of compressing digital data will be described with reference to FIG. The digital data has a waveform having periodicity as shown in FIG. 7A, and the data D (n) _{1 at the} timing t (n) ₁ is obtained by subtracting the prediction data from the digital data F (t). Data at the timing t (n) ₂
(N) ₂ is the residual data obtained by subtracting the prediction data from the digital data F (t), and
Data D (n) ₃ in (n) ₃ is a residual data obtained by subtracting the prediction data from the digital data F (t). Since the prediction data is data for predicting the digital data F (t) at the next timing, the residual data is data obtained by compressing the digital data F (t). Can be expressed as shown. Here, the digital data F (t) has a periodic waveform like a musical tone waveform, and each timing t (n) _{1 to} t (n) _2.
Are timings of the same phase of the digital data F (t). Therefore, the timing t (n) ₁ and residual data D (n) _1, the timing t (n) ₂ of the residual data D
Further determines the difference between (n) _2, the residual difference data E (n) ₂ are obtained a further data obtained by compressing the data. Thus, further compressed data can be obtained. The residual difference data E obtained by the compression
FIG. 3C shows (n) _{1 to} E (n) _3. Since there is no residual data one cycle before in the first cycle T1, the residual data E (n) ₁ and the residual data E (n) ₁ are different from each other. It is the same as the data D (n) ₁ . When data compressed based on this principle is written in a memory, the memory capacity can be made much smaller than when the memory capacity is not compressed. Next, a compression / decompression device for an electronic musical instrument using a memory in which an input signal F (t) such as a musical tone signal is compressed and written is shown in FIG. In FIG. 7A, the input signal F
(T) is converted into digital data F (n) by the analog / digital converter 100 and is input to the adder 102 and is input to the predictor 101. This predictor 101
In, the prediction data predicted to be input next is calculated from the input data up to the present and output to the adder. As a result, in the adder 102, the prediction data is subtracted from the input digital data F (n), and compressed residual data D (n) is output. The residual data D (n) is further input to the adder 103, which outputs the output signal of the delay circuit 105 set to the delay time corresponding to one cycle of the input data. The data supplied through the gate 106 and the data supplied from the AND gate 106 are subtracted from the residual data D (n) input to the adder 103. [0005] The output signal of the adder 103 is the adder 1
04 and is added to the data from the AND gate 106, the adder 104 outputs the residual data D
(N) is recombined and output. The re-synthesized residual data D (n) corresponds to 1 of the input signal F (t).
Since the delay is performed by the delay circuit 105 whose period is set to the delay time, the delay circuit 105 outputs the residual data D (n−1) one cycle before. Therefore, the adder 103 subtracts the residual data D (n−1) one cycle before from the current residual data D (n),
Further, the compressed residual difference data E (n) is output. However, when the first cycle T1 is input, since the residual data D (n) one cycle before does not exist, the signal IC is set to “0” during the first cycle T1, and the AND gate 106 is closed. The residual data D (n) is sequentially written to the delay circuit 105 as it is. Then, after the second period T2, the signal IC is set to "1" to open the AND gate 106, and a compression operation for calculating the residual difference data is performed. Thus, the residual difference data E (n) obtained by efficiently compressing the input digital data F (n) is written into the memory 107. [0006] The original input signal F
FIG. 2 (b) shows a device which expands at (t). In this figure, the residual difference data E read from the memory 107
(N) is input to the adder 108, and is added to the residual data D (n-1) one cycle before. The residual data D (n-1) one cycle before is obtained from the delay circuit 110 set to the delay time of one cycle of the input signal F (t), and is sent to the adder 108 via the AND gate 109. Supplied.
Then, the adder 108 calculates the residual difference data E (n) and 1
The residual data D (n-1) before the cycle is added to synthesize the residual data D (n). Synthesized residual data D
(N) is further input to the adder 111 to which the prediction data from the predictor 112 is supplied. Predictor 112
Calculates the next predicted data using the combined digital data F (n) output from the adder 111 up to the current time, and outputs the calculated data to the adder 111. As described above, the original input digital data F (n) is synthesized by adding the residual data D (n) and the prediction data by the adder 111. This input digital data F (n) is digital /
The signal is converted into an analog signal by the analog converter 113, reproduced into an input signal F (t) such as a tone signal, and output. When the first cycle T1 is read from the memory 107, the read data in this case is the residual data D (n), as described above, so that the signal IC is set to "0" and the AND gate is set. 109 is closed, and the read residual data of the first cycle is sequentially written to the delay circuit 110. Then, after the second cycle, the signal IC
Is set to “1” and the AND gate 109 is opened to open the
What is necessary is just to supply the output data of 0 to the adder 108. The compression side predictor 101 and the expansion side prediction unit 112 and the compression side delay circuit 105 and the expansion side delay circuit 110 have the same configuration. According to the conventional compression / decompression device, compression is performed using a predictor capable of delaying the pitch of a musical tone waveform to be generated, and the compressed waveform is stored in a waveform memory. Since the compressed waveform read out from is expanded by using a predictor that can delay the pitch of the musical sound waveform to be reproduced and the musical sound waveform is reproduced, a waveform memory having a much smaller capacity than usual is used. However, it is possible to generate high-quality musical sounds. However, in the conventional compression / expansion apparatus, compression / expansion is performed for the purpose of reducing the storage capacity of the waveform memory.
On the extension side, the original waveform shape is reproduced faithfully. For this reason, the input waveform and the output waveform of the compression / expansion device are almost the same, and the waveform shape cannot be changed. Therefore, the compression means is used as the analysis unit, and the decompression means is used as the synthesis unit, so that the parameters of the prediction unit on the analysis unit side and the parameters of the prediction unit on the synthesis unit side are different from each other. It has been proposed to obtain different waveform shapes from the output of the synthesis unit. The calculation of the analysis unit and the synthesis unit is usually performed using a digital signal processor (DSP). However, at present, it is difficult to obtain a high-speed DSP. It is necessary to limit the number of calculation steps for generating sound without delay, and therefore, there is a problem that it is difficult to perform a waveform change that can change various timbres. Thus, the present invention provides a D
It is an object of the present invention to provide a digital signal processor for waveform change that can perform waveform change that can change various timbres even using SP. [0010] In order to achieve the above object, the present invention provides a digital signal processing apparatus for performing an operation between an analyzing unit and a synthesizing unit. When the waveform shape is changed, the number of DSP calculation steps assigned to the analysis side is assigned to the synthesis unit based on the knowledge that greatly affects the change in timbre.
P calculation can simplify the configuration of the analysis side prediction means by less than the number of steps Rutotomoni is obtained by setting that can complicate the construction of the synthetic side prediction means. According to the present invention, the configuration of the synthesis-side prediction means is more complicated than that of the analysis-side prediction means. Will be able to do. That is, the limited resources can be effectively used. FIG. 1 shows a block diagram of an electronic musical instrument employing a digital signal processor for changing a waveform according to the present invention. In this figure, a CPU (central processing unit) 3 is connected to a bus line 12 and has a ROM (Read Only Memory) 5.
Fetches data from the bus line 12 based on the CPU program stored in the
For example, in the case of the event detection data of the keyboard 1, the tone generation is controlled by sending tone generation data and tone color data to the sound source 8 and the DSP 9 via the bus line 12. Also, the musical tone that is pronounced at this time is
A preset tone selected from a plurality of tones stored in the ROM 5 or a random access memory (RAM).
mory) 4 is generated by a tone or the like stored by the user. A panel SW 7 is a switch for setting tone parameters and the like, and is set while looking at the parameters displayed on the display 6. Furthermore, D
SP9 is a digital signal processor for waveform change provided with the analyzing unit and the synthesizing unit according to the present invention. Accordingly, the waveform shape of the waveform signal generated by the sound source 8 is changed. The sound source 8 includes any one of a sound source such as a waveform memory sound source, an FM sound source, and a harmonic synthesis sound source, and is a sound source that can selectively generate a waveform of a designated timbre in the sound source itself. The musical tone whose waveform has been changed by the DSP 9 is converted into an analog signal by a digital / analog converter (DAC) 10 and is emitted from the sound system 11. Next, FIG. 2 shows a block diagram of a waveform changing digital signal processing apparatus of the present invention constituted by the DSP 9. However, since the DSP 9 is an apparatus for performing arithmetic processing by a program, the block diagram shown in this figure conceptually illustrates this arithmetic processing as a block diagram. In this figure, the DSP 9 is composed of an analyzer 20 composed of adders 21 and 22 and an analyzer-side predictor 23, and a synthesizer 30 composed of an adder 31 and a combiner-side predictor 32. In the analysis section 20, the waveform data input from the sound source 8 is input to the adder 21, and the analysis side predictor 23
Is subtracted, and residual data is output. This residual data is input to the adder 22 and also to the synthesizing unit 30. In the adder 22, the input waveform data is reproduced by adding the prediction data from the analysis-side predictor 23 to the residual data.
The reproduced waveform data is input to the analysis-side predictor 23, and an analysis prediction data is created by performing an operation using the waveform data. On the other hand, in the synthesizing section 30, the analyzing section 20
Is supplied to the adder 31, and the residual data and the prediction data from the combining-side predictor 32 are added to form the waveform data having a shape changed from the waveform of the input waveform data. Are synthesized and output. The combined waveform data is input to the combining-side predictor 32, and combined prediction data is created based on the combined waveform data. Normally, the configuration of the analysis-side predictor and the synthesis-side predictor are the same. Therefore, in order to change the shape of the input waveform data, the calculation parameters of the analysis-side predictor and the calculation What is necessary is just to make it different from a parameter. However, as mentioned above, the DSP
Since the number of calculation steps of 9 is limited, if the configuration of the analysis-side predictor and the synthesis-side predictor is the same, the reproduced sound cannot be changed in various ways. The allocation ratio of the number of operation steps in this case is shown in FIG. 3A, and the number of operation steps is equally divided between the analysis unit and the synthesis unit. Therefore, as shown in FIG. 3B, the assignment ratio of the number of operation steps of the DSP 9 is assigned to the analysis unit 20 to the synthesis unit 30 at a large ratio. According to experiments, the magnitude of the influence of the components of the predictor on the reproduced sound differs between the analysis side and the synthesis side, and it has been confirmed that the influence of the components of the synthesis side predictor 32 is considerably large. FIG. 4 shows an example of the configuration of the predictor when the configurations of the predictors 23 and 32 in the analyzer 20 and the synthesizer 30 are the same. In this figure, the input waveform data is 1
The high-frequency component is limited by the next low-pass filter (LPF) 41 and input to the delay circuit 42. The delay circuit 42 is set so as to have a delay time substantially corresponding to the pitch of the waveform generated by the sound source 8 in the entire loop. The waveform data delayed by a predetermined time by the delay circuit 42 is input to an all-pass filter (APF) 43. The APF 43 allows signals in all frequency ranges to pass therethrough. However, since the phase shift amount of the output signal differs according to the signal frequency, the pitch between harmonics is set to the AP value.
It can be shifted slightly depending on the F coefficient. This APF
The waveform data from 43 is input to the multiplier 45 and also to the non-linear circuit 44, and the waveform shape is distorted by, for example, limiting the peak portion of the input waveform data. The output of the non-linear circuit 44 is input to an adder 47 via a multiplier 46, added to the output of the multiplier 45, and output as prediction data. The multiplier 45 and the multiplier 46 can set the synthesis ratio of the waveform data deformed by the non-linear circuit 44 and the waveform data bypassing the non-linear circuit 44, and can set the gain of the predictor. it can. The delay time of the delay circuit 42 is set so that the delay time of the path from the input to the output of the predictor corresponds to the pitch of the waveform generated from the sound source 8. When the configurations of the predictors 23 and 32 in the analysis unit 20 and the synthesis unit 30 are the same as described above, the number of operation steps allocated to the analysis unit 20 and the synthesis unit 30 is the same as shown in FIG. Ratio. Next, FIG. 5 shows an example in which the configurations of the predictors 23 and 32 of the analysis unit 20 and the synthesis unit 30 are different. FIG. 3A shows an analysis-side predictor in the analysis unit 20 .
23 , and only the minimum required delay circuit 51 and multiplier 52 are required.
The number of calculation steps to be assigned to is set to be small as shown in FIG. This delay circuit 51
Is set to correspond to the pitch of the waveform generated from the sound source 8, and the gain of the analysis-side predictor 23 is set by the multiplier 52. On the other hand, FIG.
3 shows the configuration of the combining-side predictor 32 in the combining unit 30 in which the components of the analyzing-side predictor 23 in which the components of the analyzing-side predictor 23 are simplified are shown.
The size is increased as shown in FIG. This combining unit 30
In the synthesis side predictor 32 , the input waveform data is input to the delay circuit 62 after the high-frequency component is restricted by the secondary LPF 61. This delay circuit 62
Has a delay time set so as to substantially correspond to the pitch of the waveform generated by the sound source 8 in the entire loop. The waveform data delayed by the delay circuit 62 for a predetermined time is input to an all-pass filter (APF) 63. This A
The PF 63 allows signals in all frequency ranges to pass, but since the phase shift amount of the output signal varies according to the signal frequency, the pitch between harmonics is delicately shifted according to the APF coefficient. Can be. The waveform data from the APF 63 is input to the non-linear circuit 64 and the multiplier 67, and is also input to the non-linear circuit 65. In the non-linear circuits 64 and 65, the waveform shape of the input waveform data is distorted. The non-linear circuit 64 and the non-linear circuit 65 are different in the degree of waveform deformation or distortion. The output of the non-linear circuit 64 is input to an adder 69 via a multiplier 66, and the non-linear circuit The output of 65 is a multiplier 68
, And is added to the output from the multiplier 67 and output as prediction data. The multiplier 66, the multiplier 67 and the multiplier 6
8, the combination ratio between the waveform data deformed by the non-linear circuits 64 and the non-linear circuits 65 and the waveform data bypassing the non-linear circuits 64 and 65 can be set, and the gain of the synthesis-side predictor can be set. The delay time of the delay circuit 62 is set such that the delay time of the path from the input to the output of the synthesis-side predictor corresponds to the pitch of the waveform generated from the sound source 8. According to the synthesizing unit 30, the LPF 61 is made secondary and the nonlinear circuit 65 is added, so that the waveform shape can be changed more variously. FIG. 6 shows the number of calculation steps in FIG.
Another configuration example of the synthesizing unit 30 when the number of channels increases as shown in FIG. In the synthesizing unit 30, the input waveform data is changed in frequency characteristics by an equalizer 71 and input to a delay circuit 72. This delay circuit 72
Has a delay time set so as to substantially correspond to the pitch of the waveform generated by the sound source 8 in the entire loop. The waveform data delayed by the predetermined time by the delay circuit 72 is 2
The signals are input to APFs 73 and 74 that are connected in cascade.
The APFs 73 and 74 allow signals in all frequency ranges to pass therethrough, but have a characteristic that the phase shift amount of the output signal varies according to the signal frequency.
It can be shifted slightly depending on the coefficient. Also, APF
If one of 73 and 74 is used as the delay time adjusting means, the delay time of the path from the input to the output of the predictor can be adjusted so as to match a predetermined pitch.
The waveform data from the APFs 73 and 74 is
And input to the non-linear circuit 75,
The waveform shape is distorted by, for example, limiting the peak portion of the input waveform data. The output of the non-linear circuit 75 is input to the adder 78 via the multiplier 77, added to the output of the multiplier 76, and output as prediction data. The multiplier 76 and the multiplier 77 set the synthesis ratio of the waveform data deformed by the non-linear circuit 75 and the waveform data bypassing the non-linear circuit 75, and also set the gain of the synthesis side predictor. ing. According to the synthesizing unit 30, the LPF is replaced with the equalizer 71, and the waveform shape can be changed more variously because the APF 74 is increased. As described above, according to the present invention, it is possible to variously change the tone color as the reproduced sound only by changing the allocation ratio of the limited number of operation steps of the DSP. For this reason, it is possible to provide a high-quality digital signal processor for waveform change with a small configuration. As described above, the present invention increases the number of constituent elements of the synthesis-side predictor as compared with the analysis-side predictor.
Even with the processing of a limited number of calculation steps, it is possible to change the waveform shape that can change various timbres, and it is possible to effectively use resources.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an electronic musical instrument using a digital signal processor for changing a waveform according to the present invention. FIG. 2 is a block diagram of a digital signal processor for changing a waveform according to the present invention. FIG. 3 is a diagram illustrating an allocation ratio of the number of operation steps of an analysis unit and a synthesis unit. FIG. 4 is a diagram illustrating a configuration of a predictor of an analysis unit and a synthesis unit. FIG. 5 is a diagram illustrating another configuration of a predictor of an analysis unit and a synthesis unit. FIG. 6 is a diagram illustrating still another configuration of the predictor of the synthesis unit. FIG. 7 is a diagram illustrating the principle of conventional compression. FIG. 8 is a diagram showing blocks of a conventional compressor and decompressor. [Description of Signs] 1 Keyboard 2 Wheel 3 CPU 4 RAM 5 ROM 6 Display 7 Panel Switch 8 Sound Source 9 DSP 10 DAC 11 Sound System 12 Bus 21, 22, 31, Adder 23 Analysis Predictor 24 Synthesis Predictor

Claims (1)

(57) [Claim 1] An input signal having a delay time corresponding to a cycle of an input signal and a next input signal are calculated using the input signal input so far and a prediction parameter. An analysis unit that includes an analysis-side prediction unit that performs a prediction calculation, an addition unit that subtracts a prediction signal output from the analysis-side prediction unit from an input signal, and outputs a residual signal; The output signal having the same delay time as that of the prediction means and the next synthesized output signal are predicted using the output signal output so far and a prediction parameter different from the prediction parameter of the analysis-side prediction means. A wave for performing an operation of a synthesizing unit including synthesis-side prediction means and addition means for generating a next output signal by adding a prediction signal output from the synthesis-side prediction means to the residual signal. In the digital signal processing apparatus for shape change, the number of operational steps to be assigned to the analysis unit, the alloy <br/> generating unit digital signal processor for waveform change, characterized in that it has less than calculating the number of steps assigned to.