JP3431362B2 - Heterojunction semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a heterojunction semiconductor device, _{particularly, In t Al 1-t As} / In y Al 1-y
P / In _x Ga _1-x As heterojunction, or In _t Al _1-t
The present invention relates to a heterojunction semiconductor device using an As / In _y Al _{1- y} P / InP heterojunction.

[0002]

2. Description of the Related Art In a heterojunction between an undoped semiconductor having a high electron affinity and a highly doped semiconductor having a low electron affinity, a semiconductor having a low electron affinity becomes an electron supply layer due to discontinuity of conduction band edges. A two-dimensional electron storage layer having high mobility (hereinafter, also referred to as a two-dimensional electron layer) is formed on the semiconductor side having a large electron affinity.

By forming such a heterojunction on an InP substrate, a high electron mobility transistor (hereinafter, HEMT) using this two-dimensional electron layer as a current channel.
Called. ) Is attracting attention as a high-frequency low-noise device.

For example, Japanese Unexamined Patent Publication No. 6-163601 (reference 1), IEEE Transactions Electron Devices, 19
October 1994, Vol. 41, No. 10, 1685-1689 (reference 2) and
IEEE Electron Devices Letters, September 1991, Volume 12
As disclosed in No. 9, 483-485 (reference 3), I
In HEMTs using In _x Ga _1-x As or InP as a channel on an nP substrate, the semiconductor currently used as the main material for the electron supply layer is In _0.52 Al _0.48.
It is As.

[0005]

[Problems to be Solved by the Invention] However, InP
In a HEMT having a channel of In _x Ga _1-x As or InP formed on a substrate, In is used as an electron supply layer.
_{When 0.52} Al _0.48 As is used, there are the following problems.

First, In _0.52 Al forming the electron supply layer
_Since the Al composition of _0.48 As is high,
A high-density deep level is observed at the n _0.52 Al _0.48 As / In _x Ga _1-x As interface. As a result, there is a problem in that the phase delay of the two-dimensional electrons with respect to the modulation of the gate potential and the decrease of the two-dimensional electron concentration occur.

In addition, N. Takahashi, 1995 Int. Conf. InP
As disclosed in & Related Materials, Sapporo (Reference 4), since the In _0.52 Al _0.48 As electron supply layer is thermally unstable, there is also a problem that the operating state of the device changes depending on the history of heat treatment. .

The two-dimensional electron concentration Ns is expressed by the following equation (1).

Ns = [2εN (ΔEC−EF) / q] ^1/2 (1) In the above formula (1), ε is the dielectric constant of the channel layer,
N is the electron concentration of the electron supply layer, ΔEC is the degree of discontinuity of the conduction band edge, EF is the Fermi level, and q is the electron charge amount.

As shown in the above equation (1), the larger the degree of discontinuity of the conduction band edge of the heterojunction, the higher the two-dimensional electron concentration, and further improvement of HEMT characteristics can be expected. Therefore, in the In _0.52 Al _0.48 As / In _x Ga _1-x As heterojunction or the In _0.52 Al _0.48 As / InP heterojunction, in order to improve the two-dimensional electron concentration, an InAlAs electron supply layer containing more Al is used. Must be used.

The present invention has been made in order to solve the above-mentioned problems, and In _x formed on an InP substrate.
HEM using Ga _1-x As or InP layer as a channel layer
In T, it is an object to obtain a heterojunction semiconductor device capable of reducing the Al composition of the electron supply layer and improving the two-dimensional electron concentration and heat resistance.

[0012]

A heterojunction semiconductor device according to the present invention comprises a channel layer made of undoped InGaAs forming a heterojunction portion formed on a semi-insulating InP substrate, and a heterojunction of the channel layer. An electron supply layer made of n-type InAlP for supplying electrons to the channel layer so that an electron storage layer is formed at the interface, and the electrons.
InAlAs Schottky contact layer directly on the supply layer
And are equipped with. Thereby, the above object is achieved.

Here, the heterojunction semiconductor device preferably has a Schottky contact layer made of undoped InAlAs that forms a Schottky junction with the gate electrode.

The heterojunction semiconductor device according to the present invention comprises a channel layer made of undoped InP forming a heterojunction portion formed on a semi-insulating InP substrate, and electrons are accumulated at the heterojunction interface portion of the channel layer. N-type InAl supplying electrons to the channel layer so that a layer is formed
An electron supply layer made of P , and InA directly on the electron supply layer.
lAs Schottky contact layer . Thereby, the above object is achieved.

The heterojunction semiconductor device preferably has a Schottky contact layer made of undoped InAlAs that forms a Schottky junction with the gate electrode.

The operation will be described below.

In the present invention, undoped In _x Ga _1-x As or undoped In is formed on a semi-insulating InP substrate.
A heterojunction portion including a P _- type channel layer and an n-type In _y Al _1-y P electron supply layer is formed. In this heterojunction, a conduction band edge discontinuity forms a two-dimensional electron storage layer in the channel layer.

In order to further improve the HEMT characteristics,
It is conceivable to increase this two-dimensional electron concentration, but it requires a heterojunction with a large conduction band edge discontinuity. According to the heterojunction between the n-type In _y Al _1-y P electron supply layer and the channel layer made of undoped In _x Ga _1-x As or undoped InP, conventional In _0.52 Al
Al lower than heterojunction using _0.48 As electron supply layer
A large conduction band discontinuity is obtained in composition. By lowering the Al composition of the compound semiconductor forming the electron supply layer in this way, the deep levels observed in the electron supply layer and at the interface can be reduced. Further, the n-type In _y Al _1-y P electron supply layer has higher heat resistance than the conventional InAlAs electron supply layer.

By providing the InAlAs Schottky contact layer for the gate electrode, part of the leak current from the gate electrode to the semiconductor layer is reflected by the barrier at the interface between the InAlAs Schottky contact layer and the InAlP electron supply layer. Therefore, the gate leak current can be reduced.

[0020]

First, the basic principle of the present invention will be described.

First, as an electron supply layer, n-type In _y Al _1-y
Undoped In _x Ga _1-x A as a channel layer using P
The reason for using s or undoped InP will be described.

To increase the two-dimensional electron concentration, a heterojunction having a large conduction band edge discontinuity is required. Heretofore, no conduction band edge discontinuity of In _y Al _1-y P / In _x Ga _1-x As heterojunction has been reported, and the inventors of the present invention have conducted experiments for the first time on In _0.75 Al _0.25 P / In _0.53 Ga. _0.47
The conduction band edge discontinuity of the As heterojunction was measured.

FIG. 3 shows In _0.75 Al _0.25 P / In _0.53 G
FIG. 3 is a cross-sectional view showing an element structure formed by stacking epitaxial growth layers for measuring the conduction band edge discontinuity of an a _0.47 As heterojunction. In FIG. 3, 1 is n-type InP
The substrate 2 is an n-type InP buffer layer having a film thickness of 1000 nm,
3 is an In _0.53 Ga _0.47 As layer having a film thickness of 1000 nm, 4 is an undoped In _0.75 Al _0.25 P layer having a film thickness of 17 nm, 5 is a Schottky metal electrode, and 6 is an ohmic electrode.

FIG. 4 shows In _0.75 Al _0.25 P / In _0.53 G
FIG. 6 is a diagram showing an energy band structure when the depletion layer thickness becomes zero in an a _0.47 As Schottky junction. In FIG. 4, EF is the Fermi level, EC is the conduction band lower end energy level, and ΔEC is the conduction band lower end energy level difference (hereinafter,
It is simply called the conduction band edge discontinuity. ), Vi is the bias voltage when the depletion layer thickness at the Schottky junction becomes zero, Φ
b indicates the Schottky barrier height.

The Fermi level EF is In _0.53 Ga _0.47 As
Since it can be calculated from the carrier concentration in the layer, as shown in FIG. 4, if the bias voltage Vi and the Schottky barrier height Φb when the depletion layer of the Schottky junction becomes zero, the conduction band edge discontinuity can be obtained. ΔEC can be extracted.

In _0.75 Al _0.25 P / In _0.53 shown in FIG.
5 and 6 show the results of measuring the current-temperature (IT) characteristics and the capacitance-voltage (CV) characteristics of the Ga _0.47 As Schottky junction. As shown in FIG.
In the low temperature region of 10 ° C. or lower, the channel current which does not substantially depend on the temperature is dominant, and in the high temperature region of 10 ° C. or higher, the thermal radiation current which exponentially increases with the increase of the temperature is dominant. The Schottky barrier height Φb can be extracted from the slope of the current-temperature curve in the high temperature region by using the thermal radiation model of the Schottky junction.

On the other hand, as shown in FIG. 6, the bias voltage Vi when the depletion layer thickness of the Schottky junction becomes zero can be obtained from the x-axis intercept of the 1 / C ² -V curve.

From the IT characteristics of FIG. 5, Φb = 0.90 eV
Is obtained, ΔEC-Φb = 0.28eV from the bias voltage Vi is obtained based on the C-V characteristics of FIG. 6, an In _0.75 from these values _{Al 0.25 P / In 0.53 Ga 0.47} As
As the conduction band edge discontinuity in the heterojunction, ΔEc =
0.62 eV was obtained.

Since the conduction band edge discontinuity is ΔEC = 0.20 eV in the InP / In _0.53 Ga _0.47 As heterojunction, the conduction band edge discontinuity of the In _0.75 Al _0.25 P / InP heterojunction is ΔEC Can be estimated to be 0.42 eV.

ΔE C in the heterojunction of the present invention is shown in Table 1 in comparison with the conventional one.

[0031]

[Table 1]

As shown in Table 1, by using the In _y Al _1-y P electron supply layer as the electron supply layer, a larger conduction band edge discontinuity Δ with a lower Al composition was obtained.
EC is obtained. Therefore, according to the present invention, it is possible to simultaneously reduce the Al composition of the electron supply layer and improve the two-dimensional electron concentration.

Further, as disclosed in the above-mentioned Document 4, a significant improvement in heat resistance is observed by introducing phosphorus into the electron supply layer, so that in the present invention, a heterojunction is formed together with the channel layer. Since the electron supply layer is made of InAlP, it is possible to improve the heat resistance of the heterojunction portion.

Embodiments of the present invention will be described below with reference to the drawings. In the following figures, parts having the same function are given the same numbers.

(First Embodiment) FIG. 1 is a sectional view showing the structure of a heterojunction semiconductor device according to the first embodiment of the present invention. In the figure, 101 is a HEMT as a semiconductor device of the first embodiment, and has a semi-insulating property I
On the nP substrate 7, undoped In having a film thickness of 1000 nm is formed.
Through the P buffer layer 8, undoped I with a film thickness of 20 nm
An n _0.53 Ga _0.47 As channel layer 9a is formed.
On the channel layer 9a, an undoped I having a film thickness of 3 nm is formed.
n _0.75 Al _0.25 P spacer layer 10 interposed, film thickness 5 n
m n-type In _0.75 Al _0.25 P electron supply layer 11 is formed, and undoped In _0.52 having a film thickness of 15 nm is formed thereon.
Al _0.48 As barrier layer (Schottky contact layer) 12
Are formed.

A gate electrode 14 is formed on a predetermined region of the barrier layer 12, and n-type In _{0.53 having a} thickness of 2 nm is formed on both sides of the gate electrode 14 of the barrier layer 12.
Source electrode 15 via Ga _0.47 As contact layer 13
And the drain electrode 16 is arranged.

Here, the gate electrode 14 is the barrier layer 1
Al or T that forms a Schottky junction with
The source electrode 15 and the drain electrode 16 are made of i / Pt / Au, and are made of Au—Ge / Ni / Au which makes ohmic contact with the contact layer 13.

Further, the In _0.75 Al _{0. 25} P that constitutes the electron supply layer 11 and the spacer layer 10, but the InP constituting the substrate or the like has a lattice mismatch, the electron supply layer 11 and the spacer The layer 10 has a dislocation-free strained lattice structure because the sum of these thicknesses is not more than the critical film thickness.

In the HEMT of the first embodiment having such a configuration, the current supply layer is made of InAlP, so that the two-dimensional electron concentration is not reduced as compared with the HEMT using the conventional InAlAs current supply layer. The Al composition of the electron supply layer can be reduced, and thus the phase delay of the two-dimensional electron with respect to the modulation of the gate potential can be suppressed.

Further, as disclosed in Document 4, I
By introducing phosphorus into the nAlAs current supply layer, a significant improvement in heat resistance is observed. Therefore, the HEMT of this embodiment using InAlP as the electron supply layer also has good heat resistance. .

Further, a part of the leak current from the gate electrode to the semiconductor layer is reflected by the barrier at the interface between the InAlAs Schottky contact layer and the InAlP electron supply layer, and the gate leak can be reduced.

(Second Embodiment) FIG. 2 is a sectional view showing the structure of a heterojunction semiconductor device according to a second embodiment of the present invention. In the figure, 102 is a HEMT as a semiconductor device of the second embodiment, which is the undoped In of the HEMT 101 of the first embodiment.
_0.53 Ga _0.47 As In place of the channel layer 9a, a film thickness of 20 n
m undoped InP channel layer 9b is used. The other configuration is the HEMT 101 of the first embodiment.
Is the same as

Also in this HEMT 102, In _0.75 Al forming the electron supply layer 11 and the spacer layer 10 is formed.
_0.25 P and InP have a lattice mismatch, but electron supply layer 1
1 and the spacer layer 10 have a dislocation-free strained lattice structure because the sum of these thicknesses is not more than the critical film thickness.

The second embodiment having such a structure also has the same effect as that of the first embodiment.

Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments.

In the first and second embodiments, the n-type In _y Al _1-y P layer forming the electron supply layer has the composition ratio y of 0.75 and the film thickness of 5 nm. The composition ratio y and the film thickness are not limited to those in the above-described embodiment as long as the film thickness is equal to or less than the critical film thickness determined by the composition ratio y.

For example, Journal of Crystal Growth, 197.
According to the method disclosed in Vol. 27, pp. 118-125 (Reference 5), the critical film thickness of In _0.75 Al _0.25 P is about 11
nm, and In _0.75 A grown on the InP crystal region
As the l _0.25 P layer, one having a film thickness of less than that can be used.

In each of the above embodiments, the electron supply layer is formed on the upper side of the channel layer. However, the electron supply layer is
It may be formed on the lower side of the channel layer, or may be formed on both upper and lower sides of the channel layer.

In each of the above embodiments, the In _0.53 Ga _0.47 As layer lattice-matched to InP was used as the channel layer, but the composition of InGaAs forming the channel layer is
It is not limited to the above. Further, as InGaAs forming the channel layer, In _x Ga _1-x As (0.53 <x <1) containing a higher In composition may be used.

In each of the above embodiments, In _0.75 Al _0.25 P is used as the spacer layer, but the composition of InAlP in the spacer layer is not limited to this.

In each of the above embodiments, the barrier layer arranged on the electron supply layer is made of undoped In _0.52 Al.
_Although it has a single-layer structure made of _0.48 As, it may have a multi-layer structure made of a plurality of semiconductor layers having different constituent materials and composition ratios. For example, in the case of a two-layer structure, an In _0.52 Al _0.24 Ga _0.24 As layer with a film thickness of 10 nm is used on the lower side, and an In _0.52 Al _0.48 As layer with a film thickness of 10 nm is used on the upper side.

[0052]

As described above, according to the present invention, the heterojunction formed between the channel layer and the electron supply layer is
_{Since x} Ga _1-x As or InP and In _y Al _1-y P are heterojunctions, conventional In _x Ga _1-x As or I
Compared to the heterojunction between nP and In _0.52 Al _0.48 As,
A large conduction band discontinuity is obtained with a low Al composition. Therefore, the HEMT characteristics can be improved by increasing the two-dimensional electron concentration at the heterojunction interface of the channel layer.

Further, since the Al composition of the electron supply layer can be reduced, it is possible to prevent the phase delay of the two-dimensional electrons with respect to the modulation of the gate potential and the decrease of the two-dimensional electron concentration due to the high density and deep level. it can.

Further, In, which is a constituent material of the electron supply layer,
_y Al _1-y P is because it contains phosphorus, it is possible to significantly improve the heat resistance of the heterojunction formed between the electron supply layer and the channel layer.

Furthermore, InAl is applied to the gate electrode.
By providing the As Schottky contact layer, a part of the leak current from the gate electrode to the semiconductor layer is caused by InAl.
Since it is reflected by the barrier at the interface between the As Schottky contact layer and the InAlP electron supply layer, the gate leak current can be reduced.

[Brief description of drawings]

FIG. 1 is a sectional view showing a heterojunction semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a heterojunction semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a laminated structure of a plurality of epitaxial layers for measuring conduction band edge discontinuity of an In _0.75 Al _0.25 P / In _0.53 Ga _0.47 As heterojunction.

FIG. 4 is a diagram showing an energy band structure when the depletion layer thickness becomes zero in an In _0.75 Al _0.25 P / In _0.53 Ga _0.47 As Schottky junction.

FIG. 5 is a graph showing current-temperature characteristics of an In _0.75 Al _0.25 P / In _0.53 Ga _0.47 As Schottky junction.

FIG. 6 is a graph showing the capacitance-voltage characteristics of an In _0.75 Al _0.25 P / In _0.53 Ga _0.47 As Schottky junction.

[Explanation of symbols]

7 semi-insulating InP substrate 8 buffer layers 9a, 9b channel layer 10 spacer layer 11 electron supply layer 12 Schottky barrier layer 13 contact layer 14 gate electrode 15 source electrode 16 drain electrode 101, 102 HEMT EF Fermi level EC conduction band bottom energy Level ΔEc Conduction band edge discontinuity Vi Bias voltage when Schottky depletion layer thickness is zero Φb Schottky barrier height

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masafumi Shimizu 22-22 Nagaike-cho, Abeno-ku, Osaka City, Osaka Prefecture Sharp Corporation (56) References JP-A-5-160161 (JP, A) JP-A-7- 249758 (JP, A) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/338 H01L 29/778 H01L 29/812

Claims (2)

(57) [Claims] 1. A heterojunction semiconductor device having a heterojunction portion formed on a semi-insulating InP substrate, wherein the heterojunction portion is composed of an undoped InGaAs channel layer and a heterojunction of the channel layer. N-type InA that supplies electrons to the channel layer so that an electron storage layer is formed at the interface
and an InAlAs Schottky contact immediately above the electron supply layer.
And a heterojunction semiconductor device having a junction layer . 2. A heterojunction semiconductor device having a heterojunction portion formed on a semi-insulating InP substrate, wherein the heterojunction portion comprises a channel layer made of undoped InP and a heterojunction of the channel layer. N-type InA that supplies electrons to the channel layer so that an electron storage layer is formed at the interface
and an InAlAs Schottky contact immediately above the electron supply layer.
And a heterojunction semiconductor device having a junction layer .