JP3429446B2 - Semiconductor light emitting device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device such as a semiconductor laser device or a light emitting diode device and a method for manufacturing the same.

[0002]

2. Description of the Related Art As a conventional semiconductor laser device, a quantum well laser using a quantum well layer as an active layer which is a light emitting portion is known. This quantum well laser has various advantages such as reduction of operating current and improvement of noise characteristics.

In a quantum well laser, as a structure capable of increasing the confinement of light to the active layer, a separate confinement structure (SCH: Separate Concentration) is used.
(Finment Heterostructure)
There is.

By the way, the forbidden band width and the refractive index of the compound semiconductor layer are generally in inverse proportion to each other, and the Al mixed crystal ratio of the compound semiconductor layer containing Al and the forbidden band width are generally in proportional relation.

Therefore, the band diagram in the vicinity of the active layer in the quantum well laser of the SCH structure is, for example, as shown in FIG.
The result is as shown in 1.

This semiconductor laser device includes a multiple quantum well (M) including a plurality of quantum well layers 510 and a barrier layer 511.
QW: MultiQuantumWell) active layer 50
The first optical guide layer 502 and the second optical guide layer 503, which have a forbidden band width larger than that of the quantum well layer 510 with both outer sides of 1 being sandwiched therebetween.
Is provided. Then, an n-first cladding layer 504 and a p-second cladding layer 505 having a forbidden band width larger than those of the first light guide layer 502 and the second light guide layer 503 are provided so as to sandwich both outer sides thereof.

In this semiconductor laser device, carrier confinement is performed in the quantum well layer 510, and light confinement is performed in the first optical guide layer 502 and the second optical guide layer 503.

A semiconductor laser device having such an SCH structure is disclosed in, for example, Japanese Patent Publication No. 4-67354 and Japanese Patent Laid-Open No. 6-354.
No. 252508 is disclosed.

Of these, in the semiconductor laser device of Japanese Patent Publication No. 4-67354, impurities are added to the entire region of the optical guide layer, and in the semiconductor laser device of JP-A-6-252508, impurities are added to the entire region of the optical guide layer. Is not added.

[0010]

In the SCH structure described above, the light confinement efficiency is improved by increasing the thickness of the light guide layer, and a low threshold current can be obtained.
Therefore, in order to reduce the current, it is desirable to increase the thickness of the light guide layer.

However, when no impurities are added to the light guide layer as in the semiconductor laser device disclosed in Japanese Patent Laid-Open No. 6-252508, the layer resistance of the light guide layer increases, and further, the cladding layer and the light guide. There is a problem that an operating voltage increases because a potential barrier is generated between the layers.

On the other hand, when an impurity is added to the optical guide layer as in the semiconductor laser device of Japanese Patent Publication No. 4-67354, the impurity diffuses from the optical guide layer to the active layer during energization. As a result, non-radiative recombination centers are formed in the active layer, causing internal absorption loss and deteriorating the laser characteristics.

Further, conventionally, little detailed study has been made on the effect of impurity addition to the semiconductor layer adjacent to the active layer including the optical guide layer on the laser characteristics.

The same applies to the semiconductor laser devices other than the quantum well laser device, and the same applies to the light emitting diode device in which the cladding layers are provided on the upper and lower sides of the active layer.

The present invention has been made to solve the above problems of the prior art, and an object of the present invention is to provide a semiconductor light emitting device capable of reducing an operating voltage and preventing characteristic deterioration, and a manufacturing method thereof. To do.

[0016]

A semiconductor light emitting device of the present invention is a semiconductor light emitting device having an active layer and light guide layers provided above and below the active layer. Multiple
Between the quantum well layer and the plurality of quantum well layers.
A barrier layer and a multiple quantum well layer
And at least one of the light guide layers is a rare impurity region.
An impurity doped region, wherein the impurity rare region is the active layer
Is located on the side close to the
It is set smaller than the forbidden band width of the pure rare area,
Further, the forbidden band width of the impurity-added region depends on the barrier layer.
The quantum well is set smaller than the forbidden band and
The band gap is set to be larger than the band gap, thereby achieving the above object.

[0017]

The semiconductor light emitting device of the present invention is a semiconductor light emitting device having an active layer and an optical guide layer provided on one of the upper and lower sides of the active layer , wherein the active layer comprises a plurality of quantum well layers.
And a barrier layer sandwiched between each of the plurality of quantum well layers
Consists of a multi-quantum well layer made of a, the light guide layer, and an impurity rare region and impurity doped region, said impurity rare regions is disposed on a side closer to the active layer, the impurity
The forbidden band width of the added region is greater than the forbidden band width of the impurity rare region.
Is also set to a small value.
The forbidden band width is set smaller than the forbidden band width of the barrier layer.
The width of the forbidden band of the quantum well layer.
The above-mentioned object is achieved by that.

An impurity intermediate concentration region may be provided between the impurity rare region and the impurity added region.

[0020]

When the impurity in the impurity-doped region of the optical guide layer is p-type, the carrier concentration of the impurity is preferably 4 × 10 ¹⁷ cm ⁻³ or more and 1.2 × 10 ¹⁸ cm ⁻³ or less. .

When the impurity in the impurity-doped region of the optical guide layer is n-type, the carrier concentration of the impurity is preferably 2 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ¹⁸ cm ⁻³ or less.

The impurity concentration in the impurity rare region can be set to 1/5 or less of the impurity concentration in the impurity added region.

The thickness of the impurity rare region is 3 nm or more 1
It is preferably 0 nm or less.

[0025] The impurity rare area, least also may be provided on the p-type optical guide layer.

It is preferable that, of the impurity rare regions, the thickness provided in the p- type optical guide layer is thicker than the thickness provided in the n-type cladding layer or the n-type optical guide layer.

The thickness of the impurity intermediate concentration region is preferably 3 nm or more and 10 nm or less.

[0028]

[0029]

[0030] before Symbol light guide layer is AlGaAs-based material, A
It may be made of 1GaInP-based material or InGaN-based material.

[0031]

[0032]

The operation of the present invention will be described below.

In the present invention, at least one of the cladding layers provided above and below the active layer has an impurity rare region and an impurity doped region, and the impurity rare region having a lower impurity concentration than the impurity doped region is active. Since it is arranged on the side closer to the layer, diffusion of impurities from the impurity-added region to the active layer during energization can be suppressed in the impurity-rare region.

According to another aspect of the present invention, since at least one of the light guide layers provided above and below the active layer has an impurity-added region, the resistance of the entire light guide layer can be lowered, and further, the light guide layer can be lowered. Since the diffusion potential between the layer and the cladding layer can be reduced, the operating voltage can be reduced. Further, since the impurity rare region having a lower impurity concentration than the impurity added region is arranged on the side closer to the active layer, diffusion of impurities from the impurity added region to the active layer during energization is suppressed by the impurity rare region. The reliability of the device can be improved.

In another aspect of the present invention, since the light guide layers provided on the upper and lower sides of the active layer have the impurity-added regions, the resistance of the entire light guide layer can be reduced, and further, the light guide layer and Since the diffusion potential with the clad layer can be reduced, the operating voltage can be reduced. Further, since the impurity rare region having a lower impurity concentration than the impurity added region is arranged on the side closer to the active layer, diffusion of impurities from the impurity added region to the active layer during energization is suppressed by the impurity rare region. The reliability of the device can be improved.

Further, an impurity intermediate concentration region having an impurity concentration lower than that of the impurity addition region and higher than that of the impurity rare region is provided between the impurity rare region and the impurity addition region, so that the impurity addition region is prevented from flowing during energization. Since impurities can be prevented from diffusing into the impurity rare region,
The reliability of the device can be further improved.

Particularly when the active layer is a quantum well layer,
Although the layer structure is likely to change and characteristic deterioration easily occurs even with slight diffusion of impurities during energization, the present invention is extremely effective because it is possible to suppress the diffusion of impurities into the active layer during energization.

When the impurity in the impurity-doped region of the light guide layer is p-type, the carrier concentration of the impurity is 4 ×.
It is preferably set to 10 ¹⁷ cm ⁻³ or more and 1.2 × 10 ¹⁸ cm ⁻³ or less. Further, when the impurity in the impurity-doped region of the optical guide layer is n-type, it is preferable to set the carrier concentration of the impurity to 2 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ¹⁸ cm ⁻³ or less. By setting this range, it is possible to effectively reduce the operating voltage and effectively suppress the characteristic deterioration due to non-radiative recombination of carriers in the impurity-added region. The impurity concentration in the impurity-added region of the clad layer may be any concentration as long as the clad layer has a function of confining carriers in the active layer.

If the carrier concentration of impurities in the impurity rare region is not more than ⅕ of the carrier concentration of impurities in the impurity added region, it is possible to effectively suppress the diffusion of impurities into the active layer during energization.

The impurity rare region has a thickness of 3 nm or more 1
It is preferably 0 nm or less. If the thickness is less than 3 nm, the impurities may diffuse into the active layer during energization to cause characteristic deterioration, and if the thickness exceeds 10 nm, the carrier injection from the impurity-doped region to the active layer is hindered due to the potential barrier. The voltage may increase. Regarding the thickness of the impurity-added region, in the case of a clad layer, it may be any thickness necessary for confining carriers in the active layer as a clad layer, and in the case of an optical guide layer, it may be any thickness necessary for optical confinement. Good.

The rare impurity region may be provided only on the p-type cladding layer or p-type optical guide layer side. This is because the p-type impurity has a larger diffusion coefficient than the n-type impurity, and the impurity is likely to diffuse into the active layer to cause characteristic deterioration. In this case p
Since it is only necessary to control the thickness of the rare impurity region of the mold,
The element design is easy.

Alternatively, of the rare impurity regions described above, the thickness provided in the p-type cladding layer or the p-type optical guide layer may be thicker than the thickness provided in the n-type cladding layer or the n-type optical guide layer. . In this case, for p-type impurities having a larger diffusion coefficient than n-type impurities, the thickness of the impurity rare region can be controlled according to the degree of diffusion thereof, so that controllability for device design can be improved. .

The thickness of the intermediate concentration region of impurities is preferably 3 nm or more and 10 nm or less. By setting this range, it is possible to effectively prevent impurities from diffusing from the impurity added region to the impurity rare region during energization, and also to prevent carrier injection from the impurity added region to the active layer.

When the active layer is composed of multiple quantum well layers, the forbidden band width of at least the impurity-doped region in the optical guide layer is smaller than the forbidden band width of the barrier layer and smaller than the forbidden band width of the quantum well layer. You can increase it. In general,
The Al mixed crystal ratio of the semiconductor layer containing Al and the forbidden band width are in a proportional relationship, and the Al mixed crystal ratio can be reduced by reducing the forbidden band width of the impurity added region. Impurity diffusion into the layer can be further reduced. Further, since diffusion of impurities from the impurity-added region to the active layer is reduced, the thickness of the rare-impurity region can be set thin, which is also effective for reducing the operating voltage.

Here, the forbidden band width of the entire optical guide layer including the rare impurity region and the intermediate impurity concentration region is smaller than the forbidden band width of the barrier layer and larger than the forbidden band width of the quantum well layer. However, if the forbidden band width of the impurity-added region is smaller than the forbidden band width of the rare impurity region, carrier confinement to the active layer can be performed in the rare impurity region. Therefore, it is possible to further reduce the Al mixed crystal ratio in the impurity-added region and further reduce the impurity diffusion from the impurity-added region to the active layer. Further, since the diffusion of impurities from the impurity added region to the active layer can be reduced, the thickness of the rare impurity region can be set thin, which is also effective for reducing the operating voltage.

The cladding layer or the optical guide layer is made of AlGa.
It may be an As-based material, an AlGaInP-based material, an InGaN-based material, or the like. In particular, the AlGaInP-based material is effective because it allows impurities to diffuse more easily than the AlGaAs-based material. Furthermore, for InGaN-based materials, AlGaIn
The growth temperature is higher than that of the P-based material, and diffusion of impurities is likely to occur, which is effective.

In the present invention, the impurity intermediate concentration region is formed by diffusing impurities from the impurity added layer to the impurity non-added layer due to the thermal history during crystal growth. It is possible to form the impurity rare region with good controllability by a simple manufacturing process. The temperature of the thermal history (crystal growth temperature) at this time is, for example, AlGa
For As-based materials, the temperature is 600 ° C to 800 ° C.
For nP-based materials, the temperature is 500 ° C. to 700 ° C.
The temperature is 900 ° C to 1100 ° C for the system material, but about 50 ° C to 200 ° C higher than the growth temperature of the active layer in order to control diffusion.
The impurity intermediate concentration region may be formed at a low temperature.

Of the above-mentioned impurity-free layers, the thickness of the layer provided in the p-type cladding layer or the p-type optical guide layer forming portion is n.
It may be thicker than that provided in the mold cladding layer or the n-type optical guide layer forming portion. In this case, for p-type impurities having a diffusion coefficient larger than that of n-type impurities, the thickness of the impurity-undoped region can be controlled by controlling the thickness of the undoped region according to the degree of diffusion thereof. The controllability of the device design can be improved.

[0050]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) In Embodiment 1, an example in which the present invention is applied to a ridge type semiconductor laser device will be described.

FIG. 1 is a sectional view of the semiconductor laser device according to the first embodiment.

This semiconductor laser device comprises an n-GaAs substrate 101, an n-GaAs buffer layer 102, and an n-Al.
_0.5 Ga _0.5 As First cladding layer 103, Al _0.35 Ga
_0.65 As first optical guide layer 104, non-doped multiple quantum well active layer 105, Al _0.35 Ga _0.65 As second optical guide layer 106, p-Al _0.5 Ga _0.5 As second cladding layer 10
7. A p-GaAs etching stop layer 108 is laminated. A p-Al _0.5 Ga _0.5 As third cladding layer 109 having a ridge stripe and a p-GaAs cap layer 110 are provided on the central portion of the etching stop layer 108. N on both sides of the central portion of the etching stop layer 108 so as to fill both sides of this ridge stripe
-Al _0.7 Ga _0.3 As current / light confinement layer 111, n-G
aAs current blocking layer 112, p-GaAs flattening layer 113
Is provided. The p-GaAs contact layer 1 is formed on the cap layer 110 and the planarization layer 113.
14 are provided. p-GaAs contact layer 11
4, a p-type electrode 150 is provided, and an n-type electrode 151 is provided on the surface of the substrate 101 opposite to the semiconductor layer growth surface.

This semiconductor laser device can be manufactured, for example, as follows.

First, an n-type is formed on the n-GaAs substrate 101 by the first MOCVD method (metal organic chemical vapor deposition).
GaAs buffer layer 102 (layer thickness 0.5 μm, dopant Si, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ), n-Al
_0.5 Ga _0.5 As First clad layer 103 (layer thickness 1.5 μ
m, dopant Si, carrier concentration 8 × 10 ¹⁷ c
m ^-3 ), Al _0.35 Ga _0.65 As first light guide layer 104,
Non-doped multiple quantum well active layer 105, Al _0.35 Ga
_0.65 As Second light guide layer 106, p-Al _0.5 Ga _0.5 A
s Second cladding layer 107 (layer thickness 0.25 μm, dopant Zn, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ), p-GaA
s Etching stop layer 108 (layer thickness 0.003 μm,
Dopant Zn, carrier concentration 1 × 10 ¹⁸ cm ^-3 ), p
-Al _0.5 Ga _0.5 As third cladding layer 109 (layer thickness 1.
0 μm, dopant Zn, carrier concentration 2 × 10 ¹⁸ cm
^-3 ) and the p-GaAs cap layer 110 (layer thickness 0.7 µ
m, dopant Zn, carrier concentration 3 × 10 ¹⁸ cm ⁻³ )
To grow.

Here, as shown in FIG. 2, the multi-quantum well active layer 105 includes three layers of Al _0.12 Ga _0.88 As quantum well layer 120 (layer thickness of 0.008 μm) and two layers of Al _0.35 Ga.
_0.65 As quantum barrier layer (barrier layer) 121 (layer thickness 0.00
5 μm) and a barrier layer 121 was sandwiched between the multiple quantum well layers 120. Then, the first light guide layer 104
Is an impurity-added layer (layer thickness 0.03 μm, dopant Si, carrier concentration 5 × 1) from the n− first cladding layer 103 side.
0 ¹⁷ cm ⁻³ ) and an impurity-undoped layer (layer thickness 0.02 μm) were grown. Further, the second optical guide layer 106 includes an impurity-undoped layer (layer thickness 0.02 μm) and an impurity-doped layer (layer thickness 0.03 μm, dopant Zn, carrier concentration 8 × 10 ¹⁷ cm ⁻³ ) from the active layer 105 side. And grew up.

Next, the cap layer 110 is processed into a convex stripe (upper surface width 2 μm) using the stripe resist pattern as a mask. The p-third clad layer 109 is processed into a ridge stripe (bottom width 2.5 μm) by using the convex stripe cap layer 110 as a mask. At this time, etching is stopped at the etching stop layers 108 on both outer sides of the ridge stripe. After the etching is completed, the resist is removed.

Then, n-Al _0.7 Ga _0.3 A is formed by the second MOCVD method so as to fill the ridge stripe.
s current light confinement layer 111 (layer thickness 0.6 μm, dopant Si, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ), n-GaA
s current blocking layer 112 (layer thickness 0.3 μm, dopant S
i, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) and p-GaAs flattening layer 113 (layer thickness 0.3 μm, dopant Zn, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) are grown.

Thereafter, the unnecessary layer grown directly on the cap layer 110 is removed by etching to remove the cap layer 110.
Is adjusted to a thickness of 0.3 μm, and the p-GaAs contact layer 114 (layer thickness 3 μm, dopant Zn, carrier concentration 1 × 10 ¹⁹ cm) is formed over the cap layer 110 and the planarization layer 113 by the third MOCVD method. ^-3 ) to grow.

The thermal history temperature (crystal growth temperature) during the MOCVD growth is 600 ° C. to 800 ° C., so that in the first light guide layer 104 and the second light guide layer 106, from the impurity-added layer to the impurity-non-added layer. Impurity diffusion of
The band diagram and the carrier concentration distribution in the vicinity of the active layer are as shown in FIG.

That is, the first optical guide layer 104 is formed in the impurity-doped region 130 (layer thickness 0.
03 μm) and impurity intermediate concentration region 131 (layer thickness 0.01
.mu.m) and the impurity concentration is ⅕ or less that of the impurity added region 130, and the impurity rare region 132 (layer thickness 0.01 μm
m) and On the other hand, the second light guide layer 106 is p-
From the second cladding layer 107 side, the impurity-doped region 140 (layer thickness 0.03 μm), the impurity intermediate-concentration region 141 (layer thickness 0.01 μm), and the impurity concentration of the impurities are 1/5 or less of the impurity-doped region 140. It is divided into a region 142 (layer thickness 0.01 μm). Therefore, the impurity doped region, the impurity intermediate concentration region, and the impurity rare region are formed by a simple process with good controllability due to the thermal history during the crystal growth of the semiconductor layer.

Finally, a p-type electrode 150 and an n-type electrode 151 are formed on the growth layer and the outer surface of the substrate 101, respectively. Here, the cavity length of the semiconductor laser device is 375 μm,
The end face of the light emitting side is set to 10% reflectance by a single layer film coating of Al ₂ O _3, the end face opposite to 75% reflectance by the multilayer film coating of Al ₂ O ₃ and Si.

Table 1 below shows device characteristics of the thus obtained semiconductor laser device of the first embodiment when it is operated at an optical output of 4 mW at room temperature. For comparison,
The semiconductor laser device of Comparative Example 1 manufactured in the same manner as in Embodiment 1 except that no impurities were added to the entire area of the light guide layer, and the embodiment 1 except that impurities were added to all areas of the light guide layer. The device characteristics of the semiconductor laser device of Comparative Example 2 manufactured in the same manner are shown in Table 1 below.

[0064]

[Table 1]

As can be seen from Table 1, the first embodiment
Can reduce the operating voltage, the operating current, and the element resistance. On the other hand, in the semiconductor laser device of Comparative Example 1 in which the entire region of the light guide layer is not doped, the operating current can be reduced as in the semiconductor laser device of the first embodiment, but the resistance of the light guide layer is reduced. Since it becomes large, the element resistance increases, and a potential barrier is generated between the cladding layer and the optical guide layer, so that the operating voltage increases. Further, the semiconductor laser device of Comparative Example 2 in which impurities are added to the entire optical guide layer is
Although the operating voltage and the device resistance can be reduced as in the semiconductor laser device of the first embodiment, the laser characteristics are deteriorated due to the impurity diffusion from the light guide layer to the active layer during energization, and the operating current is increased.

In FIG. 3, when the carrier concentration of the impurity doped region of the first optical guide layer 104 is fixed to 5 × 10 ¹⁷ cm ⁻³ and the carrier concentration of the impurity doped region of the second optical guide layer 106 is changed. Shows the change of the operating voltage of. Also, FIG.
Then, the carrier concentration of the impurity-doped region of the second optical guide layer 106 is fixed to 8 × 10 ¹⁷ cm ⁻³ , and the first optical guide layer 10 is
4 shows changes in the operating voltage when the carrier concentration in the impurity-added region 4 is changed.

As can be seen from FIGS. 3 and 4, the carrier voltage in the impurity-added region increases and the operating voltage decreases.

For example, it is desirable to set the carrier concentration of the first optical guide layer 104 to 2 × 10 ¹⁷ cm ^-3 or more as shown in FIG. 4 because the operating voltage can be reduced to 1.9 V or less. However, if the carrier concentration of the first light guide layer 104 is too high, non-emission centers peculiar to n-type impurities are generated, and the light emission efficiency of the first light guide layer 104 is reduced, which causes deterioration of laser characteristics. The carrier concentration of the light guide layer 104 is preferably set to 1 × 10 ¹⁸ cm ⁻³ or less.

On the other hand, the carrier concentration of the second optical guide layer 106 is preferably set to 4 × 10 ¹⁷ cm ^-3 or more as shown in FIG. 3 because the operating voltage can be reduced to 1.9 V or less. However, if the carrier concentration of the second light guide layer 106 is too large, the current spread in the second light guide layer 106 increases and the threshold current increases due to the increase of the reactive current. Therefore, the carrier concentration of the second light guide layer 106 increases. Is 1.2
It is desirable to set it to ^{x10 18} cm ^-3 or less.

Here, if the layer thickness of the impurity rare region of the optical guide layers 104 and 106 is too thick, carrier injection from the impurity added region to the multiple quantum well active layer is hindered due to the potential barrier, so that carriers are prevented. However, it is desirable to set the thickness to a level such that carrier injection is smoothly performed by tunneling this potential barrier, for example, 10 nm or less. However, if the layer thickness of the impurity rare region is less than 3 nm, the impurities diffuse into the active layer during energization, which causes characteristic deterioration. Therefore, it is desirable to set the layer thickness of the impurity rare region to 3 nm or more. If the impurity carrier concentration in the impurity rare region is ⅕ or less of the impurity carrier concentration in the impurity-added region, it is possible to effectively suppress the impurity diffusion into the active layer during energization.

Further, by providing an impurity intermediate concentration region by impurity diffusion between the impurity added region and the impurity rare region, the impurity intermediate concentration region and the impurity rare region can be diffused from the impurity added region during energization to the active layer. Since it can be suppressed in both regions, it is more effective in preventing characteristic deterioration. In addition, since the potential barrier continuously changes in the intermediate impurity concentration region, the potential barrier can be relaxed, and as a result, carriers can be smoothly injected into the active layer, further reducing the operating voltage. You can The intermediate impurity concentration region preferably has a thickness of 3 nm or more and 10 nm or less. By setting this range, it is possible to effectively prevent impurities from diffusing from the impurity added region to the impurity rare region during energization, and also to prevent carrier injection from the impurity added region to the active layer.

(Embodiment 2) In Embodiment 2, an example will be described in which the forbidden band width of the optical guide layer is smaller than the forbidden band width of the barrier layer and larger than the forbidden band width of the quantum well layer.

FIG. 5 is a sectional view of the semiconductor laser device according to the second embodiment.

In this semiconductor laser device, an n-Ga _0.5 In _0.5 P buffer layer 202,
n- (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P First cladding layer 2
03, (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P first optical guide layer 204, non-doped multiple quantum well active layer 205, (Al
_0.7 Ga _0.3 ) _0.5 In _0.5 P p- (A) having the second light guide layer 206 and the ridge stripe 209 portion and the flat portion.
l _0.7 Ga _0.3 ) _0.5 In _0.5 P The second clad layer 207 is laminated. A p-Ga _0.5 In _0.5 P cap layer 208 is formed on the ridge stripe 209 portion of the p-second cladding layer 207. The p-second cladding layer 2 is formed so as to fill both sides of the ridge stripe 209.
N-GaAs current light confinement layer 210 on the flat part of 07
Is provided. A p-type electrode 212 is provided on the cap layer 208 and the current / light confinement layer 210, and an n-type electrode 211 is provided on the surface of the substrate 201 opposite to the semiconductor layer growth surface.

This semiconductor laser device can be manufactured, for example, as follows.

First, the MOC is formed on the n-GaAs substrate 201.
The n-Ga _0.5 In _0.5 P buffer layer 20 was formed by the VD method.
2, n- (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P first cladding layer 203 (layer thickness 1.5 μm), (Al _0.7 Ga _0.3 ) _0.5
In _0.5 P second optical guide layer 204, non-doped multiple quantum well active layer 205, (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P second optical guide layer 206, p− (Al _0.7 Ga _0.3 ) _0.5 In
_0.5 P second clad layer 207 (layer thickness 1.5 μm) and p
-Ga _0.5 In _0.5 P cap layer 208 (layer thickness 0.3 μ
m) grow.

Here, the multi-quantum well active layer 205 is composed of three Ga _0.5 In _0.5 P quantum well layers 2 as shown in FIG.
20 (layer thickness 0.008 μm) and 2 layers (Al _0.5 G
a _0.5 ) _0.5 In _0.5 P barrier layer 221 (layer thickness 0.005
and the barrier layer 221 is sandwiched between the multiple quantum well layers 220. Then, the first light guide layer 204
Is an impurity-added layer (layer thickness 0.015 μm, dopant Si, carrier concentration 7 ×) from the n− first cladding layer 203 side.
10 ¹⁷ cm ^-3 ) and non-impurity added layer (layer thickness 0.02 μm)
And grew up. Further, the second light guide layer 206 is a layer not doped with impurities (layer thickness 0.02 μm) from the active layer 205 side.
And impurity-doped layer (layer thickness 0.015 μm, dopant Z
n, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ).

The thermal history temperature (crystal growth temperature) during the MOCVD growth is 500 ° C. to 700 ° C., so that in the first light guide layer 204 and the second light guide layer 206, from the impurity-added layer to the impurity-non-added layer. Impurity diffusion of
The band diagram near the active layer is as shown in FIG.

That is, the first optical guide layer 204 is formed by doping the impurity doped region 230 (layer thickness 0.
01 μm) and the impurity intermediate concentration region 231 (layer thickness 0.01
5 μm) and impurity rare region 232 (layer thickness 0.01 μm)
Divided into On the other hand, the second light guide layer 206 has a p-second
From the cladding layer 207 side, the impurity added region 240 (layer thickness 0.01 μm) and the intermediate impurity concentration region 241 (layer thickness 0.
015 μm) and the impurity concentration is divided into an impurity rare region 242 (layer thickness 0.01 μm). Therefore, the impurity doped region, the impurity intermediate concentration region, and the impurity rare region are formed by a simple process with good controllability due to the thermal history during the crystal growth of the semiconductor layer.

Next, the p-second cladding layer 207 and the cap layer 208 are etched to form the p-second cladding layer 20.
Etching is stopped so that the remaining thickness of the flat portion of No. 7 becomes 0.3 μm to form a ridge stripe 209 having a width of 5 μm.

Subsequently, an n-GaAs current / light confinement layer 210 (layer thickness 1.2 μm) is grown by MOCVD so as to fill both outer sides of the ridge stripe 209.

Finally, a p-type electrode 212 and an n-type electrode 211 are formed on the growth layer and the outer surface of the substrate 201, respectively. Here, the cavity length of the semiconductor laser device is 5 by the cleavage method.
The end face on the light emitting side of the resonator has a reflectance of 50 μm.
%, And the reflectance on the opposite end face is 85%.

In the semiconductor laser device of the second embodiment thus obtained, as shown in FIG. 6, the forbidden band widths of the first light guide layer 204 and the second light guide layer 206 are the quantum well layers 220. It is set to be larger than the forbidden band width and smaller than the forbidden band width of the barrier layer 221. Generally, since the Al mixed crystal ratio of the semiconductor layer containing Al and the forbidden band width are in a proportional relationship, the Al mixed crystal ratio (x = 0.3) of the first light guide layer 204 and the second light guide layer 206 is Multiple quantum well active layer 205
Is set to be larger than the Al mixed crystal ratio of the quantum well layer 220 (x = 0) and smaller than the Al mixed crystal ratio of the barrier layer 221 (x = 0.5). As a result, the Al mixed crystal ratio in the impurity-added region of the light guide layer can be set to be relatively small.
Therefore, it is possible to further reduce the impurity diffusion from the impurity-added region to the active layer, which is more effective in preventing the characteristic deterioration.

Further, since the diffusion of impurities from the impurity-added region to the active layer can be further reduced, the impurity diffusion from the impurity-added region during energization to the active layer can be achieved even if the layer thickness of the rare impurity region is reduced. Can be suppressed. Therefore, it is possible to reduce the layer thickness of the impurity rare region to facilitate the current injection from the optical guide layer to the active layer, so that the operating voltage can be reduced.

Further, since the forbidden band width and the refractive index of the compound semiconductor layer are generally in inverse proportion to each other, the refractive index of the entire light guide layer is increased to increase the light confinement and to reduce the threshold current. You can

When a forward voltage is applied between the n-type electrode 211 and the p-type electrode 212 in the semiconductor laser device of the second embodiment, the oscillation wavelength is 0.65 μm and the threshold current is 30 m.
A, the device characteristics when operating at a slope efficiency of 0.6 W / A of current-optical output characteristics and an optical output of 3 mW are an operating current of 35 mA and an operating voltage of 2V. On the other hand, when the impurity is not added to the entire area of the light guide layer, the operating voltage increases to 2.3V, and when the impurity is added to the entire area of the light guide layer, the operating voltage is 2V. Operating current is 50m due to impurity diffusion from the light guide layer to the active layer while the
Increase to A. As described above, in the second embodiment, it is possible to reduce the operating voltage and prevent the characteristic deterioration due to the increase of the operating current.

(Third Embodiment) In the third embodiment, the forbidden band width of the impurity doped region of the optical guide layer is made smaller than the forbidden band width of the barrier layer and larger than the forbidden band width of the quantum well layer. An example in which the forbidden band width of the impurity rare region is made larger than the forbidden band width of the impurity added region will be described.

In this semiconductor laser device, the structure of the semiconductor laser device is similar to that of the second embodiment shown in FIG.

In the third embodiment, as in the second embodiment, the first light guide layer 204 is formed due to the thermal history during crystal growth.
In the second optical guide layer 206, impurity diffusion from the impurity-added layer to the impurity-undoped layer occurs, and the band diagram in the vicinity of the active layer becomes as shown in FIG.

That is, the first optical guide layer 204 is formed in the impurity doped region 250 (layer thickness 0.
01 μm) and impurity intermediate concentration region 251 (layer thickness 0.01
5 μm) and impurity rare region 252 (layer thickness 0.01 μm)
Divided into On the other hand, the second light guide layer 206 has a p-second
From the clad layer 207 side, the impurity added region 260 (layer thickness 0.01 μm) and the intermediate impurity concentration region 261 (layer thickness 0.
015 μm) and the impurity concentration is divided into an impurity rare region 262 (layer thickness 0.01 μm). In this way, the impurity doped region, the intermediate impurity concentration region, and the impurity rare region are formed by a simple process with good controllability due to the thermal history during the crystal growth of the semiconductor layer.

Here, in the third embodiment, the impurity-doped region 250 of the first light guide layer 204 and the second light guide layer 2 are used.
The Al mixed crystal ratio of the impurity-doped region 260 of No. 06 is 0.2 or 0.3, and the quantum well layer 2 of the multiple quantum well active layer 205 is
The barrier layer 22 is larger than the Al mixed crystal ratio of 20 (x = 0).
It is set smaller than the Al mixed crystal ratio of 1 (x = 0.5). That is, as shown in FIG. 7, the forbidden band width of the impurity-doped region 250 of the first optical guide layer 204 and the impurity-doped region 260 of the second optical guide layer 206 is larger than the forbidden band width of the quantum well layer 220, and the barrier layer is larger. It is set smaller than the forbidden band width of 221. On the other hand, the impurity rare region 2 of the first light guide layer 204
52 and the impurity rare region 262 of the second optical guide layer 206.
The Al mixed crystal ratio (x = 0.5) of the impurity doped region 250 of the first light guide layer 204 and the impurity mixed region 260 of the second light guide layer 206 (x = 0.2 or 0.
Set larger than 3). That is, as shown in FIG. 7, the forbidden band widths of the impurity rare region 252 of the first light guide layer 204 and the impurity rare region 262 of the second light guide layer 206 are set to the impurity doped region 250 of the first light guide layer 204 and the impurity rare region 262 of the first light guide layer 204. The width is set to be larger than the forbidden band width of the impurity doped region 260 of the 2 light guide layer 206. As a result, carriers are confined in the active layer in the impurity rare region, and the Al mixed crystal ratio in the impurity added region of the optical guide layer can be set to be smaller than that in the second embodiment. Therefore, the diffusion of impurities from the impurity-added region to the active layer can be further reduced as compared with the second embodiment, which is more effective in preventing the characteristic deterioration.

Here, at least the impurity-added region 25
The forbidden band widths of 0 and 260 may be set to be larger than the forbidden band width of the quantum well layer 220 and smaller than the forbidden band width of the barrier layer 221, and the forbidden band widths of the intermediate impurity concentration regions 251 and 261 are as follows. 7, the band gap may be the same as that of the impurity rare regions 252 and 262, or the band gap may be the same as that of the impurity added regions 250 and 260 as shown in FIG. Alternatively, the forbidden band width may be set between the impurity rare region and the impurity added region.

The AlG shown in the second and third embodiments is used.
Since the aInP-based material is a material in which impurities are easily diffused as compared with the AlGaAs-based material, it is very effective to apply the present invention which can reduce the diffusion of impurities from the impurity-added region to the active layer.

(Embodiment 4) In Embodiment 4, an example in which the present invention is applied to a light emitting diode element will be described.

FIG. 9 is a sectional view of the semiconductor laser device according to the fourth embodiment.

This semiconductor laser device comprises a GaN buffer layer 302 and an n-GaN first layer on a sapphire substrate 301.
Cladding layer 303, non-doped single quantum well (SQW:
Single Quantum Well) Active layer 30
5, Al _0.2 Ga _0.8 N second cladding layer 305 and p-G
The aN contact layer 306 is laminated. n-first clad layer 303, active layer 304, second clad layer 3
05 and the contact layer 306 are the n-first cladding layer 30.
3 is formed on the mesa stripe 313 in which a part of the film 3 is exposed. An n-type electrode 320 is formed on the exposed portion of the n− first cladding layer 303, and a p-type electrode 321 is formed on the contact layer 306.

This semiconductor laser device can be manufactured, for example, as follows.

First, MOCV is formed on the sapphire substrate 301.
GaN buffer layer 302 (layer thickness 0.05 μ
m), the n-GaN first cladding layer 303 (layer thickness 3 μm,
Dopant Si, carrier concentration 5 × 10 ¹⁸ cm ⁻³ ), non-doped single quantum well active layer 304, Al _0.2 Ga _0.8 N
Second cladding layer 305 and p-GaN contact layer 30
6 (layer thickness 0.2 μm, dopant Mg, carrier concentration 5)
X 10 ¹⁷ cm ^-3 ) is grown.

Here, the single quantum well active layer 305 is a single Ga _0.2 In _0.8 P quantum well layer (layer thickness 0.003 μm).
m) was grown. Then, the second cladding layer 305 is
Impurity-non-added layer (layer thickness 0.03 μm) from the active layer 304 side
m) and an impurity added layer (layer thickness 0.07 μm, dopant M)
g, carrier concentration 5 × 10 ¹⁷ cm ⁻³ ).

The thermal history temperature (crystal growth temperature) during the MOCVD growth is 900 ° C. to 1100 ° C. As a result, impurity diffusion from the impurity-added layer to the impurity-non-added layer occurs in the second cladding layer 305, and the active layer Impurity rare region 310 (layer thickness 0.01 μm), intermediate impurity concentration region 311 (layer thickness 0.04 μm), and impurity added region 3 from the 304 side.
12 (layer thickness of 0.05 μm). Therefore, the impurity doped region, the impurity intermediate concentration region, and the impurity rare region are formed by a simple process with good controllability due to the thermal history during the crystal growth of the semiconductor layer.

After that, a circular resist mask is formed on the surface and dry etching is performed to form the mesa stripe 313.
Then, an n-type electrode 320 and a p-type electrode 321 are formed on the exposed portion of the n− first cladding layer 303 and the contact layer 306, respectively.

In the light emitting diode element of the fourth embodiment thus obtained, the impurity rare region 310 is provided on the p-type cladding layer side. Since the p-type impurity has a larger diffusion coefficient than the n-type impurity, the diffusion of the impurity (Mg) on the p-type cladding layer side into the active layer is controlled by the impurity rare region to reduce the operating voltage and deteriorate the characteristics. It can be prevented. Further, in this case, the characteristics can be optimized only by controlling the thickness of the impurity rare region on the p-type cladding layer side, which has an advantage that the design is easy.

When a forward voltage is applied between the n-type electrode 320 and the p-type electrode 321 in the light emitting diode element of the fourth embodiment, the emission wavelength is 0.45 μm and the operating current is 50.
mA and operating voltage of 4.5V were obtained. Moreover, it is possible to suppress the diffusion of impurities from the second clad layer to the active layer during energization, so that it is possible to prevent the deterioration of the device characteristics. On the other hand, when impurities are added to the entire region of the second cladding layer, the operating voltage is 4.5 V, but the characteristics deteriorate during energization. As described above, in the fourth embodiment, characteristic deterioration can be prevented without increasing the operating voltage.

The InGaN-based material shown in this embodiment has a growth temperature of 100 ° C. as compared with the growth temperature of AlGaAs-based material or AlGaInP-based material of 600 ° C. to 700 ° C.
Since it is as high as 0 ° C. ± 100 ° C., the degree of impurity diffusion is large. Therefore, it is very effective to apply the present invention which can reduce the diffusion of impurities from the clad layer to the active layer.

(Embodiment 5) In Embodiment 5, an example will be described in which an impurity rare region is provided on the side of the p-type cladding layer and the n-type cladding layer adjacent to the active layer.

FIG. 10 is a sectional view of the semiconductor laser device according to the fifth embodiment.

In this semiconductor laser device, a GaN buffer layer 402, a GaN first cladding layer 403, a non-doped single quantum well active layer 404, and a sapphire substrate 401 are provided.
Al _0.2 Ga _0.8 N second cladding layer 405 and p-GaN
The contact layer 406 is laminated. n-first clad layer 403, active layer 404, second clad layer 405
The contact layer 406 is formed on the mesa stripe 413 in which the first cladding layer 403 is partially exposed. The n-type electrode 4 is formed on the exposed portion of the first cladding layer 403.
20 is formed, and the p-type electrode 4 is formed on the contact layer 406.
21 is formed.

This semiconductor laser device can be manufactured, for example, as follows.

First, the MOCV is formed on the sapphire substrate 401.
GaN buffer layer 402 (layer thickness 0.05 μ
m), the GaN first cladding layer 403, the non-doped single quantum well active layer 404, the Al _0.2 Ga _0.8 N second cladding layer 405, and the p-GaN contact layer 406 (layer thickness 0.2).
μm, dopant Mg, carrier concentration 5 × 10 ¹⁷ c
m ⁻³ ).

Here, the single quantum well active layer 405 is a single Ga _0.2 In _0.8 P quantum well layer (layer thickness 0.003 μm).
m) was grown. Then, the first cladding layer 403 is
Impurity non-added layer (layer thickness 0.03 μm) from the active layer 404 side
m) and impurity added layer (layer thickness 2.97 μm, dopant S)
i, carrier concentration 5 × 10 ¹⁸ cm ⁻³ ) was grown.
The second clad layer 405 is composed of an impurity-undoped layer (layer thickness of 0.05 μm) and an impurity-doped layer (layer thickness of 0.05 μm, dopant Mg, carrier concentration 5) from the active layer 404 side.
X 10 ¹⁷ cm ^-3 ) was grown.

The thermal history temperature (crystal growth temperature) during the MOCVD growth is 900 ° C. to 1100 ° C., which causes impurity diffusion from the impurity-added layer to the impurity-non-added layer in the first cladding layer 403, and the active layer Impurity rare region 410 (layer thickness 0.01 μm), impurity intermediate concentration region 411 (layer thickness 0.02 μm), and impurity added region 4 from the 404 side.
12 (layer thickness 2.97 μm). On the other hand, in the second cladding layer 405, impurity diffusion occurs from the impurity-added layer to the impurity-non-added layer, and the impurity rare region 413 (layer thickness 0.02 μm) and the impurity intermediate concentration region 414 (layer thickness 0. 04 μm) and impurity-doped region 415
(Layer thickness 0.04 μm). Therefore, the impurity doped region, the impurity intermediate concentration region, and the impurity rare region are formed by a simple process with good controllability due to the thermal history during the crystal growth of the semiconductor layer.

Thereafter, etching is performed to partially expose the first cladding layer 303, and an n-type electrode 420 and a p-type electrode 421 are formed on the exposed portion and the contact layer 406, respectively.

As described above, in the light emitting diode element of the fifth embodiment, the layer thickness of the non-impurity-doped layer is larger on the p-type cladding layer side than on the n-type cladding layer side, and the p-type impurity is n-type. Since the diffusion coefficient is larger than that of the type impurities, the value of the impurity rare region can be adjusted to a desired thickness. As a result, the thickness of the impurity rare region can be adjusted according to the diffusion coefficient, so that there is an advantage that the degree of freedom in design for realizing a low operating voltage and prevention of characteristic deterioration during energization is improved.

When a forward voltage is applied between the n-type electrode 420 and the p-type electrode 421 in the light emitting diode element of the fifth embodiment, the emission wavelength is 0.45 μm and the operating current is 50.
mA and operating voltage of 4.5V were obtained.

The present invention is not limited to the above-mentioned embodiment, and the constitution of the quantum well active layer (number of quantum wells, mixed crystal ratio and layer thickness), layer thickness of each layer, Al mixed crystal ratio, dopant species. The present invention is also applicable to a semiconductor light emitting device having a carrier concentration different from the above.

The growth method is not limited to the MOCVD method, and MBE (molecular beam epitaxy) method, LPE (liquid crystal epitaxy) method, MOMBE method, ALE (atomic beam epitaxy) method and the like may be used. Although the intermediate impurity concentration region is formed by impurity diffusion from the impurity-added region to the impurity-non-added region, the semiconductor layer may be grown separately. Further, in order to control the diffusion, the growth temperature of the intermediate impurity concentration region is set to about 50 ° C. to 20 ° C. as compared with the growth temperature of the active layer.
It may be lowered by about 0 ° C.

Furthermore, the present invention can be applied to the case where a material system other than the above is used.

[0118]

As described above in detail, in the case of the present invention, the impurity rare region provided in the cladding layer or the optical guide layer suppresses the diffusion of impurities from the impurity added region to the active layer during energization. Therefore, it is possible to suppress an increase in operating current, prevent deterioration of device characteristics, and obtain a highly reliable semiconductor light emitting device. At the same time, the resistance of the entire optical guide layer can be reduced by the impurity-added region, and the diffusion potential between the optical guide layer and the cladding layer can be reduced, so that the operating voltage can be reduced.

Further , according to the present invention, the impurity intermediate concentration region provided between the impurity rare region and the impurity added region prevents impurities from diffusing from the impurity added region to the impurity rare region during energization. It is possible to further improve the reliability of the device.

[0120] In particular, in the case where the active layer is composed of a quantum well layer
Since the layer structure is likely to change due to slight impurity diffusion during energization to cause characteristic deterioration, it is possible to greatly improve the reliability of the element.

[0121] Further, by setting the respective predetermined ranges, the impurity concentration in the p-type and n-type impurity doped region of the light guide layer, while effectively reducing the operating voltage,
It is possible to effectively suppress characteristic deterioration due to non-radiative recombination of carriers in the impurity-added region.

[0122] Further, the carrier concentration of the impurity in the impurity rare regions by the following 1/5 of the carrier concentration of the impurity in the impurity doped region, it is possible to effectively suppress the diffusion of impurities into the active layer during energization .

[0123] In addition, 3nm the thickness of the impurity rare area
By setting the thickness to 10 nm or less, characteristic deterioration can be effectively suppressed and the operating voltage can be effectively reduced.

[0124] Also, at least p the impurity rare regions
By providing it on the side of the mold cladding layer or the p-type light guide layer, the device design can be facilitated and the manufacturing yield can be improved.

[0125] Also, among the impurity rare regions, the thickness of those provided in the p-type cladding layer or a p-type optical guide layer, n
By making it thicker than that provided in the mold cladding layer or the n-type optical guide layer, the controllability of the element design can be improved and the manufacturing yield can be improved.

[0126] Further, the thickness of the impurity intermediate density region 3
By setting the thickness to be not less than 10 nm and not more than 10 nm, it is possible to effectively prevent impurities from diffusing from the impurity doped region to the impurity rare region during energization, and improve the reliability of the element. Since it does not hinder the injection of carriers into the device, the operating voltage can be reduced.

[0127] When the active layer is a multiple quantum well layer, the forbidden band width of at least the impurity doped region,
By making it smaller than the forbidden band width of the barrier layer and larger than the forbidden band width of the quantum well layer, it is possible to reduce the Al mixed crystal ratio and further reduce the impurity diffusion from the impurity doped region to the active layer. it can. In this case, since the thickness of the impurity rare region can be set thin, the operating voltage can be sufficiently reduced.

[0128] Further, by the bandgap of the doped region to be smaller than the forbidden band width of the impurity rare regions, it is possible to further reduced the Al content of the impurity doped region, the reliability of the device It can be further improved.

[0129] In addition, likely to occur especially impurity diffusion AlG
Even with an aInP-based material or an InGaN-based material, it is possible to prevent the diffusion of impurities and improve the reliability of the device.

[0130] Further, since to diffuse the impurity into the undoped layer from an impurity-added layer by the thermal history during crystal growth to form an impurity intermediate density region, controlling the impurity doped region and the impurity intermediate density region and the impurity rare regions It can be manufactured with a good and simple manufacturing process. Therefore, it is possible to provide a semiconductor light emitting device with high reliability and low operating voltage at low cost.

Of the above-mentioned impurity-free layers, the thickness of the layer provided in the p-type cladding layer or the p-type optical guide layer forming portion is smaller than that of the layer provided in the n-type cladding layer or the n-type optical guide layer forming portion. By increasing the thickness too, the thickness of the impurity rare region can be controlled to a desired thickness. Therefore, the controllability of the element design can be improved and the yield can be further improved.

[Brief description of drawings]

FIG. 1 is a sectional view showing a configuration of a semiconductor laser device according to a first embodiment.

FIG. 2 is a diagram showing a band diagram and a carrier concentration distribution in the vicinity of an active layer in the semiconductor laser device of the first embodiment.

FIG. 3 is a graph showing the relationship between the carrier concentration in the impurity-doped region of the second optical guide layer and the operating voltage in the semiconductor laser device of the first embodiment.

FIG. 4 is a graph showing a relationship between a carrier concentration of an impurity added region of a first optical guide layer and an operating voltage in the semiconductor laser device of the first embodiment.

FIG. 5 is a sectional view showing a configuration of a semiconductor laser device according to a second embodiment.

FIG. 6 is a diagram showing a band diagram in the vicinity of an active layer in the semiconductor laser device according to the second embodiment.

FIG. 7 is a diagram showing a band diagram in the vicinity of an active layer in the semiconductor laser device according to the third embodiment.

FIG. 8 is a diagram showing a band diagram in the vicinity of an active layer in another semiconductor laser device according to the third embodiment.

FIG. 9 is a cross-sectional view showing a configuration of a light emitting diode device according to a fourth embodiment.

FIG. 10 is a sectional view showing a configuration of a light emitting diode element according to a fifth embodiment.

FIG. 11 is a diagram showing a band diagram in the vicinity of an active layer in a conventional semiconductor laser device.

[Explanation of symbols]

101, 201, 301, 401 Substrate 102, 202, 302, 402 Buffer layer 103, 203, 303, 403 First cladding layer 104, 204 First optical guide layer 105, 205, 304, 404 Quantum well active layer 106, 206 Second optical guide layer 107, 207, 305, 405 Second cladding layer 108 Etching stop layer 109 Third cladding layer 110, 208 Cap layer 111, 210 Current light confinement layer 112 Current blocking layer 113 Flattening layer 114, 306, 406 Contact layers 150, 212, 321, 421 p-type electrodes 151, 211, 320, 420 n-type electrodes 120, 220 Quantum well layers 121, 221 Barrier layers 130, 140, 230, 240, 250, 260, 3
12, 412, 415 impurity-added regions 131, 141, 231, 241, 251, 261, 3
11, 411, 414 impurity intermediate concentration regions 132, 142, 232, 242, 252, 262, 3
10, 410, 413 Impurity rare region

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-6-45698 (JP, A) JP-A-7-193321 (JP, A) JP-A-4-74487 (JP, A) JP-A-4- 49691 (JP, A) JP 8-18168 (JP, A) JP 5-291686 (JP, A) JP 8-321633 (JP, A) JP 9-129926 (JP, A) JP-A-7-288338 (JP, A) JP-A-3-270186 (JP, A) JP-A-7-321375 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01S 5/00-5/50 H01L 33/00

Claims (11)

(57) [Claims] 1. A semiconductor light emitting device having an active layer and optical guide layers provided above and below the active layer, wherein the active layer comprises a plurality of quantum well layers and a plurality of quantum well layers.
Multiple quantum well consisting of a barrier layer sandwiched between
At least one of the optical guide layers has an impurity rare region and an impurity doped region, the impurity rare region is arranged on the side close to the active layer , and the forbidden band width of the impurity doped region is formed. Is the prohibition of the impurity rare region
It is set to be smaller than the band width , and the forbidden band width of the impurity-added region is smaller than that of the barrier layer.
The quantum well is set smaller than the forbidden band and
A semiconductor light-emitting device whose width is set larger than the band gap of the layer . 2. A semiconductor light emitting device having an active layer and a light guide layer provided on one side of the active layer , the active layer comprising a plurality of quantum well layers and a plurality of quantum well layers.
Multiple quantum well consisting of a barrier layer sandwiched between
The light guide layer has a rare impurity region and an impurity doped region, the impurity rare region is arranged on the side close to the active layer , and the forbidden band width of the impurity doped region is Prohibition of rare impurity regions
It is set to be smaller than the band width , and the forbidden band width of the impurity-added region is smaller than that of the barrier layer.
The quantum well is set smaller than the forbidden band and
A semiconductor light-emitting device whose width is set larger than the band gap of the layer . 3. A process according to claim 1 having an impurity intermediate density regions between the impurity rare region and said impurity doped region or
2. The semiconductor light emitting device according to item 2 . 4. The impurity in the impurity-doped region of the light guide layer is p-type, and the carrier concentration of the impurity is 4 × 10 ¹⁷ cm ⁻³ or more and 1.2 × 10 ¹⁸ cm ⁻³ or less. The semiconductor light emitting device according to any one of 1 to 3 . 5. The impurity in the impurity-doped region of the light guide layer is n-type, and the carrier concentration of the impurity is 2 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ¹⁸ cm ⁻³ or less . 3. The semiconductor light emitting device according to any one of 3 above. 6. A semiconductor device as claimed in any of claims 1-5 impurity concentration is less than 1/5 of the impurity concentration in the impurity doped region in the impurity rare regions. 7. A semiconductor device as claimed in any of the claims 1-6 thickness impurity rare region is 3nm or more 10nm or less. Wherein said impurity rare region, less the semiconductor light emitting device according to any one of claims 1 to 7 which is also provided on the p-type optical guide layer. 9. Of the impurity rare region, the thickness of those provided in the p-type optical guide layer, the claims are thicker than 1 but provided in the n-type optical guide layer, either 3-7 The semiconductor light-emitting device according to. 10. The thickness of the intermediate concentration region of impurities is 3 n.
The semiconductor light emitting device according to any one of claims 3 to 9 , which has a length of m or more and 10 nm or less. 11. Before SL optical guide layer is AlGaAs material, semiconductor light-emitting device according to any one of claims 1 to 10 made of AlGaInP-based material or InGaN based material.