JP3425838B2 - Data save read method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data saving / reading method, and more particularly to a data saving / reading method suitable for an information processing device having a small amount of saved data.

[0002]

2. Description of the Related Art Conventionally, an information processing apparatus that saves and holds information when the power is cut off detects the power supply to the apparatus before it is turned off and writes the information that needs to be held in a non-volatile memory. Then, when the power of the device is turned on, the information stored in the non-volatile memory is read again and used.

The non-volatile memory for saving data is electrically rewritable EEPROM, FLA.
Sh Memory, NVRAM, etc. are used, and the contents of the non-volatile memory are rewritten and the information is saved whenever the opportunity to save the data occurs. On the other hand, although there is a method of using a secondary power source such as a battery as a means for holding information, a method of adopting a non-volatile memory is predominant due to the restriction of information holding time.

[0004]

However, in the above-mentioned conventional example, there is a disadvantage that a large-scale and expensive nonvolatile memory must be adopted as compared with the required amount of information. This means that non-volatile memory is inevitable for saving information, but the selection range of commonly available and usable elements is limited, and a much larger and more expensive element than the required amount of information must be used. Because there is no choice but to avoid it.

Further, in saving the saved information, it is strongly desired that the time required for the recording process is short, but there is a disadvantage that the rewriting process of the nonvolatile memory requires a corresponding time. That is, since a rewritable non-volatile memory that can be generally used takes time for rewriting processing, particularly for erasing the previous information, measures for securing electric power such as strengthening the auxiliary power supply in case of emergency cutoff. Had to take action.

Here, although an element having an improved rewriting characteristic is being developed, it is still very expensive.

[0007]

It is an object of the present invention to improve the inconvenience of the conventional example, and in particular, to replace the non-volatile memory with a relatively inexpensive one (such as PROM) and to shorten the time required for saving. By reducing the power supply,
It is an object of the present invention to provide a data saving / reading method that realizes cost reduction related to the information saving means.

[0008]

In order to achieve the above-mentioned object, in the invention according to claim 1, in the steady operation, the data is stored.
Data that needs to be saved and
Therefore, to retain the data in the volatile memory, temporarily save the data existing in the volatile memory to the non-volatile memory before shutting down the power of the device, and read the data from the non-volatile memory again when the device is restarted for use. The data saving / reading method is used to set the data save destination address so that the data is saved in a storage area that does not overlap with the data storage area already saved in the non-volatile memory. In the present invention, the saved data is stored in the unwritten area of the non-volatile memory.

According to the second aspect of the invention, the save destination address is set so that the data is saved in the storage area closest to the start address of the nonvolatile memory. According to the present invention, the saved data is stored in order from the unwritten area closest to the head address of the non-volatile memory.

According to the third aspect of the invention, there is provided a method of reading the data saved in the non-volatile memory, adding a code indicating invalidity to the data, and not reading the data to which the code indicating invalidity is added. I am collecting.
In the present invention, the data saved immediately before is read at the time of restart, but the data saved before that and remaining as it is is not read.

According to the fourth aspect of the invention, after saving the data in the non-volatile memory, the data is read before the power is turned off to check the correctness of the data. If there is a data error, the data is stored in the volatile memory. The method of saving the existing data to the non-volatile memory again is adopted. In the present invention,
It is confirmed whether or not the data once saved is correctly stored, and if it is not correct, the storage area of the non-volatile memory is re-saved again in order to avoid a hardware defective part of the non-volatile memory.

According to a fifth aspect of the present invention, a method is adopted in which a code indicating invalidity is added to the data having the data error and the data to which the code indicating invalidity is added is not read. In the present invention, the data that was not correctly stored in the non-volatile memory at the time of saving is not read when the device is restarted, but the data that is subsequently saved again is read when the device is restarted.

The above aims to achieve the above-mentioned object.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to FIG.
It will be described with reference to FIG.

FIG. 1 is a block diagram showing the configuration of this embodiment. The save information recording apparatus according to the present embodiment includes a non-volatile memory 1, a data writing unit 2 that writes data to the non-volatile memory 1, a data reading unit 3 that reads data from the non-volatile memory 1, and a predetermined period after the main power is turned off. It is provided with an auxiliary power supply 4 for keeping the power supply to the device elements over time and a control means 5 for controlling the operation timing of each of these device elements.

In the following description, the data saved in the non-volatile memory 1 by the writing means 2 by the control means 5 is called unit data 111.

In the control means 5, the format of the unit data to be written in the non-volatile memory 1 is defined in advance. An example of the structure of this unit data 111 is shown in FIG. The unit data shown in FIG. 2 includes original save information 113 (save data) to be saved in the non-volatile memory 1 and the save information 1
A check code 114 for determining whether 13 is correctly stored in the non-volatile memory 1 and a processing code 112 indicating the processing status of the unit data are provided.

The unit data 111 is saved by the control means 5 in a storage area which does not overlap with the storage area of the already stored unit data. The unit data 111 is saved in the storage area closest to the start address of the nonvolatile memory 1. The unit data 111 is written in the nonvolatile memory 1 by the writing unit 2.
When written in, the check code 114 refers to whether or not the unit data after the writing is correctly stored.

Next, the overall operation of the above embodiment will be described with reference to FIG.

When the main device is powered on, the save information recording device also operates (step S1). The control means 5 checks the unit data already stored in the nonvolatile memory 1 when the power is turned on. Therefore, first, the read address is set to the top address of the nonvolatile memory 1 (step S2), and this address is stored (step S3). Subsequently, the control means 5 reads the unit data from the set address (step S4), and the above-mentioned processing code 112 and check code 114 of the unit data.
It is determined whether or not the unit data is to be treated as valid data (hereinafter referred to as valid data) (step S5). As a result, if the data is valid data, after performing a predetermined process based on the save information 113 included in the unit data (step S7), it is necessary to clearly indicate that the unit data has been processed. The processing code 112 is rewritten to a predetermined code indicating invalid data (step S8).

Then, the address for reading the unit data from the non-volatile memory 1 is advanced by one data (step S9), and the processing from step S3 is repeated. As a result of advancing the processing, when the read address reaches the unwritten portion of the unit data which has not been written yet, the processing is passed to the original operation performed by the main device (steps S6 and S10). Here, the determination of the unwritten portion is performed based on the acquisition of the processing code corresponding to the unwritten area in the unit data reading process (step S4) (step S6).

When the processing of the main device is started (step S
10) It is sequentially determined whether or not it is necessary to save the information during the processing (step S12), and if necessary, the saved information is temporarily retained in the RAM (not shown) as unit data (step S13). ). After that, the original processing of the main device is executed (step S14), and if the processing related to the save information ends without any trouble, it is no longer necessary to hold the RA.
The unit data on M is erased (step S16), and the processing from step S10 is repeated.

On the other hand, when the main power supply of the main device is cut off during the processing of the main device (step S17), it is confirmed whether or not the save information is retained in the RAM (step S1).
8) If present, the unit data is copied to the non-volatile memory 1 (step S19). Then, after that, the auxiliary power supply 4 is cut off (step S20).

Therefore, at the time of power-off, only the process of writing a minimum amount of information needs to be performed, and a significant reduction in the save process time can be realized as compared with the conventional example in which the data in the nonvolatile memory needs to be erased. It is also possible to reduce the scale of the auxiliary power supply that supplies power during this time. Furthermore,
Since the saved information is searched and the validity of the unit data is identified and processed, there is no problem even if the previous information remains, and the PROM that cannot erase the data can be used as the nonvolatile memory.

[0025]

【Example】

Detailed examples of the above embodiment will be described below with reference to FIGS. 4 to 10.

FIG. 4 is a block diagram showing the configuration of the data saving / reading device according to the present embodiment. The data saving / reading device shown in FIG. 4 includes a PROM 1 for saving data.
1, a RAM 52 that temporarily holds data to be saved in the PROM 11, and a switch 22 that switches the PROM 11 between a write mode and a read mode. Further, it has decoders 21 and 31 for applying a signal for writing data to the RAM 52 or PROM 11, and a processor 51 for controlling the operation of these respective device elements. Here, reference numeral 41 indicates a power supply for operating the apparatus.

More specifically, in this embodiment, the processor 51 controls the operation timing of each of the above-mentioned components by controlling the control signal line 500 in accordance with a control program prepared in advance. Control signal line 5
00 is an I / O address signal 50 for designating an address
1, an I / O write strobe signal 502, an I / O read strobe signal 503, and an I / O data signal 504 for designating and reading data can be selectively output.

The decoder 21 receives the I / O address signal 501 and the I / O write strobe signal 502 output from the processor 51 as inputs, and writes the write strobe signal 201 to the RAM 52, the write strobe signal 202 to the PROM 11, and the like. And a control signal 203 for switching the switch 22.

On the other hand, the decoder 31 receives the I / O address signal 501 and the I / O read strobe signal 503 output from the processor 51 as inputs, and outputs the read strobe signal 301 to the RAM 52 and the read strobe signal 302 to the PROM 11. Output.

The PROM 11 in which data is written or read according to the output of these decoders is a general programmable read only memory. This P
The ROM 11 receives the write strobe signal 202 output from the decoder 21, the read strobe signal 302 output from the decoder 31, and the control signal 204 output from the switch 22 to record data or output recorded data. . The PROM 11 receives power 404 supplied from the power supply 41 via the switch 22 and executes a write operation. In this embodiment, the PROM 11 adopts a format in which all bits are 1 in the unwritten state and data is stored by writing 0 bits.

Also, the RAM 5 provided in the PROM 11
Reference numeral 2 denotes a general random access memory, which has a write strobe signal 201 output from the decoder 21 and a read strobe signal 301 output from the decoder 31.
Is received and operated, and temporarily stores data to be saved in the PROM 11.

The switch 22 provided between the PROM 11 and the power supply 41 inputs the control signal 204 to the PROM 11 according to the control signal 203 output from the decoder 21. The control signal 204 input to this PROM 11 is
The operation mode of the PROM 11 is selectively set to the write mode or the read mode. Further, the switch 22 supplies the power 404 supplied to the PROM 11,
Depending on the operation mode of the PROM 11, the electric power 402 normally supplied from the power supply 41 or the electric power 403 supplied for writing is selectively switched.

The power supply 41 for supplying power to the PROM 11 by operating the switch 22 is a main power supply 4 supplied externally.
Upon receiving 01, power for operation is supplied to each component of the data saving device in addition to the PROM 11 (wiring not shown). Further, the power supply 41 has a built-in battery Bt for charging a part of the main power supply power 401, and when the main power supply power is cut off, the battery Bt is connected to the PROM for a predetermined time.
11 has a function of supplying power necessary for the write operation of 11 and power for operating other device elements.

In this embodiment, the PROM 11 and RA
The data writing process and the data reading process in M52 are executed as follows.

In the processor 51, when a data write command to the PROM 11 is executed, the control signal line 5
The I / O address signal 501 and the I / O write strobe signal 502 are input to the decoder 21 through 00. Upon receiving this signal, the decoder 21 inputs the control signal 203 to the switch 22 to set the operation mode of the PROM 11 to the write mode, and also inputs the write strobe signal 202 to the PROM 11. As a result, the write command specifying the write address and the write data is executed. After the write command is completed, the write mode of the PROM 11 is released by the switch 22.

On the other hand, in the processor 51, the PROM
When a data read command from 11 is executed, the I / O address signal 501 and the I / O read strobe signal 503 are input to the decoder 31 through the control signal line 500. The decoder 31 that receives this signal is
The read strobe signal 302 is input to. As a result, the read command specifying the read address is executed.

In the processor 51, the RAM 5
2 is executed, the I / O address signal 50 is sent to the decoder 21 through the control signal line 500.
1 and the I / O write strobe signal 502 are input.
The decoder 21 receiving this signal inputs the write strobe signal 201 to the RAM 52. As a result, the write command specifying the write address and the write data is executed.

On the other hand, in the processor 51, the RAM 5
2 is executed, the I / O address signal 5 is sent to the decoder 31 through the control signal line 500.
01 and the I / O read strobe signal 503 are input. The decoder 31 receiving this signal inputs the read strobe signal 301 to the RAM 52. This allows
A read command specifying a read address is executed.

By the above operation, predetermined save information is written in and read from the PROM 11. here,
Writing and reading of the save information is executed by exchanging unit data having a fixed data length. The format of this unit data is shown in FIG.

The unit data 6 includes original save information 62 and
A check code 63 obtained by converting the save information through a predetermined algorithm and a processing code 61 indicating the progress of processing the unit information are provided. In this embodiment, the processing code 61 is composed of 1-byte data, the save information 62 is composed of M-2 bytes, and the check code 63 is composed of 1-byte data.

The processing code 61 includes an initial code (FF
h), holding code (EEh), invalid code (AAh),
There are a completion code (CCh) and other bad codes. The initial code (FFh) is a code for detecting an unwritten area of the PROM 11 (in this embodiment, the PROM 11 is in an unwritten state and all bits are 1).
And all the data indicated by 1 byte is FFh). The holding code (EEh) is a code given to all unit data at the time of writing. Invalid code (AA
h) is a code indicating that a data error is detected when the unit data is read. Completion code (CCh)
Is a code indicating the read unit data.

The unit data 6 is the processing code 61 described above.
5 and six types of check codes based on the evacuation information, as shown in FIG. That is, when the processing code 61 is the initial code (FFh) (in this case, since the corresponding storage location of the PROM 11 is unwritten, the check code naturally has all the bits of 1 like the initial code), the unwritten data Make 601.
If the processing code is the retention code (EEh) and the check code is an invalid code (a code that does not match the save information), defective data 602 is formed. If the processing code is a holding code (EEh) and the check code is a regular code (a code that matches the save information), the holding data 603
To make. If the processing code is an invalid code (AAh),
The defect processing data 604 is formed. When the processing code is the completion code (CCh) and the check code is the regular code, the processed code 605 is formed. If the processing code is other than the above, defective data 606 is formed.

Among them, the unwritten data 601, the defective data 602, the defective processed data 604, the processed data 605, and the defective data 606 are treated as invalid data which is no longer required to be read from the PROM in the process of reading the save information. , The held data 603 is the unit to be read because it is the unit data including the useful save information.

Here, in the PROM 11, it has already been mentioned that all bits are 1 in the unwritten state and 0 bits are written, but for this reason, the area in which FFh is written (that is, the unwritten area). ) Is overwritten with EEh, and A is written in the area where EEh is written.
Overwriting Ah or CCh is possible due to the bit relationship.

Next, the format of writing the unit data 6 to the PROM 11 will be described with reference to FIG. The PROM 11 is processed so that the unit data is stored in order from the unwritten area closest to the start address. That is, the processing code 1 byte, the save information M-2 bytes, and the check code 1 byte are added in order from the head address.

Next, FIG. 7 shows a main data map of the RAM 52. The unit data 6 will be stored in the predetermined address a next time.
The address on the PROM in which is written is stored. In addition, M from address b to b + M-1
The byte has unit data 6 to be written in the PROM 11.
An area is reserved for generating and temporarily holding.

Next, the overall operation of the above embodiment will be described with reference to FIGS. Since the flowcharts shown in FIGS. 8 to 10 more specifically show the main part of the flowchart of FIG. 3 described above for explaining the embodiment,
Also in the following description, FIG. 3 will be referred to as appropriate.

[Processing executed when the main device is activated]

Hereinafter, description will be added mainly based on FIG.

When the main device is set to the operating state, the data saving / reading device according to this embodiment is also set to the operating state. The processor 51, which is set to the operating state, stores the start address of the unit data to be read (top address register), the register (position register) that stores the number of bytes from the start address of the unit data, and the unit concerned. A register (check code register) for storing a check code of data is secured, and verification and reading of the unit data stored in the PROM 11 are executed.

First, the processor 51 sets 0 in the top address register and the position register respectively (step S31), and the first 1 of the unit data 6 stored for M bytes from the start address of the PROM 11 is started.
The byte (that is, the processing code) is designated (step S3)
1).

Subsequently, the processor 51 stores the currently set value of the top address register in the address a of the RAM 52 (step S32), and then 1 is added from the address obtained by adding the value of the top address register and the value of the position register. Read byte data (step S3)
3). The data read when the top address is 0 and the position is 0 is the processing code of the unit data recorded for M bytes from the start address of the PROM 11.

Processor 51 that has read the processing code
Determines whether the processing code is a holding code (EEh) (step S34), and if it is not a holding code (EEh), determines whether it is an initial code (step S35).
As a result, if it is not the initial code (FFh), M is added to the value of the top address register (step S4).
7), set the start address of the next unit data 6 (step S47). Then, the processing from step S32 described above is repeated. That is, no processing is performed on the invalid data, and the processing for the next unit data is started.

On the other hand, if the read processing code is the holding code (EEh) in the determination of step S34, the check code register is initialized (step S36) and the value of the position register is incremented by 1 (step S36). S37), 1-byte data is read out from the address of the PROM 11 in which the value of the top address register and the value of the position register are added (step S3).
8).

The value of the position register is M-1.
By determining whether or not it is determined whether or not the data just read is a check code (step S39). As a result, if it is not the check code 63, the value of the check code register and the read data value are passed through a certain check code calculation algorithm to calculate a new check code and then stored in the check code register (step S40). After that, the processing from step S37 is repeated. Here, the unit data stored in the PROM 11 is accompanied by the check code 63 generated based on the same algorithm as described above when the unit data is saved. Therefore,
If the unit data is correctly stored and read correctly, the value stored in the check code register and the read check code match at the time of confirming that the check code is read in step S39. It has become.

When the reading of the check code is confirmed in step S39, the processor 51 sets the PROM 11 in the writing mode through the switch 22 (step S41), and then the read check code is stored in the check code register. It is determined whether it is equal to the value (steps S42 and S43). If the comparison results match, the unit data is treated as valid data and processing corresponding to the contents of the save information 62 is executed (step S7, corresponding to step S7 in FIG. 3). Then, the completion code CCh is overwritten on the address where the processing code (holding code EEh) of the unit data is recorded (step S4).
4). As a result, the data is treated as invalid data from the next read, and will not be read when the device is started like this time (step S34).

On the other hand, if the check code is not correct in the determination of step S34, the invalid code AAh is overwritten on the address where the processing code (holding code EEh) of the unit data is recorded (step S).
45). This also causes the unit data to be treated as invalid data from the next read, and will not be read when the device is activated (step S34).

As described above, by the processing of steps S44 and 45, the data content check processing (from step S36) is omitted at the next power-on, and the processing time at power-on is shortened.

When the rewriting of the processing code is completed, the processor 51 releases the write mode of the PROM 11 (step S46). After that, M is added to the value of the top address register, the value of the position register is initialized, the first byte of the next unit data is designated, and the processing from step S32 is repeated.

In step S35 described above,
If the processing code read is the initial code,
The written unit data is inspected once, and the read address has reached the unwritten area. Therefore, the processing is executed by the main unit while holding the value of the top address register (Fig. Step S1 of 3
0).

[Unit Data Generation Processing During Processing of Main Device]

Hereinafter, description will be added mainly based on FIG.

A predetermined process by the main unit is started, and at the same time, the processor 51 determines that the addresses b to b on the RAM 52 are to be processed.
A storage area for unit data is secured at + M-1. Also, R
A RAM address register for designating an address on the AM 52 and the above-mentioned check code register are secured.

Various data generated by the processing of the main unit are sequentially judged whether or not they are data that needs to be saved (step S12, corresponding to step S12 in FIG. 3), and if it is judged to be necessary, the processor 51 The following processing is executed by.

First, the processor 51 initializes the check code register (step S51) and then sets the RAM address register to b + 1 (step S5).
2). As a result, the first byte of the save information storage area (b + 1 to b + M-2) on the RAM 52 is designated.

Then, the processor 51 generates the save information of the first byte (step S53) and writes it in the address on the RAM 52 designated by the RAM address register. At this time, the value of the check code register and now R
A predetermined check code is generated by passing the value of the data written in the AM 52 through the check code calculation algorithm described above (step S55). The generated check code is sequentially updated in the check code register.

Subsequently, the processor 51 increments the value of the RAM address register by +1 (step S56), and M
-The processing from step S53 is repeated until the save information of 2 bytes is stored in the RAM 52 (step S53).
57).

When the predetermined save information has been stored in the RAM 52, the value stored in the check code register at this point is the RAM address currently set, that is,
It is stored in the (b + M-1) th byte (step S58), and the holding code EEh is stored in the address b as a processing code (step S59). As a result, the RAM 52
Unit data is generated on the top.

Then, the processor 51 waits for the processing of the main device to be executed and ended (steps S14, S1).
5, S17, corresponding to FIG. 3). When the processing of the main device is completed in step S15, the completion code CCh is added to the processing code portion of the unit data generated on the RAM 52.
Is updated (steps S61 and 62), and the processes from step S12 are repeatedly executed according to the process of the main device (step S10 of FIG. 3).

If it is determined in step S12 that the saving of information is unnecessary, the processing of the main device is continued (step S10 of FIG. 3).

On the other hand, when the main power supply of the device is cut off during the processing of the main device in step S17, the main power supply voltage is not supplied to the power supply 41 and the output of the power supply 41 is the battery B
The power output is switched to the power output according to t, and the data saving process at the time of power shutdown shown in FIG.

[Data Saving Process at Power-Off]

Hereinafter, description will be added mainly based on FIG.

When the main power supply of the device is cut off, the processor 51 writes PRO to write or read unit data.
A top address register for setting the start address of the area of M11, a position register for specifying the number of bytes from the start of the unit data, a check code register for storing the check code of the unit data, and a RAM 52
A RAM address register for designating an address to read the unit data generated above is secured.

First, the processor 51 sets the value of the RAM address register to b and reads the data stored at the address b, that is, the processing code (step S7).
1). Then, the read processing code is the holding code (E
Eh) is determined (step S72), and if it is not the holding code (EEh), the evacuation process is not executed and the power supply 41 is kept on standby until the power output is stopped (step S20).

On the other hand, in step S72, if the read process code is the held data, the following data saving process is executed.

When the data saving process is started, the processor 51 acquires the address on the PROM where the unit data is to be written next from the address a of the RAM 52, and sets the value in the top address register. This allows
The head address of the PROM 11 into which the unit data is to be written is set (step S73). Subsequently, the processor 51 sets b in the RAM address register, sets the position register to 0, and sets an address on the RAM 52 to start reading unit data (step S74).

Then, the processor 51 uses the PROM 11
To write mode (step S75), RA
The data on the RAM 52 stored at the address obtained by adding the value of the M address register and the value of the position register are read, and the data is written to the address on the PROM 11 obtained by adding the value of the top address register and the value of the position register. . As a result, the unit data on the RAM 52 is copied by 1 byte to the unwritten area on the PROM 11 (step S76).

Subsequently, the processor 51 determines whether or not the value of the position register has reached M-1, and if it has not reached M-1, increases the value of the position register by +1 and repeats the processing from step S76. Run. As a result, the unit data on the RAM 52 is gradually copied to the unwritten area of the PROM 11.

When the position register reaches M-1 and copying of all the M-byte unit data is completed (step S77), the processor 51 releases the write mode of the PROM 11 and restores the original operation mode ( Step S79).

Subsequently, the processor 51 executes the verification process of the unit data just written, in the following procedure.

The processor 51 resets the value of the position register to 0, adds the value of the top address register, and adds the unit data 6 just written in the PROM 11.
The start address of the PROM (step S80)
Data is read from 11 (step S81).

Then, it is verified whether the read data is the holding code (EEh) (step S82),
If it is a holding code (EEh), the correctness of the saved information stored subsequently is verified. This save information verification processing may be executed in substantially the same manner as steps S36 to S43 of FIG. 8 described above (step S83), but step S83.
The process of 43 is omitted. Then, the correctness of the check code obtained in the check code verification process is judged (step S84).
Since the held data 603 is surely recorded on the storage device 11, the process waits until the power of the power supply 41 is stopped (step S20).

On the other hand, if the check code derived from the saved information is not a legitimate code in the determination of step S84, and if the read process code is not the holding code in the process of step S82, invalid data is detected. Since it has been detected, M is added to the value of the top address register of the PROM, and the head address of the PROM 11 is set in the unwritten area where the next unit data is to be written (step S85). Then, in order to copy the unit data on the RAM 52 to the PROM 11 again, the processing from step S74 described above is repeatedly executed. This recopying process is a measure for avoiding a bit defect in the PROM 11, and therefore is not repeated many times in reality.

As described above, according to the present embodiment, the unit data save destination address is set so as to save the unit data in a storage area that does not overlap with the unit data storage area already saved in the PROM. An inexpensive PROM can be adopted as the nonvolatile memory for saving data, and the cost of the device can be reduced. Further, unlike the conventional example, since the process of erasing the contents of the nonvolatile memory at the time of saving data is not required, the data saving process can be completed promptly, and the cost can be further reduced by downsizing the auxiliary power supply. be able to. Further, since the history of the saved data is left as it is in the PROM, it becomes possible to diagnose the abnormality of the device based on these data.

Since the save destination address is set so that the unit data is saved in the storage area closest to the head address of the PROM, the unit data can be used efficiently by storing the unit data from the head address of the PROM. Therefore, the storage capacity of the PROM can be effectively utilized.

Further, since the data saved in the PROM is read and the completion code is added to the data and the data added with the completion code is not read, the data saved previously is left as it is. However, it is possible to quickly read only the unit data required at the time of activation, and it is possible to prevent the time required for the read processing of the saved data from becoming long.

In addition to this, after saving the data in the PROM, the data is read before the power is turned off to check the correctness of the data. If there is a data error, the storage area is shifted and the data existing in the RAM is deleted. Since the data is saved again in the PROM, highly reliable data saving processing can be realized.

Further, since the code indicating invalidity is added to the data having the data error and the data to which the code indicating the invalidity is added is not read, the time required for the read processing of the saved data is further shortened. be able to.

[0091]

Since the present invention is constructed and functions as described above, according to this , the data is saved in the steady operation.
Data that needs to be saved beforehand.
Volatile memory and keep it in a volatile memory when the power is cut off.
Re of data, so set the save destination address of the unit data so as to retract the storage region which does not overlap with the storage area of the data already saved in the nonvolatile memory, power supply shielding
At the time of disconnection, only the process of writing the minimum amount of information should be performed.
For example, it is necessary to erase the data in the non-volatile memory.
Compared to this, it is possible to realize a significant reduction in the time for evacuation
In addition, the scale of the auxiliary power supply that supplies power during this time is also reduced.
Can be reduced. Furthermore, the evacuation information is searched and the unit data
Data is identified and processed so that previous information is retained.
PRO that can be erased without any problem even if it is
M can be used as a non-volatile memory. sand
That is, it is an inexpensive PR as a non-volatile memory for saving data.
OM can be adopted, and the cost of the device can be reduced. Further, unlike the conventional example, the process of erasing the contents of the nonvolatile memory at the time of saving data is not required,
The data saving process can be ended promptly, and the cost can be further reduced by downsizing the auxiliary power supply. Further, since the history of the saved data is left as it is in the non-volatile memory, it becomes possible to diagnose the abnormality of the device based on these data.

According to the second aspect of the present invention, the save destination address is set so that the data is saved in the storage area closest to the start address of the non-volatile memory. Therefore, the data is packed from the start address of the non-volatile memory. By storing it, it can be utilized without waste, and the storage capacity of the non-volatile memory can be effectively utilized.

According to the third aspect of the invention, the data saved in the non-volatile memory is read, a code indicating invalidity is added to the data, and the data to which the code indicating invalidity is added is not read. Even if the previously saved data is left as it is, only the data required at startup can be quickly read out, and it is possible to prevent the time required for the read processing of the saved data from becoming long. .

According to the fourth aspect of the invention, after saving the data in the non-volatile memory, the data is read before the power is turned off to check the correctness of the data. If there is a data error, the storage area is shifted. Since the data existing in the volatile memory is saved again in the non-volatile memory, highly reliable data saving processing can be realized.

According to the fifth aspect of the present invention, a code indicating invalidity is added to the data having a data error, and the data to which the code indicating the invalidity is added is not read out. It is possible to provide an unprecedented excellent data saving / reading method that can further reduce the time.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a configuration diagram showing a configuration of unit data.

FIG. 3 is a flowchart illustrating the overall operation of the embodiment shown in FIG.

FIG. 4 is a block diagram showing an embodiment of the present invention.

FIG. 5 is an explanatory diagram showing the structure and type of unit data.

FIG. 6 is an explanatory diagram showing a storage format of unit data in a PROM.

FIG. 7 is an explanatory diagram showing a storage format of main data in a RAM.

FIG. 8 is a flowchart showing a process at the time of startup of the embodiment shown in FIG.

9 is a flowchart showing a unit data generation process of the embodiment shown in FIG.

FIG. 10 is a flowchart showing a unit data saving process of the embodiment shown in FIG.

[Explanation of symbols]

1 Non-volatile memory 2 writing means 3 reading means 4 auxiliary power 5 Control means 6 unit data 11 PROM 21, 31 decoder 22 switch 41 power supply 51 processors 52 RAM 61 Processing code 62 Evacuation information 63 check code

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) G06F 12/16

Claims (2)

(57) [Claims] 1. A method for determining whether or not data needs to be saved in a steady operation, preserving the data that needs to be saved in a volatile memory in advance, and storing the data in the volatile memory before shutting down the power supply of the device. was temporarily saved in the nonvolatile memory, wherein a data saving reading method for use from the nonvolatile memory the data re-read by the at restart of the device, the data before the power shutdown, the non-volatile memory The save destination address of the data is set so that the data is saved in a storage area that does not overlap with the storage area of the data already saved, and the data is saved in the non-volatile memory before the power is cut off. Before the power is cut off, the data is read to check whether the data is correct. By removing, indicates invalid data with the data error at the restart
Add a code to write to the non-volatile memory.
A code indicating the effect is added and written to the nonvolatile memory.
The saved data is not read and the data saved in the non-volatile memory at the time of the restart.
Is read and a code indicating completion is added to the data
Then write to the non-volatile memory and code to indicate this completion
The data written in the nonvolatile memory with the
A data save and read method characterized by not being exposed. 2. The data save / read method according to claim 1, wherein the save destination address is set so that the data is saved in a storage area closest to a start address of the nonvolatile memory.