JP3408077B2 - Current mirror circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current mirror circuit, and more specifically, it is used as a reference voltage of a digital circuit, which is composed of MOS transistors, generates a constant current having the same current value, converts this constant voltage. Regarding improvement of a current mirror circuit.

[0002]

2. Description of the Related Art A conventional current mirror circuit will be described below. This circuit, as shown in FIG.
A first MOS transistor (TR1) having a channel first MOS transistor (TR1), a p-channel second MOS transistor (TR2), an n-channel third MOS transistor (TR3) and a resistor (R1). )
A constant current (I2) having the same current value as the constant current (I1) flowing from the resistor (R1) to the second MOS transistor (TR).
2) → flow to the third MOS transistor (TR3) side,
This is a circuit for converting these constant currents (I1, I2) into a voltage to generate a first reference voltage (V1) and a second reference voltage (V2) and outputting it to another circuit. One of the application examples is shown in FIG.
Shown in.

For example, in the case of a 5V power supply voltage (Vdd), the first reference voltage (V1) is 4V, and the second reference voltage (V
2) is 1 V, and the first reference voltage (V1) and the second reference voltage (V2) have symmetrical voltage values.
As shown in FIG. 5, the first reference voltage (V1) is output to the gate of the p-channel MOS transistor, and the second reference voltage (V2) is output to the n-channel MOS transistor.

The source of the first MOS transistor (TR1) is connected to the power supply voltage (Vdd) and the gate and drain thereof are connected to each other, and the source of the second MOS transistor (TR2) is connected to the power supply voltage (Vdd). And the gate is the first M
Connect to the gate of the OS transistor (TR1). The drain of the third MOS transistor (TR3) is connected to the drain of the second MOS transistor (TR2), its source is connected to the ground potential (GND), and its gate is connected to the drain. Second MOS
It is an element that converts the current (I2) flowing on the transistor (TR2) side into a voltage. Furthermore, the resistance (R1) is the first M
The drain of the OS transistor (TR1) and the ground potential (G
ND).

In addition, the first MOS transistor (TR
1) and the second MOS transistor (TR2) are paired to form a current mirror circuit, and therefore, those having the same operating characteristics are used. According to the above circuit, first, the first MOS transistor (TR1) is connected to the resistor (R1).
The constant current (I1) flows to the constant current (I1), and the constant current (I1) is the same as the constant current (I1) due to the operation of the current mirror circuit including the first MOS transistor (TR1), the second MOS transistor (TR2) and the resistor (R1). Constant current of current value (I
2) flows from the second MOS transistor (TR2) to the third MOS transistor (TR3). Constant current (I
1) is voltage-converted by the first MOS transistor (TR1) to generate the first reference voltage (V1), and the constant current (I2) is voltage-converted by the third MOS transistor (TR3) to generate the second voltage. Is generated and the first and second reference voltages (V1, V2) are output to an external circuit (not shown).

[0006]

The current mirror circuit described above has a first mirror circuit formed by a current mirror circuit including a first MOS transistor (TR1), a second MOS transistor (TR2) and a resistor (R1). The constant current (I2) having the same current value as the current generated on the MOS transistor (TR1) side is transferred to the second MOS transistor (TR2) side, and the first MOS transistor (TR1) and the second MOS transistor are transferred. The transistors (TR2) have the same gate voltage and are operated in the saturation region.

What is important in this operation is the saturation characteristic of the transistor, which is the drain-source voltage (Vd
That is, the current (Ids) between the drain and the source becomes a constant current, regardless of (s). Otherwise, when the drain-source voltage (Vds) is different, the current mirror circuit may not operate properly. The details will be specifically described below. Here, the power supply voltage (Vdd) is set to 5V.

The first MOS transistor (TR1) is connected between the gate and the drain, and the drain-source voltage (Vd1) is Vtp (threshold voltage of the first MOS transistor) + α (a certain constant voltage). Is set to about 1V. On the other hand, regarding the drain-source voltage (Vd2) of the second MOS transistor (TR2), the source potential of the second MOS transistor (TR2), that is, 5 V, and the drain potential, that is, the third M
The difference is the potential of the source of the OS transistor (TR3).

The gate and drain of the third MOS transistor (TR3) are connected, and the potential difference between the drain and source of the third MOS transistor (TR3) is
It is set to Vtn (threshold voltage of the third MOS transistor) + α (a certain constant voltage), which is about 1V. Also, since the source is the ground potential (GND), the third
The drain potential of the MOS transistor (TR3) is 1
It becomes V.

Therefore, the drain-source voltage (Vd2) of the second MOS transistor (TR2) is the difference between the source potential and the drain potential, that is, 5-1 = 4.
It becomes V. In this way, the first MOS transistor (T
In R1) and the second MOS transistor (TR2),
The drain-source voltages (Vd1, Vd2) are generally different.

Therefore, the drain-source current (Id
s) changes depending on the drain-source voltage (Vds), the first MOS transistor (TR
Current flowing in 1) and the second MOS transistor (TR
Since the current flowing in 2) is different, it may not operate properly as a current mirror. This point will be described with reference to FIG. FIG. 6 is a diagram showing the saturation characteristic of the MOS transistor.

Generally, in a MOS transistor, as shown in FIG. 6, when the drain-source voltage (Vds) rises, the current (Ids) flowing between the drain and source becomes substantially constant in the saturation region. This is the case where the saturation characteristic is "good". However, when the channel length of the MOS transistor is shortened, the current (Ids) flowing between the drain and the source is not constant in the saturation region and tends to increase to some extent. This is the case where the saturation characteristic has “degraded” (FIG. 6).

When the saturation characteristic deteriorates, the drain current (Ids) changes depending on the drain-source voltage. Generally, when the circuit configuration shown in FIG. 4 is taken as described above,
Since the drain-source voltages (Vd1, Vd2) of the first and second MOS transistors are generally different, the same current does not flow in the first and second MOS transistors (TR1, TR2) where the same drain current should originally flow. , There is a problem that it does not work properly as a current mirror.

In order to prevent such a problem, conventionally, by increasing the channel length of the transistor related to the saturation characteristic, the drain-source current (Ids) is constant regardless of the gate-source voltage (Vds). Therefore, the current mirror is operated properly and the appropriate reference voltages (V1, V2) are generated. However,
Due to the demand for miniaturization, it becomes difficult to increase the channel length, and deterioration of saturation characteristics is unavoidable.
The drain-source current (Ids) changes depending on the drain-source voltage (Vds), the current mirror does not operate properly, and the reference voltages (V1, V2) also differ from the predetermined values. However, there is a problem that the desired operation is not performed.

[0015]

The present invention has been made in view of the above drawbacks of the prior art, and has a first source, a first gate and a first drain as shown in FIG. A first MOS transistor having the first source connected to the voltage of, and the first gate connected to the first drain, and a second source, a second gate, and a second drain. , A second M having the second source connected to the first voltage and the second gate connected to the first gate
An OS transistor, a third source, a third gate, and a third drain, and the third drain and the third drain
A third MOS transistor connected to the gate of the third source and the third source connected to a second voltage lower than the first voltage, and between the first drain and the second voltage. The above problem is solved by a current mirror circuit having a resistance element connected to the second drain and a potential difference generation element connected between the second drain and the third drain and generating a potential difference between them. Is.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION A current mirror circuit according to an embodiment of the present invention will be described below with reference to the drawings. As shown in FIGS. 1 and 2, this circuit includes a p-channel first MOS transistor (TR11), a p-channel second MOS transistor (TR12), an n-channel third MOS transistor (TR13), A first resistor (R11) and a second resistor (R12),
A constant current (I12) having the same current value as the constant current (I11) flowing from the OS transistor (TR11) to the resistor (R11).
The second MOS transistor (TR12) and the third MO
It flows to the S transistor (TR13) side, these constant currents (I11, I12) are converted into voltage, and the first reference voltage (V
11), a circuit for generating a second reference voltage (V12) and outputting it to an external circuit.

Regarding these reference voltages, when the power supply voltage (Vdd) is 5V, the first reference voltage (V11) is 4V and the second reference voltage is
The reference voltage (V12) is 1 V, and the first reference voltage (V11) and the second reference voltage (V2) have symmetrical voltage values. The reference voltage generated in this way is, for example, the first reference voltage (V11) of the p-channel M
It is used for such an application that the second reference voltage (V12) is output to the gate of the OS transistor and is output to the n-channel MOS transistor.

The first MOS transistor (TR1
In 1), the source is connected to the power supply voltage (Vdd), which is an example of the first voltage, and the gate and the drain are connected, and the second MOS transistor (TR12) is connected to the power supply voltage (Vdd). , The gate is connected to the gate of the first MOS transistor (TR11). Also, the third MOS
The drain of the transistor (TR13) is connected to the second MOS transistor (TR) via the second resistor (R12).
12) is connected to the drain, its source is connected to the ground potential (GND), and its gate is connected to its own drain. This is an element for converting the constant current (I12) flowing on the second MOS transistor (TR12) side into a voltage. Further, the first resistor (R11) is connected between the drain of the first MOS transistor (TR11) and the ground potential (GND) which is an example of the second voltage.

Further, the first MOS transistor (T
R11) and the second MOS transistor (TR12)
For the convenience of forming a current mirror circuit in pairs with
Those having the same operating characteristics are used. Furthermore, the second
The resistor (R12) is an example of a potential difference generating element, and the drain-source voltage (Vd12) of the second MOS transistor (TR12) is the first MOS transistor (TR12).
It is an element that generates a potential difference that is substantially equal to the drain-source voltage (Vd11) of 11).

According to the above circuit, first, the constant current (I11) flows from the first MOS transistor (TR11) to the first resistor (R11), and the first MOS transistor (TR11).
11), the operation of the current mirror circuit composed of the second MOS transistor (TR12) and the first resistor (R11) causes the constant current (I12) having the same current value as the constant current (I11) MOS transistor (TR12)
To the third MOS transistor (TR13).

The constant current (I11) is voltage-converted by the first MOS transistor (TR11) to generate the first reference voltage (V11), and the constant current (I12) is the third M current.
The OS transistor (TR13) converts the voltage to generate the second reference voltage (V12), and outputs the first and second reference voltages (V11, V12) to an external circuit (not shown).

At this time, in the conventional circuit, the drain-source voltage (Vd1) of the first MOS transistor (TR1).
And the drain-source voltage (Vd2) of the second MOS transistor (TR2) are different from each other, the saturation characteristic is deteriorated and the drain-source current (Ids) depends on the drain-source voltage (Vds). In the case of using a transistor that changes with time, the constant currents (I1, I2) flowing through the first and second MOS transistors (TR1, TR2) may be different and may not operate as a current mirror.

However, according to the circuit of this embodiment, the second resistor (R12) is connected between the drain of the second MOS transistor (TR12) and the drain of the third MOS transistor (TR13). Therefore, normally, the potential of the drain of the second MOS transistor (TR12) rises, and the second MOS transistor (TR1)
The drain-source voltage (Vd12) in 2) is almost the first
Can be set to be equal to the drain-source voltage (Vd11) of the MOS transistor (TR11).

In the present embodiment, the power supply voltage (Vdd) is set to 5V, so the details will be specifically described below in accordance with this numerical value. First MOS transistor (TR11)
Is connected between the gate and the drain, and the drain-source voltage (Vd11) is set to Vtp (threshold voltage of the first MOS transistor) + α (a certain constant voltage) and becomes about 1V.

On the other hand, the second MOS transistor (TR1
Regarding the drain-source voltage (Vd12) of 2),
The difference is between the potential of the source of the second MOS transistor (TR12), that is, 5 V and the potential of the drain. The gate and source of the third MOS transistor (TR13) are connected to each other, and the third MOS transistor (TR1)
The drain-source potential difference of 3) is Vtn (third M
The threshold voltage of the OS transistor) + α (certain constant voltage) is set to about 1 V, and the drain is the ground potential (GND). Therefore, the third MOS transistor (TR
The source potential of 13) is 1V.

To this, a voltage drop due to the second resistor (R12) is added. If the resistance value is set so that a voltage drop of about 3V occurs in the second resistor (R12), the second MO
The drain potential of the S transistor (TR12) is 1 + 3
= 4V, the second MOS transistor (TR12)
The drain-source voltage (Vd12) of is equal to the difference between the source potential and the drain potential, that is, 5-4 = 1V.

In this way, the second resistor (R12)
Of the first MOS transistor (TR11) by connecting the drain of the second MOS transistor (TR12) and the drain of the third MOS transistor (TR13).
And the drain of the second MOS transistor (TR12)-
The source-to-source voltages (Vd11, Vd12) can be set to be almost the same.

Therefore, the drain-source current (Id
Even if a transistor whose saturation characteristic is deteriorated so that (s) changes depending on the drain-source voltage (Vds), as shown in FIG. 3, between the drain-source of the first and second MOS transistors. If the voltages (Vd11, Vd12) are substantially equal, the constant currents (I11, I12) flowing through them are also substantially equal to each other, so that the current mirror can properly operate.

Therefore, it becomes possible to generate proper first and second reference voltages (V11, V12). The present invention is particularly effective when used for an element having deteriorated saturation characteristics, and a transistor having a relatively small channel length can be used, which facilitates production of a current mirror circuit having a relatively large current.

Although the second resistance element is used as the potential difference generating element in the present embodiment, the present invention is not limited to this, and, for example, a MOS transistor whose gate and source are short-circuited, or a diode or the like is used. As long as it is an element that produces a potential difference, the same effect can be obtained with almost any element. In the present embodiment, the first
The MOS transistor and the second MOS transistor are p-channel MOS transistors, and the third MOS transistor is an n-channel MOS transistor. Of course, the first MOS transistor and the second M transistor are
The OS transistor is an n-channel MOS transistor,
The third MOS transistor may be a p-channel MOS transistor.

[0031]

As described above, according to the current mirror circuit of the present invention, the first source, the first gate, and the first drain are provided, and the first source is set to the first voltage. Alternatively, it has a first MOS transistor connected to the first drain and connected to the first gate and the first drain or source, and a second source, a second gate, and a second drain. A second MOS whose second source or second drain is connected to said first voltage and whose second gate is connected to said first gate
A transistor, a third drain, a third gate, and a third source, the third drain or the third source and the third gate are connected to each other, and the third source or the third source A third drain connected between a third MOS transistor connected to a second voltage lower than the first voltage and the first drain or the first source and the second voltage; And a potential difference generating element that is connected between the second drain or the second source and the third drain or the third source to generate a potential difference between them. , The drain-source voltage of the first MOS transistor and the drain of the second MOS transistor are increased by raising the potential of the second drain or source of the second MOS transistor. - it is possible to substantially equalize the voltage across the source.

As a result, the saturation characteristic of M is deteriorated.
Even if the OS transistor is used, a constant current having substantially the same current value can be made to flow in the first MOS transistor and the second MOS transistor, and can properly operate as a current mirror. Further, it becomes possible to convert these constant currents into voltages and generate two appropriate types of symmetrical voltages.

[Brief description of drawings]

FIG. 1 is a circuit diagram illustrating a current mirror circuit according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating an operation of the current mirror circuit according to the embodiment of the present invention.

FIG. 3 is a diagram for explaining the function and effect of the potential difference generating means according to the present invention.

FIG. 4 is a circuit diagram illustrating a current mirror circuit according to a conventional example.

FIG. 5 is a circuit diagram showing an application example of a current mirror circuit.

FIG. 6 is a diagram illustrating a saturation characteristic of a general MOS transistor and a conventional problem.

[Explanation of symbols]

TR11: First MOS transistor TR12: Second MOS transistor TR13: Third MOS transistor R11: First resistance R12: second resistance V11: First reference voltage V12: Second reference voltage Vdd: Power supply voltage

Claims (3)

(57) [Claims] 1. A first source, a first gate, and a first drain, wherein the first source or the first drain is connected to a first voltage, and the first gate and the first gate are connected to each other. The first MO to which the first drain or source is connected
An S-transistor, a second source, a second gate, and a second drain, the second source or the second drain being connected to the first voltage, and the second gate being the second A second MOS transistor connected to the first gate, a third drain, a third gate, and a third source, and the third drain or the third source and the third gate A second source connected to the third source or the third drain having a voltage lower than the first voltage.
A third MOS transistor connected to the second voltage, a resistance element connected between the first drain or the first source and the second voltage, and a second drain or the second source And a third drain or the third source, and a potential difference generating element for generating a potential difference therebetween , and the potential difference
The generating element is between the first drain and the first source.
Voltage between the second drain and the second source
A current mirror circuit characterized by generating a potential difference that is substantially the same as the voltage . 2. The first MOS transistor and the second MOS transistor.
MOS transistor is a p-channel MOS transistor
Or an n-channel MOS transistor,
The third MOS transistor is an n-channel MOS transistor.
With a transistor or p-channel MOS transistor
2. The current mirror circuit according to claim 1, wherein
Road. 3. The potential difference generating element is a resistor or a gate.
MO with gate-source or gate-drain connected
The S-transistor according to claim 1, which is an S-transistor.
Current mirror circuit.