JP3402332B2 - Remote I / O system for programmable controller - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a remote I / O of a PC comprising a master station connected to a programmable controller (hereinafter referred to as a PC) and a slave station connected to the master station.
Regarding the O system.

[0002]

2. Description of the Related Art When controlling a plurality of devices dispersed in a factory or the like with a single PC, it is necessary to connect several tens of input / output wires from the PC to each device, which makes wiring work complicated. And problems such as increased installation work will occur. In order to solve this problem, a remote I / O system of a PC configured as shown in FIG. 12 was devised for the purpose of saving wiring.

The remote I / O system of a PC is a CPU
A master station 2 that is incorporated in a PC in the same manner as the unit (hereinafter referred to as a PC main body) 1 and the input / output units (I / O units) 1a and 1b, and is directly connected to the PC main body 1 and the like via a CPU bus, This master station 2 and one or a plurality of slave stations 3 connected via a coaxial cable, a twisted pair wire with a shield, and a communication cable 4 such as an optical fiber.

Each slave station 3 is usually connected to a plurality of input / output units 3a and 3b via a data bus. Motors and switches (S) are connected to the input / output units 3a and 3b.
W), a controlled device such as a sensor are connected, and the PC body 1 is configured to control a remote non-controlled device.

The remote I / O of the PC configured as described above
In the O system, when the PC main body 1 controls the input / output units 3a and 3b on the slave station 3 via the master station 2, the input data on the slave station 3 is transferred to the PC main body 1 via the master station 2 to the PC main body 1 Output data of the output unit 3b on the slave station 3 via the master station 2
The following two representative methods are available for this data exchange, that is, the remote refresh method.

One remote refresh method is shown in FIG.
3, the slave station I / in the command word of the PC main body 1
By the output command to O, data is exchanged with the PC main body 1 → master station 2, and then master station 2 → slave station 3 → output unit 3b.
In addition, the input unit 3a → by the input instruction of the slave station I / O
Data is exchanged between the slave station 3 → the master station 2 and the master station 2 → the PC body 1.

FIG. 14 shows a program example in the case of this method. In this figure, the instruction a is shown in FIG.
2 is a command to fetch the ON / OFF information of X1 in the slave station 3 of # 2, and the command b is the slave station 3 of # 1.
Is a command to transmit the ON information of Y2.
Further, FIG. 15 shows the execution processing procedure of the PC main body 1 in this case. In this figure, the "IN instruction" executes remote refresh at the timing of execution of the instruction (FIG. 13), "OUT instruction". Executes remote refresh at the timing of execution of the instruction (in FIG. 13),
"OUT refresh" and "IN refresh" are PC
This is a refresh for the input / output units 1a and 1b connected to the main body 1.

Another remote refresh method is
As shown in FIG. 16, the method of exchanging I / O data on the slave station 3 by asynchronously performing communication on the remote I / O system is used. It is performed at the end refresh timing.

FIG. 17 shows an example of the program in this method, and FIG. 18 shows the execution process of the PC in this case. The remote refresh process is performed at the end refresh timing (see FIG. 16). No.) is performed, and unlike the case of the first method, communication between the PC and this system is performed asynchronously.

[0010]

However, in the first remote refresh method described above, the communication process between the PC body and the I / O system, that is, the remote refresh process is executed in synchronization with the execution of the command of the PC. Although the program timing design is easy, it is necessary to execute refresh processing each time for high-speed input capture, which increases the instruction execution time of the PC and also remote I / O.
When using the units 3a and 3b, unlike the input / output units 1a and 1b directly connected to the PC main body 1, special communication command words such as commands a and b shown in FIG. 14 are required.
There is a problem such as.

Further, in the second remote refresh method described above, since the remote refresh processing by the PC body is a scheduled or end refresh asynchronous operation, the PC
Has the advantage that it has a short effect on the instruction execution time of, and can be programmed without using special instructions.
It is necessary to consider the communication delay until the PC body 1 executes the remote refresh. Therefore, if a minute pulse with an ON time shorter than the refresh cycle time is input to the slave station from the sensor or the like until the remote refresh is executed, the minute pulse cannot be taken into the PC body 1. However, there is a problem that the input response performance is poor.

Therefore, the present invention has been made to solve the above problems in the first and second remote refresh methods. The I / O unit of the slave station can be accessed without any special command, and the PC Of the minute pulse to be input to the slave station while the influence on the instruction execution time of
An object of the present invention is to provide a remote I / O system for a PC that can improve input response performance by being taken in by the C main body.

[0013]

In order to achieve the above object, according to the invention of claim 1, a master station connected to a PC main body via a bus and a master station connected to the master station via a communication cable. And a slave station to which an input unit is connected via a data bus, the master station sequentially polls the slave station to transmit the input data acquired by the slave station from the input unit to itself. In the remote I / O system of the programmable controller that the above PC body refreshes the input data,
The slave station has an input value capturing means for capturing the value of an input pulse input from the input unit based on a sampling clock, and the input value capturing means for receiving an ON input value.
If it is crowded, until the next polling transmission
Input data storage means for storing input data as ON; transmission means for transmitting the latest input data stored in the input data storage means to the master station at the time of polling from the master station; After completing the transmission of the input data to the master station, the input data stored in the input data storage means is updated to the value of the latest input pulse captured by the input value capture means at the completion of the transmission of the input data. And a means for receiving the input data transmitted by the transmitting means of the slave station, and the main station is accessible from the PC body.
And a shared memory for storing the input data received by the receiving means.

According to the second aspect of the invention, a master station connected to the PC main body via a bus, a master station connected to the master station via a communication cable, and an input unit connected via a data bus. The master station sequentially polls the slave stations to transmit the input data fetched from the input unit to itself, and the PC main body can refresh the input data. In the remote I / O system of the programmable controller configured as described above, the slave station inputs the value of the input pulse input from the input unit based on the sampling clock, and the input value acquired by the input value capturing means. The master station comprises a transmitter for transmitting the value of the pulse to the master station at the time of polling from the master station. If the captured receiving means for receiving the value of the input pulse which has transmitted the above transmission means, said receiving means the ON input values by polling to,
The input data is turned on until the next refresh.
And a shared memory that is accessible from the PC body and stores the input data received by the receiving means, and the input data storage means after receiving a refresh completion signal from the PC body. And input data updating means for updating the input data stored in the input data to the value of the latest input pulse stored in the receiving means when the refresh completion signal is received. In the invention according to claim 3, the communication with the master station is performed.
A communication cable can be connected to connect the input data
A slave station that can send to a station
Input value capturing means for capturing the input value and the above input value capturing
If the only means has taken on input values, then
Input data is stored as ON until the transmission
Input data storage means and the above input during communication with the master station.
Communication the latest input data stored in the force data storage means
The transmitting means for transmitting to the cable and the transmitting means are
The above-mentioned input data storage means on condition that the transmission is completed.
The input data stored in the
The input data to be updated to the latest input pulse value
Data updating means. Also bill
In the invention described in Item 4, a communication cable for communicating with a slave station
It is a master station that can connect
The pulse value from the slave station received via the cable.
The receiving means for storing and the receiving means for receiving the ON input value
If it is crowded, enter it until the next refresh.
Input data storage means for storing force data as ON,
It is possible to access the main body of the PC, and the receiving means can receive
Shared memory for storing the input data that has been input, and the PC body
On condition that the refresh completion signal from
The input data stored in the input data storage means is
The value of the latest input pulse stored in the receiving means is updated.
And a new input data updating means.
It

[0015]

According to the invention described in claim 1, in the slave station, the value of the input pulse input from the input unit is taken in based on the sampling clock, and the logical sum of the value of the input pulse taken in and the stored data is obtained. It is stored as input data, and at the time of polling from the master station, the latest input data at the time of polling is transmitted to the master station.
After the transmission of the input data is completed, the stored input data is updated to the value of the input pulse when the transmission of the input data is completed. On the other hand, the master station receives the input data from the slave station and stores it in the input data shared memory so that the PC body can refresh the input data.

According to the second aspect of the invention, in the slave station, the value of the input pulse input from the input unit is fetched based on the sampling clock, and the value of this input pulse is transmitted to the master station at the time of polling from the master station. The master station receives the value of the input pulse sent by the slave station by polling, and ORs the value of the input pulse with the data stored by itself to store as the input data. Set the data in the shared memory and wait for the refresh from the PC. Then, there is refreshing by the PC body, and after receiving the refresh completion signal from the PC body, the input data is updated to the value of the input pulse at the time of receiving the refresh completion signal.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a PC remote I / O system according to the present invention will be described below with reference to the drawings.

FIG. 1 shows a PC remote I / O according to the present invention.
1 shows a first embodiment of the system.

This system is incorporated into a PC in the same manner as the PC main body 1 and the input / output unit (see FIG. 12), and is connected to the PC main body 1 etc. via a CPU bus or an I / O bus (hereinafter, simply referred to as a bus). Master station 2 that is directly connected with
And one or a plurality of slave stations 3 (only one is shown in this figure for convenience) connected via a communication cable 4 such as a coaxial communication cable or an optical fiber.

The PC main body 1 controls the machines and devices such as motors via the input / output unit (see FIG. 12) directly incorporated in the PC and the input / output units 3a and 3b connected to this system. In this figure, only the MPU 11 that executes communication with the system, that is, remote refresh (see FIG. 2) is shown.

The master station 2 controls data transmission / reception via the bus with the PC body 1 and polling communication with the slave station 3 via the communication cable 4 (see FIG. 2).
And a shared RAM 22 that exchanges data when transmitting and receiving data to and from the PC body 1, and a communication LSI 23 that incorporates a transmission / reception buffer (only the reception buffer 23a is shown here) and that communicates with the slave station 3. . As will be described later, Ao is a remote refresh request signal for requesting the master station 2 to write and read input / output data to / from the PC body 1, and A1 is from the PC body 1 to the master station 1 when the access to the shared RAM 22 is completed. Is a remote refresh completion signal transmitted to.

The slave station 3 is the master station 2 via the communication cable 4.
MPU31 for performing reception, transmission, and main processing (see FIGS. 3 to 5) described later for controlling communication with the I / O unit and data transmission / reception with the input / output units 3a and 3b, and a transmission / reception buffer (only the transmission buffer 32a is illustrated here) ) Is built in to communicate with the master station 2, an output data storage buffer 33 for holding output data to be transmitted to the output unit 3b, a value of an input pulse from the input unit 3a (hereinafter referred to as an input value). ) Based on the sampling clock, the input value acquired by the input value capturing buffer 34 based on the sampling clock, and the data stored by itself are ORed (OR) to obtain the input data. And an input data storage buffer 35 for storing as.

The slave station 3 is connected to a plurality of input / output units 3a and 3b.
Devices and devices such as a motor, a switch (SW), and a sensor are connected to 3b, respectively, and are remotely controlled by the PC body 1.

Next, the processing in this system will be described with reference to the drawings.

FIG. 2 shows a communication processing procedure of both the PC main body 1 and the master station 2 when data is transmitted and received.

In the present embodiment, when data is transmitted and received between the PC main body 1 and the master station 2, first, the input data taken from the master station 2 to the PC main body 1 from the input unit 3a of each slave station 3, and A refresh request for the output data to be transmitted to the output unit 3b, that is, a remote refresh request Ao is transmitted (step 100), and the PC body 1 receives the remote refresh request Ao and starts a refresh process by an interrupt (step 200). The shared RAM 22 of the master station 2 is accessed to write output data and read input data. After the refresh process is completed (step 220 "Yes"), the remote refresh completion signal A1 is transmitted to the master station 2 (step 230), and the process returns, that is, this process ends.
On the other hand, in the master station 2, the remote refresh completion signal A1
Is received (step 110) and the process returns.

The timing at which the master station 2 outputs the remote refresh request Ao is assumed to be when the master station 2 polls each slave station 3 and receives input data from all slave stations 3.

FIG. 3 shows a reception processing procedure in the slave station 3 when communicating between the master station 2 and the slave station 3. In this process, when output data addressed to the output unit 3b is transmitted from the master station 2, the data frame is addressed to the own node (step 300 “Yes”) and is normal (step 310 “Yes”). , The output data is received and captured (step 320), and the process returns.

FIG. 4 shows a transmission processing procedure in the slave station 3 when communicating between the master station 2 and the slave station 3. In this process, when the slave station 3 transmits the input data from the input unit 3a, first, the transmission data is set, that is, the input data stored in the input data storage buffer 35 is set in the transmission buffer 32a of the communication LSI 32 (step 400), after the transmission is completed (step 410 “Ye
s ″), the input data stored in the input data storage buffer 35 is updated to the current input value, that is, the value of the input pulse captured by the input value capture buffer 34 at the completion of transmission of the input data (step 420). , Return.

FIG. 5 shows a main processing in the slave station 3, that is, a processing procedure of data transmission / reception to / from the input / output units 3a and 3b. This main processing is performed one cycle at a time in synchronization with the sampling clock. .

That is, in the slave station 3, under the control of the MPU 31, the input value acquisition buffer 34 acquires the value of the input pulse from the input unit 3a in synchronization with the sampling clock (step 500), and then the input data storage buffer 35. However, the input value fetched by the input value fetch buffer 34 and the input data stored by the input data storage buffer 35 are ORed and stored as input data (step 510). As a result, when the slave station 3 takes in the input value “1 (on state)” by the minute input pulse, the input data storage buffer 35 stores it as input data until the next polling from the master station 2. It will be stored as "1". Then, regarding the output data, the output data from the PC main body 1 stored in the output data storage buffer 33 is set in the output unit 3b (step 520).

Next, changes in the input data in the slave station 3 will be described with reference to the drawings.

FIG. 6 shows an example of changes in the input values and input data stored in the input value acquisition buffer 34, the input data storage buffer 35 and the transmission buffer 32a in the slave station 3. Here, two input pulses IN
It is assumed that 1 and IN2 are input to the slave station 3 via the input unit 3a.

First, the input value acquisition buffer 35 is shown in FIG.
In step 500 of the main process shown in FIG. 3, the input pulses IN1 and IN2 are synchronized with the sampling clock CLK.
Value is taken in, for example, a1 in the state of CLK1
Take in "00". On the other hand, the input data storage buffer 3
5 stores b1 "00" in the state of CLK1.

At the time of the next CLK2, the input value acquisition buffer 34 has the value a2 "1" of the input pulses IN1 and IN2.
While inputting 0 ", the input data storage buffer 35
By the processing of step 510 of FIG. 5, the input value a2 "10" which is fetched and held by the input value fetching buffer 34,
The logical sum "10" with the input data b1 "00" stored by itself is stored as the input data b2.

Further, at the next CLK3, the input value fetching buffer 34 has the value a3 of the input pulses IN1 and IN2.
Input data storage buffer 35 while "00" is fetched
Is the input value a3 "00" of the input value acquisition buffer 34.
And the logical sum "10" with the input data b2 "10" stored by itself is stored as the input data b3.

Therefore, even if the minute input pulse IN1 'from the master station 2 to the slave station 3 is shorter than the polling cycle time, if the minute input pulse IN1' is captured at the time of sampling like the value of the minute input pulse IN1 '. Are stored in the input data storage buffer 35. Therefore, if the ON time of the minute input pulse is equal to or longer than the sampling clock time, the minute input pulse is always taken in at the sampling clock CLK and the input data storage buffer 35
Will be stored in.

Thereafter, the input value fetch buffer 34 and the input data storage buffer 35 are C even at CLK4 and CLK5.
As in the case of LK2 and 3, steps 500 and 51 in FIG.
By the processing of 0, the input values a4, a5 or the input data b4, b5 are stored respectively, and the minute input pulse IN1 ',
The input of IN2 ″ is memorized.

Further, the transmission buffer 32a performs the transmission processing shown in FIG. 4, and in synchronization with the sampling clock CLK, steps 400 → 410 "No" → 400 → ...
.. are repeated to set the input data b1 to b5 stored in the input data storage buffer 35 in the transmission buffer 32a. However, at the time of CLK4, the contents of the input data storage buffer 32a are respectively b4 → b4 'as will be described later.
The updated contents b4 'are updated to the send buffer 3
2a is set.

By the way, when the slave station 3 is polled by the master station 2, step 410 "Yes" in FIG.
Thus, the input data c3 "1" by the minute input pulse IN1 'held in the transmission buffer 32a at the time of the polling
0 "is transmitted, and after the transmission is completed, the input value b4 of the input data b4" 10 "of the input data storage buffer 35 is transmitted at step 420, that is, the input value a4 held in the input value acquisition buffer 34 at the time of CLK4. It is updated to "00" (b4 ').

Therefore, the input data storage buffer 35
Is the value a5 “01” of the input value fetch buffer 34 and the updated input value b4 ′ “00” of CLK5 by the processing of steps 500 and 510 of FIG. By storing the logical sum “01” of the above as the input data b5 and thereafter storing the input pulse value “1” on the IN2 side until the completion of transmission by the next polling,
The fact that the minute input pulse IN2 ″ is input is stored.

When the next polling (not shown) occurs, the input pulse value "1" on the IN2 side due to the minute input pulse IN2 "stored by the input data storage buffer 35 until the polling is Send buffer 3
It is transmitted from the child station 3 to the parent station 2 via 2a.

Therefore, according to the present embodiment, even if a minute input pulse from the master station 2 to the slave station 3 is input for a time shorter than the polling cycle time, the minute input pulse IN1 'is input.
, IN2 ″ is input at the time of sampling (in the case of the minute input pulse IN1 ′, the ON time of the minute input pulse is equal to or more than the sampling clock time, so it is surely captured). The minute input pulses IN1 ', IN2''are stored in the input data storage buffer 35 of the slave station 3 until the data transmission is completed by polling.
Since the value of is stored as input data and the input data is transmitted to the master station 2 at the time of polling, the master station 2 can take in the input data by the minute input pulses IN1 ′, IN2 ″, Input response performance is improved.

In addition, the polling cycle of the master station 2 and P
When the communication cycle of the C main body 1, that is, the remote refresh cycle is equal, the PC main body 1 can capture a minute input pulse less than the remote refresh cycle time input to the slave station 3 via the master station 2, The input response performance of the main body 1 is improved.

In this embodiment, the PC body 1 and the master station 2 are
Although the shared RAM 22 for exchanging data between them is provided on the master station 2 side in the description, it may be provided on the PC main body 1 side.

In the present embodiment, the slave station 3 of the type in which a plurality of input / output units 3a and 3b are connected has been described.
Since the input / output units 3 and 3b are integrally incorporated in the slave station 3 in advance, and the slave station itself has terminals for connecting devices such as switches (SW) and sensors, there is no functional change. , Either type of slave station may be adopted.

Next, a second embodiment of the present invention will be described.

FIG. 7 shows the configuration of the remote I / O system of the PC according to the second embodiment.

The second embodiment differs from the first embodiment in that
An input data storage buffer 54 that stores the input of a minute input pulse as input data is provided in the master station 5 to configure a remote I / O system of a PC.

The PC main body 1 is similar to that of the first embodiment in that an input / output unit (see FIG. 12) incorporated in the PC and a motor or the like via the input / output units 3a and 3b connected to this system. It is configured to control machines and devices, where M is used to perform remote refresh.
Only PU11 is shown.

The master station 5 controls the transmission / reception of data via the bus with the PC body 1 and the communication with the slave station 6 via the communication cable 4, so that the reception, transmission and update processing described later (see FIGS. 8 to 10). ), A shared RAM 52 for exchanging data at the time of data transmission / reception with the PC main body 1, and a transmission / reception buffer (only the reception buffer 53a is shown in the figure). An input data storage buffer 5 that stores a communication LSI 53 that performs communication, and an input value that is received by the reception buffer 53a and that is received by the slave station 6 and that is input by a minute input pulse as described later.
4 and. Incidentally, Ao is a remote refresh request, and A1 is a remote refresh completion signal.

The slave station 6 is the master station 5 via the communication cable 4.
An MPU 61 for controlling communication with the I / O unit and data transmission / reception with the input / output units 3a, 3b; It has an output data storage buffer 63 for holding output data to be transmitted to 3b, and an input value capture buffer 64 for capturing the value of the input pulse input from the input unit 3a. Input / output units 3a and 3b are connected to the slave station 6 as in the case of the first embodiment described above, and devices such as motors are connected to the input / output units 3a and 3b, respectively.
It is remotely controlled by the C body 1.

Next, the processing in the second embodiment will be described with reference to the drawings.

In the second embodiment, since the input value of the minute input pulse taken in by the slave station 6 is stored in the master station 5, the refresh processing in the PC body 1 (see FIG. 2) and the slave station 6 are performed. The transmission / reception processing in step 1 is the same as in the conventional case, and only the processing in the master station 5 will be illustrated and described.

FIG. 8 shows a procedure of a reception process in the master station 5 when the master station 5 and the slave station 6 communicate with each other.

In this case, in the master station 5, under the control of the MPU 51, first, the reception buffer 53a fetches the input data from the slave station 6 (step 600), and then the input data storage buffer 54 stores the data stored therein. When,
The logical sum of the value of the input pulse from the slave station 6 received by the reception buffer 53a is calculated and the result is stored as input data (step 610). As a result, even if a minute input pulse is input, the input value "1" due to the minute input pulse can be stored as the input data "1". Then, after the reception is completed, a reception completion process is performed (step 620), and the process is returned, that is, completed.

FIG. 9 shows a procedure of a transmission process in the master station 5 when the master station 5 and the slave station 6 communicate with each other.

In this case, in the master station 5, the MPU 51 accesses the shared RAM 52 and fetches the output data from the PC main body 1 (step 700), performs the transmission process and outputs the output data via the communication LSI 53 and the communication cable 4. Station 6
To (step 710), after the transmission is completed, a transmission termination process is performed (step 720), and the process returns.

FIG. 10 shows the procedure of update processing of the input data in the input data storage buffer 54 of the master station 5.

In this case, the master station 5 completes the remote refresh from the PC body 1 (see step 230 in FIG. 2).
The MPU 51 starts the update process by receiving the signal of
The input value stored in the input data storage buffer 54
To the input data (step 800), and after the setting, update end processing is performed (step 810).
To return.

Next, changes in input values and input data in the master station 5 and the slave station 6 will be described with reference to the drawings.

FIG. 11 shows changes in input values and input data stored in the buffers of the master station 5 and the slave station 6, and two input pulses IN1 and IN2 are sent to the slave station 6 via the input unit 3a. It will be described as input. In the figure, the sampling clock CLK and the communication cycle of the master station 5 with respect to the slave station 6 are shown to be substantially the same for convenience, but normally, the communication cycle time of the master station 5 is longer than the sampling clock time.

First, in the slave station 6, the input value acquisition buffer 64 controls the two input pulses I under the control of the MPU 61.
Sampling clocks CLK1 to 6 for the values of N1 and IN2
And the input value d in the transmission buffer 62.
Set 1 to d6.

The master station 5 transmits a polling frame P to each slave station in a constant polling cycle to perform polling, and causes each slave station to transmit the data set in the transmission buffer. Here, the master station 5 transmits the transmission buffer 6 of the slave station 6.
2a transmits the input values d1 to d6 held therein, and the reception buffer 53a of the master station 5 transmits the input values d1 to d6 to e1.
Hold as ~ e6.

Further, the input data storage buffer 5 of the master station 5
4, the receiving buffer 53a receives the input value e1 from the slave station 6
Every time each of ~ e6 is held, the logical sum (OR) of the input data f stored by itself and the input value e held in the reception buffer 53a is calculated and the result is stored as the input data f.

For example, the reception buffer 53a stores the data e2
When holding, the input data storage buffer 54
The data e2 "10" is logically ORed with the input data f1 "00" stored therein, and the result "10" is set in itself as the input data f2, and the reception buffer 53a receives the data e3. , E4 is also stored, the input data is stored in the same manner.

However, the receiving buffer 53a stores the data e5.
When holding, the input data storage buffer 54
When a remote refresh completion signal A1 described later is received from the PC main body 1, at that time, the data e5 and the previous input data f4 stored by itself are not ORed, and e5 “01” → The contents stored in the input data storage buffer 54 are cleared and the contents are updated to the new contents held in the reception buffer 53a, such as f5 "01".

Therefore, in the case of the minute input pulse IN1 ', the input value "1" is d2 → e2 → f2 → f3 → f4.
In this way, the master station 5 stores the input data "1" until the remote refresh completion signal A1 comes. The same contents as the contents stored in the input data storage buffer 54 are also stored in the shared RAM 52.

On the other hand, the PC main body 1 is performing the remote refresh processing shown in FIG. 2, and transmits the remote refresh request Ao to the master station 5 to access the shared RAM 52 to perform remote refresh, that is, the shared RAM 52.
The output data is written into the shared RAM 52 and the input data stored in the shared RAM 52 is read out (step 2 in FIG. 2).
00).

At this time, the value "1" of the minute input pulse IN1 '
Is the remote refresh completion signal A1 from the PC body 1.
Is stored in the input data storage buffer 54 as the input data f2, f3, f4 until it reaches the master station 5, so that the input data f4 is fetched by the PC main body 1 by the transmission of the remote refresh request A0.

After the remote refresh is completed (step 210 "Yes" in the same step), the PC main unit 1 sends a remote refresh completion signal A1 to the master station 5 to notify that the access to the shared RAM 52 is completed (same). Step 220).

In the master station 5, when the remote refresh completion signal A1 is received, the storage content of the input data storage buffer 54 is held in the reception buffer 53a at the time of receiving the remote refresh completion signal A1 as described above. The value is updated to the value of the input value e5, and thereafter, each time the input value is input to the reception buffer 53a, the value is logically ORed with the value stored by itself until the next remote refresh completion signal comes. Holds the value of the minute input pulse captured in.

Incidentally, since the minute input pulse IN2 ″ is taken in by CLK5 and the minute input pulse IN1 ′ ″ is taken in by CLK6 by the input value fetching buffer 64,
Transmission buffer 62a, communication cable 4, reception buffer 5
The input data storage buffer 54 can store the value "11" via 3a, and the PC body 1 can fetch the value "11" at the next refresh.

Therefore, according to the second embodiment, the master station 5
Then, the value "1" of the minute input pulse fetched by the slave station 6 is stored as the input data "1" by the input data storage buffer 54 until the next remote refresh completion signal is received from the PC body 1, and the PC body 1 Since the input data is fetched through the shared RAM 52 by the remote refresh and the input data stored in the input data storage buffer 54 is updated to the latest input pulse value after the remote refresh is completed, the communication cycle time of the master station 5 or more is exceeded. If the input pulse is, the PC main body 1 can always take in the value, and the input response performance of the PC main body 1 is improved.

In the second embodiment, the case where the PC main body 1 becomes the refresh master has been described, but in the present invention, the master station 5 receives the data from the slave station 6 as in the case of the first embodiment. The remote refresh request may be output at the timing.

Further, in the second embodiment, the input data storage buffer 54 is provided separately from the shared RAM 52, and the shared R is shared.
The AM 52 is provided on the master station 5 side for explanation, but in the present invention,
The input data storage buffer 54 and the shared RAM 52 may be shared, or the shared RAM 52 on the master station 5 may be provided on the PC body 1 side.

Further, in this embodiment, as in the case of the first embodiment, the slave station 6 is described as a type in which a plurality of input / output units 3a and 3b are connected. It can be said that the same applies to a slave station of a type in which the units 3 and 3b are integrally incorporated and the slave station itself is provided with terminals for connecting devices such as switches (SW) and sensors.
Either type of slave station may be adopted.

[0078]

As described above, according to the first aspect of the invention, the slave station takes in the value of the input pulse on the basis of the sampling clock, and the value of the input pulse is maintained until the completion of data transmission by polling from the master station. Is stored as input data, and the input data at the time of polling is transmitted to the master station when polling from the master station, so the slave station polls until the next polling cycle time. The values of the following minute input pulses can be stored, and the input response performance of the master station is improved.

In particular, if the ON time of the minute input pulse is equal to or longer than the sampling clock time, the value is surely fetched by the slave station and hence fetched by the master station.

Further, when the polling cycle of the master station and the communication cycle of the PC main body are equal, the PC main body can take in a minute input pulse shorter than the communication cycle time, and the input response performance of the PC main body is improved. To do.

According to the second aspect of the invention, the master station takes in the value of the input pulse taken in by the slave station, and the value of this input pulse and the stored input data until the remote refresh completion signal is received. Since the logical sum of is stored as input data and the PC body fetches the input data at the time of remote refresh, if the input pulse is longer than the communication cycle time of the master station, the value must be fetched by the PC body. This improves the input response performance of the PC body. Invention of Claim 3 and Claim 4
Are used in the inventions of claim 1 and claim 2, respectively.
It has an effect.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a first embodiment of a remote I / O system for a PC according to the present invention.

FIG. 2 is a flowchart showing a procedure of communication processing between a PC body and a master station.

FIG. 3 is a flowchart showing a procedure of a reception process in a slave station.

FIG. 4 is a flowchart showing a procedure of transmission processing in a child station.

FIG. 5 is a flowchart showing a procedure of main processing in a slave station.

FIG. 6 is a flowchart showing changes in data in each buffer of the slave station.

FIG. 7 is an explanatory diagram showing a second embodiment of a remote I / O system for a PC according to the present invention.

FIG. 8 is a flowchart showing a procedure of reception processing in the master station.

FIG. 9 is a flowchart showing a procedure of transmission processing in the master station.

FIG. 10 is a flowchart showing the procedure of update processing of the rising state storage buffer.

FIG. 11 is a timing chart showing changes in input data in a master station and a slave station.

FIG. 12 is an explanatory diagram showing a configuration of a remote I / O system of a PC.

FIG. 13 is an explanatory diagram showing one of the conventional remote refresh methods.

14 is an explanatory diagram showing a program example of the remote refresh method shown in FIG.

15 is an explanatory diagram showing a processing procedure of the remote refresh method shown in FIG.

FIG. 16 is an explanatory diagram showing another method of the conventional remote refresh method.

17 is an explanatory diagram showing a program example of the remote refresh method shown in FIG.

FIG. 18 is an explanatory diagram showing a processing procedure of the remote refresh method shown in FIG. 16.

[Explanation of symbols]

1 PC body 2 parent stations 3 slave stations 4 communication cable 21 MPU 22 Shared RAM (shared memory) 23a receive buffer 31 MPU (transmitting means, input data updating means) 34 Input value acquisition buffer 35 Input data storage buffer 5 parent station 6 slave stations 51 MPU (input data update means) 52 Shared RAM (shared memory) 53a receive buffer 54 Input data storage buffer 61 MPU (transmitting means) 64 Input value acquisition buffer

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Claims (4)

(57) [Claims] 1. A master station connected to a PC main body via a bus, and a slave station connected to the master station via a communication cable and an input unit connected via a data bus. The master station sequentially polls the slave stations, causes the slave stations to transmit the input data acquired from the input unit to itself, and the PC body refreshes the input data. In the I / O system, the slave station is provided with an input value capturing means for capturing the value of an input pulse input from the input unit based on a sampling clock, and an input value capturing means for capturing an ON input value.
Input data until the next polling transmission.
Input data storage means for storing as ON, transmission means for transmitting the latest input data stored in the input data storage means to the master station at the time of polling from the master station, and the transmission means for transmitting to the master station. After completing the transmission of the input data, input data updating means for updating the input data stored in the input data storing means to the value of the latest input pulse which was taken in by the input value taking means at the time of completion of the transmission of the input data. On the other hand, the master station has a receiving means for receiving the input data transmitted by the transmitting means of the slave station, and a shared memory accessible from the PC body for storing the input data received by the receiving means. A remote I / O system of a programmable controller, comprising: 2. A master station connected to the PC body via a bus, and a slave station connected to the master station via a communication cable and an input unit connected via a data bus. The master station sequentially polls the slave stations, causes the slave stations to transmit the input data acquired from the input unit to itself, and allows the PC main body to refresh the input data remote from the programmable controller. In the I / O system, the slave station inputs the value of the input pulse input from the input unit based on a sampling clock, and the input pulse value captured by the input value capturing means from the master station. And a transmitting means for transmitting to the master station at the time of polling the Receiving means for transmitting means receives the value of the input pulse which has transmitted, when the receiving means incorporating on input values, the following
Input data storage means for storing input data in an ON state until refreshing, a shared memory accessible from the PC body for storing the input data received by the reception means, and the PC Input data updating means for updating the input data stored in the input data storage means to the latest input pulse value stored in the receiving means at the time of receiving the refresh completion signal after receiving the refresh completion signal from the main body. A remote I / O system of a programmable controller, comprising: 3. A slave station capable of connecting a communication cable for communicating with a master station and capable of transmitting input data to the master station, and input value capturing means for capturing a value of an input pulse to be input, When the above input value capturing means has captured the input value
Input data until the next polling transmission.
The input data storage means for storing as ON, the transmission means for transmitting the latest input data stored in the input data storage means to the communication cable at the time of communication with the master station, and the transmission means have completed the transmission. On the condition that the input data stored in the input data storage means is updated to the value of the latest input pulse captured by the input value capture means. Slave station. 4. A master station capable of connecting a communication cable for communicating with a slave station and capable of communicating also with a PC main body, said receiving means storing a pulse value received from the slave station via the cable. If the receiving means captures the ON input value,
Input data storage means for storing input data in an ON state until refreshing, a shared memory accessible to the PC body for storing the input data received by the reception means, and a PC On the condition that the refresh completion signal from the main body is received, input data updating means for updating the input data stored in the input data storing means to the latest input pulse value stored in the receiving means. A master station characterized by being equipped with.