JP3402277B2 - Liquid crystal display device and driving method - Google Patents
Liquid crystal display device and driving methodInfo
- Publication number
- JP3402277B2 JP3402277B2 JP25522899A JP25522899A JP3402277B2 JP 3402277 B2 JP3402277 B2 JP 3402277B2 JP 25522899 A JP25522899 A JP 25522899A JP 25522899 A JP25522899 A JP 25522899A JP 3402277 B2 JP3402277 B2 JP 3402277B2
- Authority
- JP
- Japan
- Prior art keywords
- common electrode
- line
- liquid crystal
- scanning
- driving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Description
【０００１】[0001]
【発明の属する技術分野】本発明はアクティブマトリク
ス方式の液晶表示装置及び駆動方法に関し、信号側駆動
回路の振幅低減と走査側駆動回路の振幅低減を同時に行
い、かつ実用性を高めたものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device and a driving method, and is intended to reduce the amplitude of a signal side driving circuit and the scanning side driving circuit at the same time and to improve the practicality. .
【０００２】[0002]
【従来の技術】アクティブマトリクス方式の液晶表示装
置において、液晶の保持特性を高めるための保持容量を
前段走査線と画素間に作り、ここから液晶にバイアス電
圧を印可する対向一定容量結合駆動方法と呼ばれる方法
がある（例えば日経ＢＰ社 フラットパネル・ディスプ
レイ’９３ Ｐ１２８〜Ｐ１３１）。これは信号側最大
振幅の抑制（５Ｖで十分）と内部直流電圧の抑制等をね
らったものである。これに対し、この方法の欠点である
走査側振幅の増大を防ぐために、補助容量を前段ゲート
間でなく、独立な補助電極接続とし、この補助電極にパ
ルス状波形を加えて液晶にバイアス電位を加えるという
方法が提案されている（特開平１０−３９２７７）。図
８にその構成を、図５にその動作波形を示し、図と共に
説明する。2. Description of the Related Art In an active matrix type liquid crystal display device, a holding constant capacitance coupling driving method is provided in which a holding capacitance for enhancing the holding characteristic of liquid crystal is formed between a preceding scanning line and a pixel, and a bias voltage is applied to the liquid crystal from there. There is a method called (for example, Nikkei BP flat panel display '93 P128 to P131). This aims at suppressing the maximum amplitude on the signal side (5 V is sufficient) and suppressing the internal DC voltage. On the other hand, in order to prevent an increase in the amplitude on the scanning side, which is a drawback of this method, the auxiliary capacitance is connected not to the preceding gate but to an independent auxiliary electrode, and a pulsed waveform is added to this auxiliary electrode to apply a bias potential to the liquid crystal. A method of adding has been proposed (JP-A-10-39277). Its configuration is shown in FIG. 8 and its operation waveform is shown in FIG.
【０００３】図８において、画像表示部内には複数の信
号線１０１と、それと直交する複数の走査線１０２、そ
れらの交点近傍に設けられたスイッチング素子１０３
と、これに接続された画素電極１０４と、走査線１０２
と対になり概平行配置された共通電極線１０５と、画素
電極１０４に一端を接続し他端は共通電極線１０５に接
続された保持容量１０６と、液晶１０７を介して対向す
るコモン電極Ｖｃが配置されている。In FIG. 8, a plurality of signal lines 101, a plurality of scanning lines 102 orthogonal to the signal lines 101, and a switching element 103 provided near the intersections of the signal lines 101 in the image display unit.
And the pixel electrode 104 connected to this and the scanning line 102.
A common electrode line 105 that is paired with the pixel electrode 104, has a storage capacitor 106 that has one end connected to the pixel electrode 104 and the other end that is connected to the common electrode line 105, and a common electrode Vc that faces the common electrode Vc via the liquid crystal 107. It is arranged.
【０００４】スイッチング素子は一般的には非晶質シリ
コン（ａ−Ｓｉ）、最近では多結晶ポリシリコン（ｐ−
Ｓｉ）、反射投射型パネル等に用途を絞ればＩＣに用い
られる単結晶シリコン（ｃ−Ｓｉ）で形成される。それ
らはデバイスの構造上ゲート−ドレイン間容量１０８が
あり、これにより走査線１０２からのゲートパルスが画
素電極１０４を負側にシフトする現象が発生する。Switching elements are generally amorphous silicon (a-Si), and recently polycrystalline silicon (p-).
Si), a reflective projection type panel, etc., are formed of single crystal silicon (c-Si) used in ICs. They have a gate-drain capacitance 108 due to the structure of the device, which causes a phenomenon in which the gate pulse from the scanning line 102 shifts the pixel electrode 104 to the negative side.
【０００５】画素表示部以外では信号線１０１を駆動す
るための信号線駆動回路１０９、走査線１０２を駆動す
る走査線駆動回路１１０、共通電極線１０５を駆動する
ための共通電極線駆動回路１１１が周辺に配置される。
走査駆動回路１１０はスタート信号Ｖ−Ｓとクロック信
号Ｖｃｌｋを基に出力はＶｏｆｆとＶｏｎの２値を発生
するシフトレジスタとバッファから構成される。同様に
共通電極線駆動回路１１１はスタート信号Ｖ−Ｓとクロ
ック信号Ｖｃｌｋを基に出力はＶｅ−とＶｅとＶｅ＋の
３値を発生するシフトレジスタとスイッチから構成され
る。In areas other than the pixel display portion, there are provided a signal line driving circuit 109 for driving the signal line 101, a scanning line driving circuit 110 for driving the scanning line 102, and a common electrode line driving circuit 111 for driving the common electrode line 105. It is located in the periphery.
The scan driving circuit 110 is composed of a shift register and a buffer which outputs two values of Voff and Von based on the start signal VS and the clock signal Vclk. Similarly, the common electrode line drive circuit 111 is composed of a shift register and a switch that generate three values of Ve-, Ve and Ve + based on the start signal VS and the clock signal Vclk.
【０００６】次に動作を図５の波形図とともに説明す
る。ある走査線の波形ＶｇはＨ期間幅でＶｏｎであり、
次のフィルード期間（＝Ｖ期間）はＶｏｆｆに保持し、
後にＶｏｎをＨ期間出力し、これを繰り返す。信号線駆
動回路１０９は映像信号によって異なるが、一様な信号
が入力されているとすると図５に示すようにＨ期間毎に
極性の反転した信号Ｖｓが出力される。画素電極１０４
の電位ＶｄはＶｇがＶｏｎの期間、スイッチング素子１
０３は導通し信号線波形Ｖｓ（この場合負極性）と同電
位となる。この期間内に共通電極線１０５の電位をＶｅ
からＶｅ＋にしておく。そしてＶｇがＶｏｆｆとなる瞬
間、ゲート−ドレイン間容量１０８を通じて画素電極電
位は僅かに負にシフトする（ゲート−ドレイン間容量１
０８は液晶１０７の容量と保持容量１０６の総和よりも
一桁小さい）。その後、共通電極線１０５の電位がＶｅ
＋からＶｅに下がるため、画素電極電位Ｖｄはほぼこの
電位差分負側にシフトし、次のＶｇがＶｏｎになるまで
スイッチング素子が遮断状態であるので保持される。次
のＶｏｎの期間、Ｖｓは正極性であり、Ｖｄは負側から
正側のＶｓまで充電される。この期間共通電極１０５の
電位をＶｅからＶｅ−にしておく。そして同様にＶｏｎ
からＶｏｆｆの瞬間、僅かな負側シフトした後、共通電
極１０５の電位がＶｅ−からＶｅに上がり、Ｖｄは正側
にこの電位差分シフトし、保持される。Next, the operation will be described with reference to the waveform chart of FIG. The waveform Vg of a certain scanning line is Von in the H period width,
Hold at Voff for the next field period (= V period),
After that, Von is output for H period and this is repeated. Although the signal line drive circuit 109 varies depending on the video signal, if a uniform signal is input, a signal Vs whose polarity is inverted is output every H period as shown in FIG. Pixel electrode 104
The potential Vd of the switching element 1 is in the period when Vg is Von.
03 becomes conductive and has the same potential as the signal line waveform Vs (negative polarity in this case). Within this period, the potential of the common electrode line 105 is changed to Ve.
To Ve +. Then, at the moment when Vg becomes Voff, the pixel electrode potential shifts to a slight negative value through the gate-drain capacitance 108 (gate-drain capacitance 1
08 is one digit smaller than the sum of the capacity of the liquid crystal 107 and the holding capacity 106). After that, the potential of the common electrode line 105 is Ve
Since the potential Vd drops from + to Ve, the pixel electrode potential Vd substantially shifts to the negative side of the potential difference, and the switching element is kept in the cutoff state until the next Vg becomes Von. During the next Von period, Vs has a positive polarity and Vd is charged from the negative side to the positive side Vs. During this period, the potential of the common electrode 105 is changed from Ve to Ve−. And likewise Von
After a slight negative shift from Voff to Voff, the potential of the common electrode 105 rises from Ve- to Ve, and Vd shifts to the positive side by this potential difference and is held.
【０００７】これを繰り返して信号線Ｖｓの振幅よりも
大きな振幅を画素電極に与えることが可能となる。この
時、Ｖｅ＋とＶｅ−の振幅を効率よくＶｄに伝達するた
めには保持容量を大きくして液晶容量との比を数倍にし
ておく方が望ましい。以上述べた動作により、走査線波
形ＶｇはＶｏｎからＶｏｆｆまでの振幅に抑えられる効
果を得るものである。By repeating this, it becomes possible to give an amplitude larger than that of the signal line Vs to the pixel electrode. At this time, in order to efficiently transmit the amplitudes of Ve + and Ve- to Vd, it is desirable to increase the storage capacitance and make the ratio with the liquid crystal capacitance several times. With the above-described operation, the scanning line waveform Vg has the effect of being suppressed to the amplitude from Von to Voff.
【０００８】[0008]
【発明が解決しようとする課題】しかし、従来の構成と
方法では、まず共通電極の出力値が３値であるので、共
通電極駆動回路の構成が単純なバッファ構成ではでき
ず、煩雑になる。そしてこの共通電極の出力を形成する
さいに液晶パネルのブライト調整のためＶｅ＋とＶｅ−
の振幅を連動して調整する必要があり、通常は低出力イ
ンピーダンスのオペアンプを複数個用いるため、実装面
積や消費電力の増大が問題となった。さらに走査線駆動
回路と共通電極駆動回路を両側に構成すると回路の信号
線や電源を引きまわせばならなくなり、パネルの周辺サ
イズの増大や外部回路との接続個所が複数になるおそれ
がある。また、保持容量を大きくするとパネルの開口率
が低下し暗くなるという課題もあった。However, in the conventional configuration and method, since the output value of the common electrode is three-valued, the configuration of the common electrode drive circuit cannot be a simple buffer configuration and is complicated. When the output of the common electrode is formed, Ve + and Ve- are used for adjusting the brightness of the liquid crystal panel.
It is necessary to adjust the amplitude of each of them, and usually, a plurality of operational amplifiers having a low output impedance are used, so that the mounting area and power consumption increase. Further, if the scanning line drive circuit and the common electrode drive circuit are formed on both sides, the signal lines and power supplies of the circuit will have to be drawn together, which may increase the peripheral size of the panel and multiple connection points with external circuits. There is also a problem that the aperture ratio of the panel is lowered and the panel becomes dark when the storage capacitance is increased.
【０００９】[0009]
【課題を解決するための手段】本願の第１の発明は、第
１の基板上に設けられた複数の信号線と、これを駆動す
る信号線駆動回路と、前記信号線と直交する複数の走査
線と、これを駆動する走査線駆動回路と、前記信号線と
前記走査線の交点近傍に設けられたスイッチング素子
と、前記スイッチング素子に接続された画素電極と、前
記走査線と対になり概平行配置された共通電極線と、前
記画素電極に一端を接続し他端は前記共通電極線に接続
された保持容量と、前記共通電極を駆動する共通電極駆
動回路と、前記第１の基板と液晶層を介して対峙するコ
モン電極を持つ第２の基板とからなり、前記共通電極駆
動回路は前記走査線駆動回路と同期しかつ出力を２値と
し、前記コモン電極には一定値の電圧が印加されている
液晶表示装置である。前記コモン電極に印加される電圧
は前記信号線に印加される矩形パルス電圧のセンタ値よ
りも小さいことが好ましい。 According to a first aspect of the present invention, a plurality of signal lines provided on a first substrate, a signal line drive circuit for driving the signal lines, and a plurality of signal lines orthogonal to the signal lines are provided. A scanning line, a scanning line driving circuit for driving the scanning line, a switching element provided near the intersection of the signal line and the scanning line, a pixel electrode connected to the switching element, and the scanning line paired. A common electrode line arranged substantially in parallel, a storage capacitor having one end connected to the pixel electrode and the other end connected to the common electrode line, a common electrode drive circuit for driving the common electrode, and the first substrate And a second substrate having a common electrode facing each other through a liquid crystal layer, wherein the common electrode drive circuit is synchronized with the scanning line drive circuit and the output is binary.
However, a constant voltage is applied to the common electrode.
It is a liquid crystal display device . Voltage applied to the common electrode
Is the center value of the rectangular pulse voltage applied to the signal line.
It is preferably smaller than
【００１０】[0010]
【００１１】[0011]
【００１２】[0012]
【発明の実施の形態】本発明の第１の実施例を図１に示
し、図と共に説明する。基本的に図８と同一機能のもの
は同一番号を付す。信号線駆動回路１０９と走査線駆動
回路１１０並びに画素表示部は図８と同等の動作を行っ
ている。共通電極線駆動回路１１２は図８と異なり、出
力は２値であり、さらに走査線駆動回路１１０と同一側
に配置される。図２に波形を示し、動作を説明する。走
査線波形Ｖｇと信号線波形Ｖｓは図５と同等に１Ｈ期間
単位で変化し、１Ｖ期間周期を繰り返している。最初の
Ｖｏｎの期間に画素電極電位Ｖｄは負極性の信号線波形
Ｖｓと同電位となり、その後のＶｇがＶｏｆｆへの変化
時の僅かな負のシフトが発生する。ここまでは図５と同
様である。その期間の共通線電極電位はＶｅ＋を前のフ
ィールド期間から保っており、このＶｇがＶｏｆｆにな
った後、Ｖｅ＋からＶｅ−に下がり、この振幅分Ｖｄを
負側にシフトさせる。そしてフィルード期間（＝Ｖ期
間）この状態を保持し、次のＶｏｎ期間にＶｄをＶｓの
正極側に充電する。その次のＶｄの僅かな負シフトの
後、共通線電極電位をＶｅ−からＶｅ＋へと上げ、この
振幅分Ｖｄを正側にシフトさせる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention is shown in FIG. 1 and will be described with reference to the drawings. Basically, the same functions as those in FIG. 8 are designated by the same reference numerals. The signal line driver circuit 109, the scanning line driver circuit 110, and the pixel display portion perform the same operations as in FIG. Unlike the configuration shown in FIG. 8, the common electrode line driving circuit 112 has a binary output and is arranged on the same side as the scanning line driving circuit 110. Waveforms are shown in FIG. 2 to explain the operation. The scanning line waveform Vg and the signal line waveform Vs change in units of 1H period as in FIG. 5, and the 1V period cycle is repeated. In the first Von period, the pixel electrode potential Vd becomes the same potential as the negative signal line waveform Vs, and a slight negative shift occurs when Vg changes to Voff after that. Up to this point, the process is the same as in FIG. The common line electrode potential during that period is kept at Ve + from the previous field period, and after this Vg becomes Voff, it drops from Ve + to Ve-, and this amplitude Vd is shifted to the negative side. Then, this state is maintained during the field period (= V period), and Vd is charged to the positive electrode side of Vs during the next Von period. After the next slight negative shift of Vd, the common line electrode potential is raised from Ve- to Ve +, and the amplitude Vd is shifted to the positive side.
【００１３】これを繰り返して図５同様に信号線波形Ｖ
ｓよりも大きな振幅を得ることが可能となる。この場
合、共通線電極電位は２値なので、正側と負側も同一振
幅となり、ＶｇのＶｏｆｆ変化に伴う僅かな負側シフト
の分、液晶１０７のコモン電極Ｖｃを信号線波形Ｖｓの
センタ値より下げておけば液晶にＤＣが印可されること
なくフリッカ、焼き付き等の問題は発生しない。これに
より、共通電極線駆動回路１１２は２値の出力であって
も、Ｖｄの増大とＶｇの抑制を両立することが可能とな
る。By repeating this, the signal line waveform V is obtained as in FIG.
It is possible to obtain an amplitude larger than s. In this case, since the common line electrode potential is binary, the positive side and the negative side have the same amplitude, and the common electrode Vc of the liquid crystal 107 is set to the center value of the signal line waveform Vs by a slight negative side shift due to the change in Vg of Vg. If it is further lowered, DC is not applied to the liquid crystal, and problems such as flicker and burn-in do not occur. As a result, the common electrode line drive circuit 112 can both increase Vd and suppress Vg even if the output is binary.
【００１４】そして、図１に示すように走査線駆動回路
１１０と共通電極線駆動回路１１２は同一側に配置され
るため、スタート信号Ｖ−Ｓとクロック信号Ｖｃｌｋを
共通に使用できる。図示はしてないが他に電源配線等も
共通化が可能となり、配線引き回しが短くなる、外部回
路の接続も基本的に一個所ですむという利点が得られ
る。Since the scanning line driving circuit 110 and the common electrode line driving circuit 112 are arranged on the same side as shown in FIG. 1, the start signal VS and the clock signal Vclk can be commonly used. Although not shown in the figure, it is possible to share the power supply wiring and the like in addition to the above, and it is possible to obtain the advantages that the wiring can be shortened and the external circuit can be basically connected in only one place.
【００１５】次に本発明の別な観点を述べる。図２で説
明したように、ある走査線と共通電極線のペアにとり、
フィールド期間で１回の共通電極線の変化があり、この
ペアが垂直方向にシフトしながら、全画面の書き込みを
行う。つまり、共通電極線駆動回路１１２にとり、変化
するのは１Ｈ期間に１本の共通電極線であり、それ以外
の共通電極線は保持状態にある。発明者らはこれに注目
し共通線電極駆動回路１１２の出力インピーダンスの許
容値を求めてみると、パネルサイズによって異なるがほ
ぼ数ｋΩのオーダーであることが判明した。このことと
２値出力であるということからブライト調整を1個の可
変抵抗器で行うことが可能となる。液晶印加電圧の大小
を調整して画像の明るさを変える、いわゆるブライト調
整は、従来図５に示す共通電極線の振幅、Ｖｅ＋とＶｅ
−の振幅を変えることで行っていた。このＶｅ＋とＶｅ
−の振幅を連動して変えるということはオペアンプを２
個以上使う複雑な構成をとらざるをえなかった。Next, another aspect of the present invention will be described. As described in FIG. 2, for a certain scan line and common electrode line pair,
There is a change in the common electrode line once in the field period, and while this pair shifts in the vertical direction, writing on the entire screen is performed. That is, for the common electrode line drive circuit 112, it is only one common electrode line that changes during the 1H period, and the other common electrode lines are in the holding state. When the inventors pay attention to this and obtain the allowable value of the output impedance of the common line electrode driving circuit 112, it is found that it is on the order of several kΩ although it varies depending on the panel size. Because of this and the binary output, it is possible to perform bright adjustment with one variable resistor. The so-called bright adjustment, in which the brightness of an image is changed by adjusting the magnitude of the voltage applied to the liquid crystal, is conventionally performed by using the common electrode line amplitudes Ve + and Ve shown in FIG.
It was done by changing the amplitude of-. This Ve + and Ve
Changing the amplitude of-in conjunction with the operational amplifier
I had to take a complicated configuration that used more than one piece.
【００１６】本発明ではこれが図３に示す簡単な構成で
可能である。図３において２０１は可変抵抗器であり、
既存の回路の電源Ｖｄｄと接地電位Ｖｓｓの間に接続
し、中点をＶｅ＋として共通線電極駆動回路１１２の出
力回路に接続してある。通常のツイストネマティック液
晶ではＶｓｓが５Ｖ程度、Ｖｅ＋とＶｅ−の振幅が４Ｖ
から５Ｖで正常な画面が得られるので、Ｖｄｄとしては
ありふれた＋５Ｖ電源が使用可能である。もし、ブライ
ト調整が不要ないし信号線駆動回路１０９にその機能が
あるならば、Ｖｅ−とＶｅ＋は固定電源に接続してもか
まわないのは当然である。In the present invention, this is possible with the simple construction shown in FIG. In FIG. 3, 201 is a variable resistor,
It is connected between the power supply Vdd of the existing circuit and the ground potential Vss, and is connected to the output circuit of the common line electrode drive circuit 112 with the middle point being Ve +. In a normal twisted nematic liquid crystal, Vss is about 5V and the amplitude of Ve + and Ve- is 4V.
Since a normal screen can be obtained from 5 V to +5 V, a common +5 V power source can be used as Vdd. If the brightness adjustment is unnecessary or the signal line drive circuit 109 has the function, it is natural that Ve− and Ve + may be connected to a fixed power source.
【００１７】なお、図３ではＶｓｓを共通して使用して
いるがその逆にＶｄｄを共通とし、Ｖｅ−側を可変して
も良く、その効果は変わらない。そしてある瞬間では１
本の共通電極線のみ変化し、それ以外の共通電極線は保
持状態にある点を更に検討すると他の共通電極線自身が
平滑コンデンサとして動作し、別途図３の可変抵抗器２
０１の中点に別途平滑コンデンサを付加する必要が実用
上ないことを見出した。これにより構成が更に簡便とな
った。これらの利点は信号線駆動回路１０９がディジタ
ル入力の構成時に全体的なブライト調整がしにくいため
特に大きいものがある。Although Vss is used in common in FIG. 3, conversely, Vdd may be used in common and the Ve− side may be varied, and the effect remains the same. And at one moment 1
Considering further that only the common electrode lines of the book are changed and the other common electrode lines are in the holding state, the other common electrode lines themselves operate as a smoothing capacitor, and the variable resistor 2 shown in FIG.
It was found that it is practically unnecessary to add a smoothing capacitor to the middle point of 01. This makes the structure even simpler. These advantages are particularly great because it is difficult for the signal line drive circuit 109 to adjust the overall brightness when the digital input circuit is configured.
【００１８】この出力インピーダンスと平滑コンデンサ
不要の観点は従来の３値出力の共通電極線駆動回路１１
１でも適用できる。その全体構成を図４に示す。図１と
同機能のものは同一番号を付し説明を省略する。図１と
異なるのは共通電極線駆動回路１１３が３値、Ｖｅ−と
ＶｅとＶｅ＋という点である。この具体例を図６に示
す。図６の可変抵抗器２０２と可変抵抗器２０３にてＶ
ｅ＋とＶｅ−を作り出す。平滑コンデンサ不要な点も前
述同様である。From the viewpoint of the output impedance and the need for no smoothing capacitor, the conventional common electrode line driving circuit 11 for three-value output is used.
1 is also applicable. The overall structure is shown in FIG. Those having the same functions as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. The difference from FIG. 1 is that the common electrode line drive circuit 113 has three values, Ve−, Ve, and Ve +. A specific example of this is shown in FIG. V in the variable resistor 202 and the variable resistor 203 in FIG.
Create e + and Ve-. The point that a smoothing capacitor is not necessary is the same as described above.
【００１９】本発明の別な実施例を図７に示し図と共に
説明する。図７は反射型液晶に適用した場合の１画素の
平面図を示したもので、１０１は信号線、１０２は走査
線、１０３はスイッチング素子、１０４は画素電極、１
０５は共通電極線、斜線部１０６は保持容量である。こ
こで画素電極１０４は通常アルミニウムの反射板構成で
最上部に形成される。これに対し一般的な透過型液晶の
画素電極はＩＴＯ等の透明導体で構成され、共通電極線
１０５を太くするとこの共通電極線は金属のため遮光さ
れて暗くなるという欠点があった。反射型液晶構成で
は、保持容量１０６の面積も表示に有効に使用できる。
つまり、保持容量を大きくして共通電極線駆動回路の振
幅を小さくすることに対して開口率の低下という不利の
ない構成とすることができる。Another embodiment of the present invention is shown in FIG. 7 and will be described with reference to the drawing. FIG. 7 is a plan view of one pixel when applied to a reflective liquid crystal, where 101 is a signal line, 102 is a scanning line, 103 is a switching element, 104 is a pixel electrode, and 1 is a pixel electrode.
Reference numeral 05 is a common electrode line, and hatched portion 106 is a storage capacitor. Here, the pixel electrode 104 is usually formed on the uppermost part with a reflector structure made of aluminum. On the other hand, a pixel electrode of a general transmissive liquid crystal is composed of a transparent conductor such as ITO, and if the common electrode line 105 is thickened, the common electrode line is made of metal so that it is shielded from light and becomes dark. In the reflective liquid crystal structure, the area of the storage capacitor 106 can be effectively used for display.
That is, it is possible to adopt a configuration in which the aperture ratio is not lowered as compared with the case where the storage capacitor is increased and the amplitude of the common electrode line drive circuit is decreased.
【００２０】本発明は走査線と共通電極線というペアで
駆動するため、通常の走査線数よりも２倍の駆動回路が
必要となる。このため、これらの駆動回路を外付けする
よりも、多結晶シリコンや単結晶シリコンにより画素表
示部のスイッチング素子と同一基板に内蔵する構成の方
が接続点数も少なくすみ実用性が高い。むろん動作速度
は１０ｋＨｚ〜３０ｋＨｚであるので非晶質シリコでも
動作可能である。Since the present invention is driven by a pair of scanning lines and common electrode lines, a driving circuit twice as many as the normal number of scanning lines is required. Therefore, the number of connection points is smaller and the practicability is higher than the case where these drive circuits are externally attached and the configuration in which the switching element of the pixel display section is incorporated in the same substrate by polycrystalline silicon or single crystal silicon is smaller. Of course, since the operating speed is 10 kHz to 30 kHz, it is possible to operate even in amorphous silicon.
【００２１】[0021]
【発明の効果】本発明の第１の実施例によれば共通電極
線駆動回路の出力が２値ですむので、その出力回路の構
成が簡単になり、このうち片方の電位を可変とすること
でブライト調整を実現できる。According to the first embodiment of the present invention, since the output of the common electrode line drive circuit can be binary, the configuration of the output circuit is simplified and one of the potentials can be made variable. Bright adjustment can be achieved with.
【００２２】[0022]
【００２３】[0023]
【００２４】別な観点からは、可変抵抗器に簡便な構成
でブライト調整が可能となる利点がある。さらに走査線
駆動回路や共通電極線駆動回路を画面表示部のスイッチ
ング素子と同一基板上に同一工程で形成する内蔵回路と
することでより実用性は高まる。From another point of view, the variable resistor has an advantage that bright adjustment can be performed with a simple structure. Further, the scanning line drive circuit and the common electrode line drive circuit are built-in circuits formed in the same step on the same substrate as the switching elements of the screen display section, so that the practicality is enhanced.
【図１】第１の本発明の構成図FIG. 1 is a block diagram of the first invention.
【図２】第１の本発明の動作説明図FIG. 2 is an operation explanatory diagram of the first invention.
【図３】電圧発生の構成図FIG. 3 is a block diagram of voltage generation
【図４】第２の本発明の構成図FIG. 4 is a block diagram of the second invention.
【図５】第２の本発明の動作説明図FIG. 5 is an operation explanatory diagram of the second invention.
【図６】第２の本発明の電圧発生の構成図FIG. 6 is a configuration diagram of voltage generation of the second invention.
【図７】第３の本発明による画素構成図FIG. 7 is a pixel configuration diagram according to the third invention.
【図８】従来の構成図FIG. 8 is a conventional configuration diagram.
１０１ 信号線 １０２ 走査線 １０３ スイッチング素子 １０４ 画素電極 １０５ 共通電極線 １０６ 保持容量 １０７ 液晶 １０８ ゲート−ドレイン間容量 １０９ 信号線駆動回路 １１０ 走査線駆動回路 １１１，１１２，１１３ 共通電極線駆動回路 ２０１，２０２，２０３ 可変抵抗器 101 signal line 102 scan lines 103 switching element 104 pixel electrode 105 common electrode wire 106 holding capacity 107 LCD 108 Gate-drain capacitance 109 signal line drive circuit 110 scanning line drive circuit 111, 112, 113 common electrode line drive circuit 201,202,203 Variable resistor
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ Ｇ０９Ｇ 3/36 Ｇ０９Ｇ 3/36 (58)調査した分野(Int.Cl.7，ＤＢ名) G02F 1/13 - 1/141 G09G 3/20 G09G 3/36 ─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 7 Identification code FI G09G 3/36 G09G 3/36 (58) Fields investigated (Int.Cl. 7 , DB name) G02F 1/13-1/141 G09G 3/20 G09G 3/36
Claims (16)
と、前記信号線を駆動する信号線駆動回路と、前記信号
線と直交する複数の走査線と、前記走査線を駆動する走
査線駆動回路と、前記信号線と前記走査線の交点近傍に
設けられたスイッチング素子と、前記スイッチング素子
に接続された画素電極と、前記走査線と対になり概平行
配置された共通電極線と、前記画素電極に一端を接続し
他端は前記共通電極線に接続された保持容量と、前記共
通電極線を駆動する共通電極線駆動回路と、前記第１の
基板と液晶層を介して対峙するコモン電極を持つ第２の
基板とからなり、前記共通電極線駆動回路は前記走査線
駆動回路と同期しかつ出力が２値であり、前記コモン電
極には一定値の電圧が印加されていることを特徴とする
液晶表示装置。1. A plurality of signal lines provided on a first substrate, a signal line driving circuit for driving the signal lines, a plurality of scanning lines orthogonal to the signal lines, and driving the scanning lines. A scanning line driving circuit, a switching element provided in the vicinity of the intersection of the signal line and the scanning line, a pixel electrode connected to the switching element, and a common electrode line paired with the scanning line and arranged substantially parallel to each other. A storage capacitor having one end connected to the pixel electrode and the other end connected to the common electrode line; a common electrode line drive circuit for driving the common electrode line; and the first substrate and a liquid crystal layer. A second substrate having a common electrode facing each other, wherein the common electrode line driving circuit is synchronized with the scanning line driving circuit and has a binary output ,
A liquid crystal display device characterized in that a constant voltage is applied to the poles .
と、前記信号線を駆動する信号線駆動回路と、前記信号
線と直交する複数の走査線と、前記走査線を駆動する走
査線駆動回路と、前記信号線と前記走査線の交点近傍に
設けられたスイッチング素子と、前記スイッチング素子
に接続された画素電極と、前記走査線と対になり概平行
配置された共通電極線と、前記画素電極に一端を接続し
他端は前記共通電極線に接続された保持容量と、前記共
通電極線を駆動する共通電極線駆動回路と、前記第１の
基板と液晶層を介して対峙するコモン電極を持つ第２の
基板とからなり、前記共通電極線駆動回路は前記走査線
駆動回路と同期しかつ出力が２値であり、 前記コモン電
極には一定値の電圧が印加されており、前記コモン電極
に印加される電圧は前記信号線に印加される矩形パルス
電圧のセンタ値よりも小さいことを特徴とする液晶表示
装置。2. A plurality of signal lines provided on a first substrate, a signal line driving circuit for driving the signal lines, a plurality of scanning lines orthogonal to the signal lines, and driving the scanning lines. A scanning line driving circuit, a switching element provided in the vicinity of the intersection of the signal line and the scanning line, a pixel electrode connected to the switching element, and a common electrode line paired with the scanning line and arranged substantially parallel to each other. A storage capacitor having one end connected to the pixel electrode and the other end connected to the common electrode line; a common electrode line drive circuit for driving the common electrode line; and the first substrate and a liquid crystal layer. consists of a second substrate having opposed to the common electrode, the common electrode line drive circuit is the scanning line driving circuit and the only One sync output binary, the common collector
A constant voltage is applied to the electrodes,
The voltage applied to is a rectangular pulse applied to the signal line.
A liquid crystal display device characterized by being smaller than the center value of voltage .
ち片方が可変であることを特徴とする請求項１記載の液
晶表示装置。3. The liquid crystal display device according to claim 1, wherein one of binary output of the common electrode line drive circuit is variable.
力であることを特徴とする請求項２記載の液晶表示装
置。4. The liquid crystal display device according to claim 2, wherein the signal line drive circuit is a digital signal input.
片方ないし両方が抵抗を介して固定電源に接続されたこ
とを特徴とする請求項１記載の液晶表示装置。5. Of the outputs of the common electrode line drive circuit,
2. The liquid crystal display device according to claim 1, wherein one or both of them are connected to a fixed power source via a resistor.
コンデンサが接続されていないことを特徴とする請求項
１記載の液晶表示装置。6. The liquid crystal display device according to claim 1, wherein a smoothing capacitor is not connected to the output of the common electrode line drive circuit.
動回路が多結晶シリコンを用い、かつ第１の基板上に形
成されていることを特徴とする請求項１記載の液晶表示
装置。7. The liquid crystal display device according to claim 1, wherein the scanning line drive circuit and the common electrode line drive circuit are made of polycrystalline silicon and are formed on a first substrate.
動回路が非晶質シリコンを用い、かつ第１の基板上に形
成されていることを特徴とする請求項１記載の液晶表示
装置。8. The liquid crystal display device according to claim 1, wherein the scanning line driving circuit and the common electrode line driving circuit are made of amorphous silicon and are formed on a first substrate.
動回路が単結晶シリコンを用い、かつ第１の基板上に形
成されていることを特徴とする請求項１記載の液晶表示
装置。9. The liquid crystal display device according to claim 1, wherein the scanning line driving circuit and the common electrode line driving circuit are made of single crystal silicon and are formed on a first substrate.
線と、前記信号線を駆動する信号線駆動回路と、前記信
号線と直交する複数の走査線と、前記走査線を駆動する
走査線駆動回路と、前記信号線と前記走査線の交点近傍
に設けられたスイッチング素子と、前記スイッチング素
子に接続された画素電極と、前記走査線と対になり概平
行配置された共通電極線と、前記画素電極に一端を接続
し他端は前記共通電極線に接続された保持容量と、前記
共通電極線を駆動する共通電極線駆動回路と、前記第１
の基板と液晶層を介して対峙するコモン電極を持つ第２
の基板とからなり、前記コモン電極には一定値の電圧が
印加されており、前記共通電極は対となる走査電極がオ
ンからオフに変化後、ある電位Ａからもう一つの電位Ｂ
に変化することで補助容量を通じて画素電極に一定のバ
イアス電圧を与え、共通電極の電位Ｂは１フィールド期
間を保持し、つぎの走査電極がオンからオフに変化した
後に共通電極を電位Ａに戻すことで画素電極に逆のバイ
アス電圧を与えることを特徴とする液晶表示装置の駆動
方法。10. A plurality of signal lines provided on a first substrate, a signal line driving circuit for driving the signal lines, a plurality of scanning lines orthogonal to the signal lines, and driving the scanning lines. A scanning line driving circuit, a switching element provided in the vicinity of the intersection of the signal line and the scanning line, a pixel electrode connected to the switching element, and a common electrode line paired with the scanning line and arranged substantially parallel to each other. A storage capacitor having one end connected to the pixel electrode and the other end connected to the common electrode line; a common electrode line drive circuit for driving the common electrode line;
Second common electrode that has a common electrode that faces the substrate through the liquid crystal layer
And a common voltage is applied to the common electrode.
The common electrode is applied to the common electrode from one potential A to another potential B after the paired scan electrodes change from on to off.
By changing to, a constant bias voltage is applied to the pixel electrode through the auxiliary capacitor, the potential B of the common electrode is held for one field period, and the common electrode is returned to the potential A after the next scan electrode changes from on to off. method of driving a liquid crystal display device, characterized in that may grant the reverse bias voltage to the pixel electrodes by.
線と、前記信号線を駆動する信号線駆動回路と、前記信
号線と直交する複数の走査線と、前記走査線を駆動する
走査線駆動回路と、前記信号線と前記走査線の交点近傍
に設けられたスイッチング素子と、前記スイッチング素
子に接続された画素電極と、前記走査線と対になり概平
行配置された共通電極線と、前記画素電極に一端を接続
し他端は前記共通電極線に接続された保持容量と、前記
共通電極線を駆動する共通電極線駆動回路と、前記第１
の基板と液晶層を介して対峙するコモン電極を持つ第２
の基板とからなり、前記コモン電極には一定値の電圧が
印加されており、前記コモン電極に印加される電圧は前
記信号線に印加される矩形パルス電圧のセンタ値よりも
小さく、前記共通電極は対となる走査電極がオンからオ
フに変化後、ある電位Ａからもう一つの電位Ｂに変化す
ることで補助容量を通じて画素電極に一定のバイアス電
圧を与え、共通電極の電位Ｂは１フィールド期間を保持
し、つぎの走査電極がオンからオフに変化した後に共通
電極を電位Ａに戻すことで画素電極に逆のバイアス電圧
を与えることを特徴とする液晶表示装置の駆動方法。11. A plurality of signal lines provided on a first substrate, a signal line driving circuit for driving the signal lines, a plurality of scanning lines orthogonal to the signal lines, and driving the scanning lines. A scanning line driving circuit, a switching element provided in the vicinity of the intersection of the signal line and the scanning line, a pixel electrode connected to the switching element, and a common electrode line paired with the scanning line and arranged substantially parallel to each other. A storage capacitor having one end connected to the pixel electrode and the other end connected to the common electrode line; a common electrode line drive circuit for driving the common electrode line;
Second common electrode that has a common electrode that faces the substrate through the liquid crystal layer
And a common voltage is applied to the common electrode.
The voltage applied to the common electrode is
Than the center value of the rectangular pulse voltage applied to the signal line
The common electrode is small, and after the paired scan electrodes change from on to off, the potential changes from one potential A to another potential B to apply a constant bias voltage to the pixel electrode through the auxiliary capacitance, thereby reducing the potential of the common electrode. B holds one field period, driving of the liquid crystal display device, characterized in that may grant the reverse bias voltage to the pixel electrode by returning the common electrode potential a after the next scanning electrode is changed from oN to oFF Method.
うちどちらかを可変とし、ブライト調整機能を持たせる
ことを特徴とする請求項１０記載の液晶表示装置の駆動
方法。12. The method of driving a liquid crystal display device according to claim 10, wherein either the potential A or the potential B of the common electrode is made variable so as to have a brightness adjusting function.
駆動回路は表示画面に対して片側にまとめて配置され、
入力信号を一部共用することを特徴とする請求項１に記
載の液晶表示装置。13. The scanning line drive circuit and the common electrode line
The drive circuits are arranged together on one side of the display screen,
The input signal is partly shared, according to claim 1,
Placing a liquid crystal display device.
駆動回路は表示画面に対して片側にまとめて配置され、
入力信号を一部共用することを特徴とする請求項１０に
記載の液晶表示方法。14. The scan line drive circuit and the common electrode line
The drive circuits are arranged together on one side of the display screen,
The input signal is partly shared, according to claim 10.
The liquid crystal display method described .
を特徴とする請求項１に記載の液晶表示装置。15. The pixel electrode is a reflective electrode
The liquid crystal display device according to claim 1 .
を特徴とする請求項１０に記載の液晶表示方法。16. The pixel electrode is a reflective electrode
The liquid crystal display method according to claim 10, wherein:
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25522899A JP3402277B2 (en) | 1999-09-09 | 1999-09-09 | Liquid crystal display device and driving method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25522899A JP3402277B2 (en) | 1999-09-09 | 1999-09-09 | Liquid crystal display device and driving method |
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| Publication Number | Publication Date |
|---|---|
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| JP3402277B2 true JP3402277B2 (en) | 2003-05-06 |
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Cited By (1)
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| US8654288B2 (en) | 2008-08-05 | 2014-02-18 | Sharp Kabushiki Kaisha | Method for manufacturing liquid crystal display device including forming alignment sustaining layers |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100758622B1 (en) | 2000-01-14 | 2007-09-13 | 마쯔시다덴기산교 가부시키가이샤 | Active matrix display apparatus and method for driving the same |
| JP4241781B2 (en) | 2006-08-10 | 2009-03-18 | エプソンイメージングデバイス株式会社 | Electro-optical device, drive circuit, and electronic device |
| JP4254824B2 (en) | 2006-09-01 | 2009-04-15 | エプソンイメージングデバイス株式会社 | Electro-optical device, drive circuit, and electronic device |
| JP4192980B2 (en) | 2006-09-01 | 2008-12-10 | エプソンイメージングデバイス株式会社 | Electro-optical device, drive circuit, and electronic device |
| KR101206726B1 (en) * | 2006-09-14 | 2012-11-30 | 삼성디스플레이 주식회사 | Display apparatus |
| JP4873760B2 (en) | 2007-03-16 | 2012-02-08 | シャープ株式会社 | Liquid crystal display device and driving method thereof |
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| CN102576516B (en) | 2009-10-16 | 2014-12-17 | 夏普株式会社 | Display driving circuit, display device, and display driving method |
| BR112012008660A2 (en) | 2009-10-16 | 2016-04-19 | Sharp Kk | display trigger circuit, display device, and display trigger method |
| WO2011048843A1 (en) | 2009-10-20 | 2011-04-28 | シャープ株式会社 | Display apparatus |
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- 1999-09-09 JP JP25522899A patent/JP3402277B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8654288B2 (en) | 2008-08-05 | 2014-02-18 | Sharp Kabushiki Kaisha | Method for manufacturing liquid crystal display device including forming alignment sustaining layers |
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| JP2001083943A (en) | 2001-03-30 |
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