JP3371068B2 - Semiconductor switching device, semiconductor stack device and power conversion device using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor switching device having a gate electrode and a gate driver for supplying a turn-off current between a gate electrode and a cathode electrode of the semiconductor switching device via a current path. The present invention relates to a switching device, a semiconductor stack device and a power conversion device using the semiconductor switching device.

[0002]

FIG. 33 shows an example of a circuit configuration of a conventional semiconductor switching device. In the figure, reference numeral 3
P is a semiconductor switching element, here it is a GTO (gate turn-off thyristor). GT
A gate driver 4P that generates a gate turn-on control current I _GP is connected between the gate and the cathode of O3P, and the driver 4P applies the gate turn-on control current I _GP to the gate of the GTO 3P, thereby allowing GT
Turn on O3P. Furthermore, the driver 4P is
A gate reverse current I _GQP given with a current change rate dI _GQP / dt of 20 to 50 A / μs is applied from the gate to the cathode. The gate reverse current I _GQP is a shunt of the anode current I _AP . At this time, the turn-off gain has a value within the range of 2 to 5, and the GTO 3P turns off.

Further, the voltage V between the anode electrode and the cathode electrode
_A snubber circuit is generally used to suppress the rate of increase in _AKP (dV _AKP / dt) and the surge voltage. Here, the snubber circuit is configured as follows. That is, the snubber capacitor Cs and the snubber diode D _S are connected in parallel to the GTO 3P, and the snubber resistor R _S causes the snubber diode R _S to discharge the charge stored in the snubber capacitor Cs when the GTO 3P is turned off. It is connected in parallel to D _S.

Further, the inductance 1P is the rate of increase dI of the anode current I _AP flowing when the GTO 3P is turned on.
_AP / dt is to be suppressed to 1000 A / μs or less, and the free wheeling diode 2P connected in parallel with the inductance 1P is to return the energy generated in the inductance 1P when the GTO 3P is turned off.

The inductance Ls is the stray inductance of the wiring of the snubber circuit.

A measured waveform obtained by performing a turn-off test on the circuit of the semiconductor switching device described above is
It shows in FIG. In the figure, waveforms C1P, C2P, and C3P are waveforms showing the anode current I _AP , the voltage V _AKP between the anode electrode and the cathode electrode, and the gate reverse current I _GQP , respectively, and the horizontal axis is the time axis.

In FIG. 34, at time tP1, GTO3
P is in the turn-on state and the gate reverse current I _GQP is in the 0 state. At this time, the rate of increase d of the gate reverse current I _GQP
The gate reverse current I _GQP is raised with the absolute value of I _GQP / dt set to 20 to 50 A / μs, and the turn-off gain (absolute value of the ratio given by the anode current I _AP / gate reverse current I _GQP ) of the GTO3P itself is measured. When the turn-off gain reaches the threshold value (time tP2), the anode current I _AP begins to decrease, and the voltage V between the anode electrode and the cathode electrode of the GTO 3P becomes V.
_AKP begins to rise. At this time, the current I _S also flows out to the snubber circuit side described above, and a voltage is generated by the rate of increase of this current I _S and the inductance (snubber inductance) Ls of the snubber circuit. This voltage is generated between the anode electrode and the cathode electrode. As a result of being superimposed on the voltage V _AKP , a spike voltage V _DSP is generated (time tP3). This spike voltage V _DSP causes power loss. For example, about 40
When a current of 00A flows, the power loss becomes several MW. Therefore, it is necessary to suppress this spike voltage V _DSP to a value as low as possible, and efforts have been continued to reduce the snubber inductance L _S than before.

Further, the rate of increase dV _AKP / d of the voltage V _AKP between the anode electrode and the cathode electrode after the spike voltage V _DSP is generated.
t changes abruptly, the maximum value is generated in the anode current I _AP (time tP4), and after that, the tail current is generated. Therefore, by the product of this tail current and the voltage V _AKP ,
Further power loss occurs. The voltage V _AKP is
At time tP5, the peak voltage is reached. After that,
The voltage V _AKP reaches the power supply voltage V _DD .

Therefore, such a rate of increase dV _AKP / dt
In order to suppress the above, the snubber capacitor C _{S described} above is required. The capacitance value is represented by I _AP / (dV _AKP / dt), and is usually selected so as to satisfy the relational expression of dV _AKP / dt ≦ 1000 V / μs.

FIGS. 35 and 36 show the GTO3P used in the conventional semiconductor switching device shown in FIG.
(The structure is roughly divided into a GTO element package and two stack electrodes), and both figures are shown including a gate driver 4P. 35 shows a side view of the GTO 3P viewed from the arrow direction DP2 shown in FIG. 36, but only a part of the GTO 3P is shown in a sectional view form. Also, in FIG.
FIG. 36 is a plan view of a portion excluding the stack electrode 27Pa when the GTO 3P is viewed from the arrow direction DP1 shown in FIG. 35.

35 and 36, each reference numeral indicates the following member. That is, 20P is a GTO element, 4PL is an internal inductance of the gate driver 4P, and 21P and 22P are a gate external lead (gate lead-out wire) and a cathode external lead (gate lead wire) each of which is a coaxial shield wire or twisted lead wire. (Cathode extraction line). Then, the gate terminal 25P of the GTO element 20P and one end of the gate external lead 21P are welded or soldered to the metallic connecting member 23P or are fitted to each other to integrate the two 25P and 21P, and The cathode terminal 26P and one end of the cathode external lead 22P are welded, soldered, or fitted to the metallic connecting member 24P to integrate the two 26P and 22P. As a result, both terminals 25P and 26P are connected to the gate driver 4P via the leads 21P and 22P, respectively.

Reference numerals 27Pa and 27Pb are stack electrodes for pressing the GTO element 20P.

Reference numeral 28P is a semiconductor substrate on which a GTO segment is formed, and the gate electrode 2 of A1 (aluminum) is formed on the outermost peripheral portion of the upper surface of the semiconductor substrate 28P.
9 Pa is formed, and a cathode electrode 29Pb is formed corresponding to each segment on the upper surface inside the gate electrode 29Pa. Also, 30P and 31P
Are cathode strain buffer plates and cathode post electrodes, which are sequentially stacked and arranged on the upper surface of the cathode electrode 29Pb on the upper surface of the semiconductor substrate 28P, respectively,
32P and 33P are anode electrodes (not shown) formed on the back surface of the semiconductor substrate 28P (in the back surface,
The cathode electrode 29Pb is an anode strain buffer plate and an anode post electrode, which are sequentially stacked on a surface located on the opposite side).

Further, 34P is a ring-shaped gate electrode which is in contact with the upper surface of the gate electrode 29Pa of the semiconductor substrate 28P and 3
5P is a ring-shaped gate electrode 3 via an annular insulator 36P.
Disc spring for pressing 4P against the gate electrode 29Pa, 37P
The ring-shaped gate electrode 34P to the cathode strain buffer plate 30.
38P is an insulating sheet for insulating from P and the post electrode 31P. One end of 38P is the ring-shaped gate electrode 34.
P is a gate lead fixed to P by brazing or welding and the other end is electrically connected to the gate terminal 25P. One of 39P is fixed to the cathode post electrode 31P and the other end is the cathode terminal 26P. 40P is a second flange whose one end is fixed to the anode post electrode 33P, and 41P is a projection in which the gate terminal 25P is arranged on the inner surface of the opening. Both ends 43P are insulating cylinders having a portion 42P and projecting from the upper and lower surfaces of the insulating cylinder 41P.
a and 43Pb are the first and second flanges 39P, respectively.
And 40P are airtightly fixed, which allows GTO
The element 20P has a sealed structure.

[0015]

The conventional semiconductor switching devices are roughly divided into two problems.

(1) First, as shown in FIG. 36, the first point is that the gate reverse current take-out lead 21P is taken out from a local portion of the ring-shaped gate electrode 34P. is there. Therefore, the gate reverse current is taken out in one direction. As a result, at turn off,
The non-uniformity of the cathode current occurs, and the power loss such as the spike loss and the loss due to the tail current described above is locally concentrated on a part of the cathode surface inside the GTO, and the local temperature rise causes each element of the GTO. Also, there is a high probability that each segment will be destroyed and brought into conduction, resulting in a failure in turn-off, resulting in a problem with the reliability of the device.

This point is schematically explained with a plan view of the GTO element of FIG. 37 and a cross-sectional view of the GTO element of FIG. 38. 38 is a vertical cross-sectional view taken along the line CSA-CSB shown in FIG. That is, in each of the GTO elements formed in the cylindrical wafer, the ring-shaped gate electrode 34P is formed.
Closer to, for example, a region formed in the region REO, the gate reverse current thereof is more inward than the region REI.
It will be pulled out much sooner than in the case of the GTO element in and will therefore be turned off sooner. On the other hand, the segment of the GTO formed in the region REC in the central portion of the wafer requires the longest time to be turned off most, and the segment of the GTO in the central region REC toward the cathode electrode Since the cathode current I _K will flow in from each of the surrounding segments, current concentration will occur in a part of the inside of the GTO wafer.

(2) The second problem is due to the presence of the snubber circuit, especially the snubber capacitor. That is, as described above, the snubber capacitor Cs is turned off at the time of turn-off.
The electric charge charged up in (FIG. 33) needs to be completely discharged by the next turn-off. Therefore, when the GTO 3P is turned on, the charges are discharged through the snubber resistor R _S , which causes a large power loss. At this time, the capacity of the power consumption generated in the snubber resistor R _S is PW = 1/2 * Cs * f (V _DD ² + (V
_DM- V _DD ) ² ). Here, V _DD is a power supply voltage, and V _DM is a voltage when the snubber capacitor CS is charged up at turn-off. Therefore, it becomes necessary to provide a cooling device for cooling the entire device.

When the snubber resistor having such a power capacity is connected, only the power generated by the snubber resistor becomes a loss in the power that should be originally transmitted, resulting in a decrease in efficiency and the This requires the installation of a cooling device, which is a very big problem in simplifying and downsizing the entire device.

Therefore, in order to solve these problems, the first electrode has the first, second and third electrodes, and when it is turned on in response to the turn-on control current applied to the third electrode, the first electrode is turned on. Is connected between the semiconductor switching element for directly flowing the main current flowing into the first electrode to the second electrode and the third electrode and the second electrode, and generates the turn-on control current to generate the turn-on control current. Drive control means for applying to three electrodes, and at the time of turn-off, all of the main current is commutated from the first electrode to the drive control means via the third electrode in a direction opposite to the turn-on control current. I devised a semiconductor switching device, and tried to solve it. However, as a result of further studies in order to actually commercialize the product, it was found that a high processing accuracy was found in the connection between the semiconductor switching element and the gate driver, especially in the configuration of the connecting portion between the conductor and the semiconductor switching element connecting both. It was found that it is necessary to solve the problem that the assembly work is complicated.

The present invention has been made to solve the above problems, and prevents power loss from locally concentrating on a part of semiconductor switching elements in a semiconductor wafer to prevent element destruction. In a semiconductor switching device, etc., which prevents the above and improves the reliability of the device, the semiconductor switching device has a structure in which the conductor and the semiconductor switching element are easily coupled and the assembly work is easy and simple. An object is to obtain a semiconductor stack device and a power conversion device.

[0022]

According to another aspect of the present invention, there is provided a semiconductor switching device comprising a gate terminal extending in a circumferential direction of a semiconductor switching element, and a pair of a fixed side member and a movable side member engaging with each other. The fixed-side member is fixed to the current path, and the movable-side member is rotated to move in the axial direction of the rotating shaft and press-contact the gate terminal in the axial direction with the gate terminal. It is provided with a gate connecting means for electrically connecting with the current path.

According to another aspect of the semiconductor switching device of the present invention, the semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path is a first conductive layer forming a gate side current path and a cathode side current. A wiring board formed by laminating a second conductive layer forming a path with an insulating layer interposed therebetween,
A ring-shaped mounting seat coaxially arranged with the semiconductor switching element on the outer periphery thereof, electrically connected to the first conductor layer of the wiring board and having female threads formed on the inner periphery, and a male member formed on the outer periphery. A gate pressing ring is provided which axially press-contacts the gate terminal by electrically screwing the screw into the female screw of the mounting seat to electrically connect the gate terminal and the first conductor layer. .

According to another aspect of the semiconductor switching device of the present invention, the semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path is a first conductive layer forming a gate side current path and a cathode side current. A wiring board formed by laminating a second conductive layer forming a path with an insulating layer interposed therebetween,
A ring-shaped mounting seat that is coaxially arranged with the semiconductor switching element and that is electrically connected to the first conductor layer of the wiring board and that has a guide extending in a spiral shape on the inner periphery, and an outer periphery. A gate pressing ring for projecting a pin engaging with the guide of the mounting seat and rotating the pin to axially press the gate terminal to electrically connect the gate terminal to the first conductor layer. It is equipped with.

Further, a semiconductor switching device according to a fourth aspect is the semiconductor switching device according to the second or third aspect, wherein the first conductor layer exposed on one surface of the wiring substrate directly contacts the gate terminal. is there.

The semiconductor switching device according to a fifth aspect of the present invention is the semiconductor switching device according to the second or third aspect, wherein the mounting seat has a seat portion formed by extending the wiring board side end portion to the inner diameter side. The seat portion directly contacts the gate terminal.

The semiconductor switching device according to a sixth aspect of the present invention is the semiconductor switching device according to the fourth or fifth aspect, wherein the semiconductor switching device is attached via a conductor plate and a wiring board that are in contact with the cathode electrode of the semiconductor switching element and fixed by axial pressure contact. A cathode spacer ring disposed axially opposite the seat and the gate pressing ring and interposed between the second conductor layer exposed on the other surface of the wiring board and the conductor plate; and the conductor plate. The present invention is provided with a first tightening tool that press-connects the cathode spacer ring to each other, and a second tightening tool that sandwiches and press-contacts the wiring board with the mounting seat and the cathode spacer ring to connect each other.

A semiconductor switching device according to a seventh aspect of the present invention is the semiconductor switching device according to the fourth or fifth aspect, in which the gate is provided via a conductor plate and a wiring board that are in contact with the cathode electrode of the semiconductor switching element and fixed by being pressed in the axial direction. A cathode spacer ring, which is disposed so as to face the pressing ring in the axial direction and is interposed between the second conductor layer exposed on the other surface of the wiring board and the conductor plate, the wiring board and the mounting seat. And a second fastener for sandwiching and pressing the cathode spacer ring between the wiring board and the conductor plate to join them together.

According to another aspect of the semiconductor switching device of the present invention, the semiconductor switching device is provided with a gate terminal for connecting a gate driver and a cathode terminal which are formed on the front and back sides and extend in the circumferential direction and are electrically insulated from each other. ,
The current path is a wiring board in which a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path are laminated via an insulating layer, and is coaxial with the semiconductor switching element. A ring-shaped mounting seat, which is disposed on the outer periphery of the mounting seat, is electrically connected to the first conductor layer of the wiring board and has a female screw formed on the inner periphery thereof, and a male screw formed on the outer periphery of the ring-shaped mounting seat. A gate that is screwed into a screw to press the gate terminal and the cathode terminal in the axial direction to electrically connect the gate terminal and the first conductor layer, and the cathode terminal and the second conductor layer, respectively. It is equipped with a presser ring.

According to a ninth aspect of the present invention, there is provided a semiconductor switching device including a gate terminal and a cathode terminal for connecting a gate driver, which are formed on the front and back sides of the semiconductor switching element and extend in the circumferential direction and are electrically insulated from each other. ,
The current path is a wiring board in which a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path are laminated via an insulating layer, and is coaxial with the semiconductor switching element. A ring-shaped mounting seat provided on the outer periphery thereof and electrically connected to the first conductor layer of the wiring board and having a guide extending spirally on the inner periphery, and a guide for the mounting seat on the outer periphery. The gate terminal and the cathode terminal are pressed against each other in the axial direction by projecting and rotating the engaging pin, and the gate terminal and the first conductor layer, and the cathode terminal and the second conductor layer, respectively. It is provided with a gate pressing ring to be electrically connected.

A semiconductor switching device according to a tenth aspect of the present invention is the semiconductor switching device according to the eighth or ninth aspect, wherein the first conductor layer and the second conductor layer are exposed on one surface of the wiring board while being insulated from each other. The mounting seat and the cathode terminal are directly brought into contact with the exposed first conductor layer and second conductor layer, respectively.

A semiconductor switching device according to an eleventh aspect of the present invention is the semiconductor switching device according to any one of the eighth to tenth aspects, wherein the spacer ring is arranged axially opposite the mounting seat and the gate pressing ring via the wiring board. , And a fastener for sandwiching and pressing the wiring board with the mounting seat and the spacer ring to join them together.

According to a twelfth aspect of the present invention, in the semiconductor switching device according to any one of the second to eleventh aspects, the gate pressing ring is integrally fixed to the gate terminal of the semiconductor switching element.

A semiconductor switching device according to a thirteenth aspect of the present invention is the semiconductor switching device according to any one of the second to twelfth aspects, wherein an elastic contactor is attached to an end face of the gate pressing ring on the pressure contact side, and the elastic contactor is in a stored state during pressure contact. It is designed to be

A semiconductor switching device according to a fourteenth aspect is the semiconductor switching device according to any one of the second to twelfth aspects, which is made of an elastic member, is inserted between the gate pressing ring and the gate terminal, and is deformed and contracted in the axial direction during press contact. It is provided with an elastic washer which becomes a stored state.

According to a fifteenth aspect of the present invention, in the semiconductor switching device according to any one of the second to seventh aspects, the gate terminal is formed of an elastic member which is deformed and contracted in the axial direction during pressure contact to be in a stored state. Is.

A semiconductor switching device according to a sixteenth aspect of the present invention is the semiconductor switching device according to any one of the second to fifteenth aspects, wherein the wiring board has a plurality of pairs of first and second conductor layers and the conductor layers are alternately laminated. In the vicinity of the connection position with the semiconductor switching element, the first conductor layers and the second conductor layers are electrically connected to each other by through holes.

A semiconductor stack device according to claim 17 is
The semiconductor switching device according to any one of claims 1 to 16 is used, wherein a semiconductor switching element and a cooling member for radiating heat generated from the semiconductor switching element are stacked and arranged in a mounting frame. .

An electric power converter according to an eighteenth aspect uses the semiconductor switching device according to any one of the first to seventeenth aspects, and is provided with a gate control device for gate-controlling the semiconductor switching element to perform electric power conversion. It is a thing.

[0040]

BEST MODE FOR CARRYING OUT THE INVENTION The semiconductor switching device or semiconductor switching element of the present invention is used in various power conversion devices such as a vehicle power conversion device, a UPS (Uninterruptible Power System), and an industrial power conversion device. , A power device.

The core of the novel method for controlling a semiconductor switching element proposed by the present invention is that all of the main current flowing through the semiconductor switching element in the ON state is diverted to the drive circuit. The point is to turn off.

Hereinafter, as such a semiconductor switching element, a gate turn-off thyristor (hereinafter, referred to as G
An example using (TO) will be shown. In this case, GTO
The first, second and third electrodes of the anode electrode,
It corresponds to the cathode electrode and the gate electrode. The semiconductor switching element is not limited to the one having a four-layer structure such as GTO, and a transistor having a three-layer structure can be used as the semiconductor switching element of the present invention. In this case, when using the NPN transistor, the first, second, and third electrodes correspond to the collector electrode, the emitter electrode, and the base electrode, respectively.
When using a PNP transistor, the first, second and third electrodes correspond to an emitter electrode, a collector electrode and a base electrode, respectively.

Embodiment 1. FIG. 1 shows a circuit configuration of a semiconductor switching device 10 according to the first embodiment of the present invention. In the figure, each reference numeral indicates the following circuit element. That is, 3 is a GTO as a semiconductor switching element, and the gate driver 4 is provided between the gate electrode 3G of the GTO 3 and the node 13 of the cathode electrode 3K.
(Drive control means) is connected.

The gate driver 4 has its driving power supply 4a.
(Power supply voltage V _GD (for example, 20 V)), capacitor 4b,
It is composed of an inductance 4C and a transistor 4d. still,
The detailed configuration is shown in FIG. 2 described later.

The gate driver 3 generates a turn-on control current I _G for turning on the GTO 3, and applies this current I _G to the gate electrode 3G via the wiring path or the line L1. In response to this, the GTO 3 is turned on. Reference numeral 11 is a node, and 9 is a power supply for driving the device 10, that is, a main circuit power supply (power supply voltage V _DD ) of the device 10.

On the other hand, 1 is the rate of increase dI _A / dt of the main current or anode current I _A flowing when the GTO 3 is turned on.
Is an inductance for suppressing the
This is a free-wheeling diode for freeing the energy generated in the inductance 1 when 3 is turned off.

Reference numeral 5 is connected in parallel to the GTO 3 between the node 11 of the anode electrode 3A and the node 12 of the cathode electrode 3K, and the voltage V _AK between the anode and the cathode electrode rises when the GTO 3 is turned off. It is a peak voltage suppression circuit for suppressing only the peak voltage generated due to. As will be described later, the circuit 5 has a function of holding or clamping the voltage V _AK at a predetermined voltage value determined according to the voltage blocking capability of the GTO 3 for a predetermined time when the voltage V _AK is turned off.

Here, at the time of turn-off, the rate of change or rate of rise (gradient) dI _GQ / of the gate reverse current I _GQ , which has conventionally been shunted from the main current I _A and flowed into the gate driver 4 side.
Make the absolute value of dt as large as possible (ideally, |
dI _GQ / dt | is ∞), and all of the main current I _A is passed to the node 12 via the gate driver 4 as the gate reverse current I _GQ . That is, the turn-off gain G (= | I _A / determined by the absolute value of the ratio of the main current I _A and the gate reverse current I _GQ
I _GQ |) is set to 1 or less (G ≦ 1), so that all of the main current I _A flows in the opposite direction to the turn-on control current I _G from the anode electrode 3A through the gate electrode 3G. And the commutation to the node 12 side, thereby turning off the GTO 3. At this time, the cathode current I _K flowing directly inside the GTO 3 from the anode electrode 3A toward the cathode electrode 3K immediately stops flowing at all. In that sense, this method, rather than the shunt of the main current I _A, with each other to achieve a "commutation of the main current I _A."

Here, the value of the rate of increase dI _GQ / dt can be changed according to the relationship between the power supply voltage value V _GD of the drive power supply (main power supply) 4a of the gate driver 4 and the inductance value of the loop R1. Therefore, by appropriately setting the values of both 4 (4a) and R1, if the increase rate | dI _GQ / dt | is set to an extremely large value close to the infinite value,
All of the main current I _A can be commutated to the gate driver 4 side in an extremely short time.

On the other hand, it is easy to realize such commutation of the gate reverse current I _GQ by the gate driver 4 alone because the power supply voltage V _GD that the drive power supply 4a of the driver 4 can take is limited. However, on the other hand, the absolute value of the rate of increase dI _GQ / dt required to set the gate turn-off gain G to 1 or less is set by setting the driving power supply voltage V _GD of the gate driver 4 to a practical value that can be set. Possible loop R
It is actually possible to set the value of the internal inductance of 1.

Therefore, the line L1 from the gate electrode 3G to the gate driver 4, the gate driver 4, the line L2 from the gate driver 4 to the cathode electrode 3K via the node 13, and the GTO3 between the gate and the cathode electrode.
It is required to reduce the value of the (floating) internal inductance in the loop consisting of the internal path or the path R1 to a value necessary for setting the turn-off gain G to 1 or less.

However, the gate driver 4 must be set to have a capacitance enough to allow the gate reverse current I _GQ having a value equal to or higher than the main current I _A to flow.

For example, when the power supply voltage V _GD of the main power supply 4 _a of the gate driver 4 is set to 20 V and the absolute value of the rate of increase dI _GQ / dt is set to about 8000 A / μs, the inductance of the loop R1 is set. The value is preferably 2.5 nH or less, and the internal inductance value of the gate driver 4 is preferably 1 nH or less.

A specific circuit diagram of the gate driver 4 having such capacitance is shown in FIG. In the figure, a drive power source 50 is a main power source for driving the gate driver 4, a sub power source 51 is a power source for a turn-on gate current, a sub power source 52 is a turn-on transistor Tr1,
Power supply for drive circuit 56 for driving Tr2, sub power supply 5
3 is a power supply for the turn-off gate current, and sub power supply 54 is a drive circuit 5 for driving the turn-off transistor Tr3.
The power supply 7 and the sub power supply 55 are power supplies for driving the circuit unit 58 that generates the turn-on signal and the turn-off signal from the control signal 62, and the transistor Tr1 supplies the turn-on high gate current I _G1 shown in FIG. Transistor Tr2 is a switch for supplying turn-on / steady gate current I _G2 , and transistor Tr3
Is a switch for supplying a turn-off gate current I _GQ (gate reverse current). The currents I _G1 and I _G2 are collectively referred to as the turn-on control current I _G. C1 is a capacitor for the turn-on gate current I _G , and C2 is a capacitor for the turn-off gate current I _GQ .

In the above gate driver circuit 4, when the control signal 62 is given from the outside, the noise cut circuit 59 is provided.
Removes the noise component contained in the control signal 62 from the control signal 62, receives the noise-removed control signal, and outputs the turn-on signal generation circuit 60 and the turn-off signal generation circuit 61.
Respectively generate a turn-on signal 63 and a turn-off signal 64 and supply the signals 63 and 64 to the corresponding drive circuits 56 and 57.

The drive circuits 56 and 57 which have received the signals 63 and 34 operate as follows. That is, at the time t ₀₁ , the drive circuit 56 generates a signal enough to drive the transistor Tr1 and supplies it to the base of the transistor Tr1. Here, both capacitors C1 and C2 are
Since they are charged by the sub power source 51 and the sub power source 53, respectively, the turn-on high gate current I _G1 is generated by the capacitor C.
1 to GTO3 through the transistor Tr1.
Then, at time t ₀₂ , the drive circuit 56 stops the supply of the base current of the transistor Tr1, generates the base current enough to drive the transistor Tr2, and supplies this to the base of the transistor Tr2. As a result, the transistor Tr1 is turned off, the transistor Tr2 is turned on instead, and the turn-on / steady gate current I _G2 flows from the capacitor C1 to the GTO 3 through the transistor Tr2.

At time t ₁ , the drive circuit 56 stops the supply of the base current of the transistor Tr 2 and the drive circuit 57.
Generates the base current necessary to turn on the transistor Tr3 in response to the signal 64, and supplies this to the transistor T3.
Supply to the base of r3. As a result, the transistor Tr2
Turns off and instead the transistor Tr3 turns on,
The electric charge stored in the capacitor C2 is the transistor T
It is discharged to the GTO3 side via r3, so that the turn-off gate current I _GQ flows from GTO3 through the transistor Tr3 to the node 13 of the cathode electrode 3K of GTO3. Moreover, this current I _GQ becomes equal to or greater than the absolute value of the main current I _{A in} a very short time, and conversely, the cathode current decreases to 0 value in a very short time.

As described above, in order to realize the rate of increase dI _GQ / dt such that the turn-off gain G is 1 or less, the loop R1 including the wiring path inside the gate driver 4 is used.
It is necessary to reduce the overall inductance value.
It is desired to realize this point by improving the mechanical parts such as the wiring of the GTO element or the package structure.

However, since the package structure of the conventional GTO 3P has the structure shown in FIGS. 35 and 36, the internal inductance of the GTO element 20P (lead 21P-ring gate electrode 34P-cathode electrode 30P). ~ Inductance of the path to the lead 22P)
Was a large value, for example, about 50 nH. At this value, the rate of increase dI _GQ / d is about 8000 A / μs.
t cannot be achieved. Therefore, in order to reduce the internal inductance value of the GTO element 20P to a desired value such as 2 nH or less, the gate-side connecting portion 23P and the cathode-side connecting portion 24P, the gate terminal 25P of the GTO element 20P, and the like. Loss caused by each coupling with the cathode terminal 26P and the gate external lead 2
1P and cathode external lead 22P and gate driver 4
Loss caused by each coupling with P and gate lead 3
It is necessary to reduce the inductance value of 8P, and further, the inductance value of each of the gate and cathode external lead wires 21P and 22P which occupy 90% of the total inductance value in the loop R1.

Therefore, the applicant of the present application examined the package structure of the GTO element from the above viewpoint and made improvements, and as a result, realized a pressure contact type semiconductor element having the following structure.

That is, FIG. 4 shows a pressure contact type GTO element 20,
Stack electrodes 27a, 27 for pressing it from above and below
5 is a cross-sectional view showing the GTO element 20 in the direction of the arrow D1 shown in FIG. 4 (excluding the stack electrode 27a). Therefore, the line SA-S in FIG.
FIG. 4 is a vertical cross-sectional view of B.

In both FIGS. 4 and 5, each reference numeral indicates the following member. That is, 20 is a pressure contact type semiconductor element, that is,
Here, the entire GTO element is shown, and 28 is a semiconductor substrate on which each GTO segment is formed.
A gate electrode 29a of A1 (aluminum) is formed on the surface located on the outer peripheral side of the upper surface of 8, and each segment is formed on the upper surface of the semiconductor substrate 28 inside the gate electrode 29a. Each cathode electrode 29b is formed corresponding to the position. The structure of each segment or the wafer structure of the GTO element is similar to the structure shown in the sectional view of FIG.

Reference numerals 30 and 31 respectively denote the semiconductor substrate 28.
On the upper surface of the cathode electrode 29b are the cathode strain buffer plate and the cathode post electrode, which are sequentially stacked on the upper surface of the cathode electrode 29b, while 32 and 33 are the semiconductor substrate 8 respectively.
An anode strain buffer plate and an anode post electrode, which are sequentially stacked on the surface (a surface opposite to the cathode electrode 29b) of an anode electrode (not shown) formed on the back surface of
Reference numeral 34 is a ring-shaped gate electrode that is in contact with the upper surface of the gate electrode 29a of the semiconductor substrate 28, and 38 is a ring-shaped gate terminal made of an annular metal plate, and an inner peripheral plane 25 thereof.
Are slidably contacted with and arranged on the ring gate electrode 34. Reference numeral 35 is an elastic body such as a disc spring or a wave spring for pressing the ring-shaped gate electrode 34 against the gate electrode 29a together with the ring-shaped gate terminal 38 through the annular insulator 36, and 37 is
An insulator made of an insulating sheet or the like for insulating the ring-shaped gate electrode 34 from the cathode strain buffer plate 30 and the cathode post electrode 31, and 26 is a first flange whose one end is fixed to the cathode post electrode 31. And
40 is a second flange whose one end is fixed to the anode post electrode 33, 41 is an insulating cylinder which is made of ceramic or the like and is divided into upper and lower parts with the ring-shaped gate terminal 38 in between and which has a protrusion 42. is there. The outer peripheral portion 23 of the ring-shaped gate terminal 38 projects outward from the side surface of the insulating tube 41, and a plurality of mounting holes 21 are provided at a predetermined interval at a position closer to the inner peripheral side than the other end 38E. . The portion 43 a protruding upward from the upper surface of the upper insulating cylinder 41 is the other end portion 2 of the first flange 26.
6E is airtightly fixed, and the portion 43b protruding downward from the back surface of the lower insulating cylinder 41 is airtightly fixed to the other end of the second flange 40, whereby the pressure contact type semiconductor element 20 is hermetically sealed. It has a package structure.
The inside is replaced with an inert gas.

FIG. 6 is a plan view showing a mechanical portion of the gate driver 4, and FIG. 7 is a view showing the GTO element 20 (stack electrodes 27a and 27b in the gate driver 4 having the structure shown in FIGS. 4 and 5). It is a longitudinal cross-sectional view showing a state in which (pressurized) is mounted. In both FIGS. 6 and 7, reference numeral 4A
Shows a case for covering the gate driver main body 4C, 4B shows a case which becomes a seat of the gate driver main body 4C, and 70 shows the gate driver main body 4 and the GTO.
The whole board | substrate in which the circuit pattern for electrically connecting with the element 20 was formed is shown. The substrate 70 is just the gate lead wires 21P and 22P of the conventional package.
(FIG. 35) and has strength enough to support the weight of the GTO element 20. Reference numeral 71 denotes a cathode electrode connected by pressure contact with the cathode electrode 29b of the GTO element 20, and corresponds to the stack electrode 27a. 21
A is a substrate 7 for connecting the GTO element 20 through the mounting hole 21 corresponding to the substrate 70 of the gate driver 4.
The mounting holes are provided at 0, and in order to connect the gate driver 4 and the GTO element 20, for example, about 6 mounting holes 21A are required.

The above-mentioned substrate 70 has the following two circuit pattern substrates facing each other with the insulator interposed therebetween. That is, the substrate 70 includes a gate lead substrate 72, a cathode lead substrate 73, and an insulator 74 for insulating the two substrates 72 and 73.
And have. The multilayer substrate structure is provided in order to reduce the internal inductance on the gate driver 4 side. The GTO element body 20 has screws 75 and 76.
Alternatively, it is connected to the gate driver main body 4C by welding, caulking or the like.

As described above, the airtight package of this GTO 3 has the internal gate electrode 29 formed on the semiconductor substrate.
It has a ring-shaped or disk-shaped gate electrode 38 extending from the side a toward the side of the gate driver body 4C,
Moreover, in the package (20), the outer peripheral portion of the ring-shaped gate electrode 38 is directly connected to the main body 4C of the gate driver 4.
Connected to the extended board 70 via the mounting hole 21A.
It is connected to the gate driver 4 only by fixing it. Therefore, no gate lead wire is used for the connection. Therefore, all the problems in the conventional configuration are improved. That is, the coupling loss that has conventionally been caused by the coupling between the internal gate lead portion of the GTO element and the gate terminal and cathode terminal of the GTO element is
As described above, by taking out the gate lead with the disk-shaped structure, it is significantly reduced, and the power loss corresponding to the coupling loss conventionally generated by the coupling between the external gate lead wire and the gate driver is reduced by the present invention. In this case, since the entire disc-shaped gate lead portion or the gate electrode 38 is directly connected to the gate current conducting substrate 70 of the gate driver 4, it is significantly reduced. Furthermore, the inductance of the external gate leads themselves, which conventionally occupied 90% of the total inductance of the loop R1, does not exist because they are not used in the present invention.

In this way, it is possible to reduce the internal inductance of the GTO element 20 (3) and the internal inductance of the gate driver 4. In addition to these improvements, the connection between the GTO element 20 and the gate driver 4 is further devised as described above (FIG. 7), so that the GTO element 3 is provided with a turn-off gain G ≦ 1. Rate of rise d that can be turned off
It has become possible to actually generate the I _GQ / dt region.

The gate current may be taken out in two or four directions diagonally positioned by using the substrate 70A shown in the plan view of FIG. You may make it take out an electric current.

The operation of the semiconductor switch device having the above circuit structure and mechanism will be described with reference to FIGS. 9 and 10. Note that FIG. 9 shows operation waveforms, and FIG.
An equivalent model in which TO3 is replaced with a circuit configuration including a PNP transistor 80 and an NPN transistor 81 is shown.

In FIG. 9, when the GTO 3 is turned on and the anode current I _A is flowing (time t ₁ ), the gate driver 4 rapidly changes the gate reverse current I _GQ in response to the control signal 62 (FIG. 2). If the gate reverse current I _GQ reaches a current value whose absolute value is equal to the absolute value of the anode current I _A in an extremely short time (I _GQ =
-I _A) (time T _2). In this state, all the anode current I _A flowing into the anode electrode 3A of the GTO 3 is the gate electrode 3
G, commutated to the gate driver 4 via the wiring path L1,
The relational expression of anode current I _A | ≦ | gate reverse current I _GQ | of | GTO 3 is established, and the cathode current I _K = 0.
After that, the gate reverse current I _GQ continues to maintain the state of | I _A | ≦ | I _GQ | until the GTO 3 is completely turned off.

The current difference ΔI _GQ shown in FIG. 9 is considered to be the recovery current of the NPN transistor 81 shown in FIG. This is caused by the following phenomenon. That is, in FIG. 10, when the GTO 3 is turned on and the anode current I _A is flowing in the semiconductor substrate, the current I _A is separated from the anode electrode 3A of the GTO 3 into the loop 82 and the loop 83, and the cathode electrode 3K. Is flowing to. From this state, when GTO3 is turned off,
All of the anode current I _A is strongly pulled by the gate driver 4 and flows to the loop 84 and the loop 85. At this time, the base current of the NPN transistor 81 is inverted from the positive direction to the negative direction, the NPN transistor 81 is suddenly turned off, and its internal carrier becomes a recovery current and flows in a superimposed manner. The increase in the recovery current is expressed as the above-mentioned current difference ΔI _GQ, and at this time, | gate reverse current I _GQ |> | anode current I _A |.

In this way, the gate reverse current | I _GQ |> | anode current I _A | results, and the NPN transistor 8 of FIG.
When 1 is turned off, PNP transistor 80
The base current becomes zero (I _B = 0), PNP transistor 80 will shift to the turn-off.

When the voltage blocking function of the PNP transistor 80 starts to recover (time T ₃ ), the anode-cathode electrode voltage V _AK shown in FIG. 9 begins to rise, and the anode-cathode electrode voltage V _AK becomes the power supply voltage. When a value equal to V _DD is reached (time T ₄ ), the anode current I _A begins to decrease and GTO3
Turns into a turn-off state. At this time, the rising rate dV _AK / dt of the voltage V _AK between the anode and the cathode electrode is G
It is determined only by the speed at which the voltage blocking function of TO3 is restored, not by the external connection circuit or the like. In this respect, the present invention is clearly different from the prior art in which the increase rate of the voltage between the anode and the cathode electrode is determined depending on the snubber capacitor C _S.

In FIG. 9, the peak voltage (surge voltage) V _P of the present invention means the main circuit (loop from the power supply 9 to the node 11, the GTO 3 and the node 12 to the power supply 9) when the GTO 3 is turned off. Stray inductance L
Electromotive force generated due to (the energy is E = 1 /
2 * L * I ² ) is a voltage obtained by superimposing it on the power supply voltage V _DD . If this peak voltage V _P is GTO
If the voltage blocking capability of 3 is exceeded, the GTO 3 will be destroyed. Therefore, the peak voltage suppressing circuit 5 that suppresses the anode-cathode electrode voltage V _AK that continues to increase toward the peak voltage V _P when the GTO 3 is turned off so as not to exceed the voltage blocking capability of the GTO 3 is provided at the node 1 of the GTO 3.
It is necessary to connect GTO3 in parallel between 1 and 12. The peak voltage suppression circuit 5 of FIG. 1 has such a function, and is a voltage clamp circuit including, for example, a Zener diode, a varistor, a celestor, an arrester, and the like. After the voltage V _AK that continues to rise when the GTO is turned off reaches a predetermined voltage value V _SP set within a range that does not exceed the voltage blocking capability of the GTO 3, the circuit 5 is
If If there is no same circuit 5 the voltage V _AK reaches the peak voltage V _P, a predetermined time Delta] t (Fig. 9) is the time required for the returns to a predetermined voltage value V _SP, the voltage V _AK The peak voltage after suppression is kept at V _SP . Therefore, the peak voltage V _P is not generated, and the GTO3 element is never destroyed.

As described above, in the present invention, at the time of turn-off, the GTO 3 is turned off by controlling the GTO 3 in the region RA of the rate of increase dI _GQ / dt shown in FIG. In the figure, the point PA on the curve CA is the main current I _A.
Is a commutation point where commutation of the
In this case, it is in an ideal state when it is considered that there is no recovery current described above. In reality, since the recovery current is superimposed on the commutated main current, the turn-off gain G <1
The turn-off of GTO3 is realized in the area of.

FIG. 12 and FIG. 13 are diagrams comparatively showing the flow of the main current I _A at turn-off in the prior art and the present invention, respectively. Prior art, for example, Japanese Patent Laid-Open No. 5-
No. 111262 (Swiss application number 9110619)
19) and Japanese Patent Application Laid-Open No. 6-188411 (German application No. P4227063).
As shown in, the cathode current I _K is flowing in the GTO 3P even at turn-off. That is, the main current I _A is
At the time of turn-off, the cathode current is _{divided into} I _K and I _GQP . However, in this case, even if the cathode current I _K flowing through each segment is a small value, they will intensively flow into some of the segments, so the GTO
The problem of element destruction is inherent.

On the other hand, in the present invention, as shown in FIG. 13, at the time of turn-off, the cathode current I _K does not flow at all, and all the main current I _A commutates to the path on the side of the gate driver 4 to generate the recovery current. Gate reverse current I _GQ
Is the sum of the absolute value of the main current I _{A and} the absolute value of the recovery current, and the relational expression | I _GQ | ≧ | I _A | holds (in the prior art, | I _GQP | <| I _A |).

As described above, according to the present invention, since the new gate commutation system in which | anode current I _A | ≦ | gate reverse current I _GQ | The current I _K = 0,
The cathode current does not flow into the cathode surface inside the GTO 3P at all, and localized current concentration on the cathode surface, which has conventionally been a cause of turn-off failure, cannot occur at all. Therefore, in the present invention, there is no possibility of element destruction due to turn-off failure, and the reliability of the device is significantly improved. It can be said that this effect is the core effect of the present invention and is an advantage that cannot be obtained even by the combination of the techniques shown in the above-mentioned respective documents.

In addition, the voltage V between the anode and cathode electrodes
_{Since the} circuit 5 for suppressing the rise in _AK and suppressing the surge voltage is provided, the spike voltage is cut by the circuit 5 and is not generated at all. Therefore, the snubber capacitor C _S , which was conventionally required to discharge the electric charge accumulated at the time of turn-off, can be eliminated. That is, the snubber circuit, which is indispensable in the prior art, can be dispensed with, and the downsizing, simplification, cost reduction, and efficiency improvement of the device can be realized.

FIG. 14 shows a circuit configuration of a semiconductor switching device which employs a peak voltage protection circuit different from that of FIG. In the figure, the same reference numerals as those in FIG. 1 denote the same components. As the package structure of the GTO 3 and the mechanism of the gate driver 4, those described in FIG. 1 are used. Each of the reference numbers 6 to 8 is G
It is an element that constitutes a protection circuit that suppresses or reduces power loss due to spike voltage or peak voltage (surge voltage) that occurs when TO3 is turned off, and shows a diode, a resistance element, and a capacitor in order. In particular,
Here, one end 15 of the capacitor 8 (capacitance element) included in the bypass line BL arranged in parallel with the GTO 3 between the node 11 and the node 12 includes the resistance element 7 and is connected to the power supply 9 at the node 14. It is characterized in that it is connected to the power supply 9 through the formed wiring route R4.

The semiconductor switching device 10A as described above.
Or, the operation of the GTO 3 will be described with reference to FIG.

The operation of the GTO 3 in this case is shown in FIG.
1 is the same as the operation in the device of FIG. 1, and only the peak voltage suppressing operation of the voltage V _AK between the anode and the cathode electrode is different from the case of FIG. The measured waveform of FIG. 15 is I _A = 1000 (A /
d), V _AK = 1000 (V / d), I _GQ = 1200 (A
/ D), V _GD = 20 (V / d), and t = 2 (μs / d). In the figure, curves C1, C2, C3
C4 shows the measured waveforms of the anode current I _A , the anode-cathode electrode voltage V _AK , the gate reverse current I _GQ , and the gate voltage V _G , respectively.

In FIG. 14, the capacitor 8 is constantly charged to the power supply voltage V _DD through the resistance element 7, and during the turn-off operation, the generated spike voltage V _DSP and peak voltage V _P exceed the power supply voltage V _DD . Only the current due to the voltage portion (V _DSP −V _DD , V _P −V _DD ) is absorbed by the capacitor 8 through the diode 6. Therefore, only the excess portion is newly charged to the capacitor 8 for the excess time.

The above points will be described with reference to FIG.
The capacitor 8 does not function until the voltage V _AK between the anode and the cathode electrode reaches the power supply voltage V _DD , and this period (t ₂
The rate of increase dV _AK / dt of −t ₁ ) is determined by the capability of the GTO 3 (at this time, the total main current I _A is commutated to the gate driver 4 side). Then, when the anode-cathode electrode voltage V _AK reaches the power supply voltage V _DD and the anode current I _A starts to decrease (time t ₂ ), at the same time, the node 11
The main current flowing into the capacitor is through the diode 6 and the capacitor 8
The flow starts to the side, that is, to the bypass path BL. At this time, the rate of increase di / dt of the bypass current i flowing in and G
An electromotive voltage is generated by the closed circuit composed of TO3, the diode 6 and the capacitor 8 or the inductance (L _f1 ) floating in the first loop R2. This is
Is the spike voltage V _DSP shown at (time t ₃ ). After that, until time t ₅ , the voltage V between the anode and the cathode electrode is
The difference between the peak voltage V _{P of AK} and the power supply voltage V _DD is absorbed by the capacitor 8. At that time, the amount of overcharge absorbed by the capacitor 8 should be equal to or lower than the voltage blocking capability of the GTO 3.
The capacitance value of the capacitor 8 is appropriately determined. That is, it is determined by the capacitance value of the capacitor 8 so that the peak value V _{P of} the anode-cathode electrode voltage V _AK that rises from the time t ₄ to the time t ₅ becomes equal to or lower than the voltage blocking ability of the GTO 3.

The overcharged portion of the peak voltage absorbed by the capacitor 8 is discharged through the resistance element 7 to the power supply 9 side by the next turn-off. On the other hand, even when the GTO 3 is turned on, the voltage or charge charged in the capacitor 8 is blocked by the diode 6 even if it tries to discharge, so that it is not discharged. Therefore, the capacitor 8 is always charged to a voltage equal to the power supply voltage V _DD .

The peak voltage V _P from time t ₄ to time t ₅ is based on the electromotive force generated by the stray inductance (L _A2 ) in the second loop R3 and the capacitance value of the capacitor 8.

As described above, the energy stored in the capacitor 8 of the peak voltage suppression circuit or protection circuit of the semiconductor switching device 10A is entirely reduced to 0 by the snubber resistance as in the snubber capacitor in the prior art. Instead of being discharged, only the overcharged portion is discharged, and the discharge loss of the snubber circuit, which has been a problem in the past, can be significantly reduced. Moreover, this semiconductor switching device 10A
Then, by simply using the members used in the snubber circuit of the related art and directly connecting the wiring of the resistance element used as the snubber resistance to the node 14 of the power supply 9 as the wiring route R4, Since the structure can be simplified, that is, the conventional snubber circuit can be used as it is to sufficiently reduce the discharge loss, there is an advantage that a highly realizable device can be realized. Of course, also in the device 10A, like the device 10 of FIG. 1, it is possible to completely prevent the element breakdown of the GTO 3 at the time of turn-off.

As mentioned in the above section, the semiconductor switching device described with reference to FIGS.
Although the conventional problems are basically solved, in order to achieve actual commercialization, in addition to the structure, workability at the time of manufacturing and maintenance, as well as implementation of peripheral devices and parts It is necessary to consider it, and it is necessary to solve the problems raised in these embodiments.

That is, in the semiconductor switching device according to the present invention, since the turn-off current flows from the gate driver to the gate electrode of the semiconductor switching element, the ring-shaped gate terminal of the semiconductor switching element and the conductor from the gate driver are electrically connected. Need to be connected to
In the examples shown in FIGS. 6 and 7, the connection has a structure in which a screw is used to tighten the connection. In this case, since the current flowing into the gate terminal is required to be evenly distributed along the circumferential direction, the screw mounting pitch cannot be increased, and as a result, the number of screws increases. At least 16 in case of 4000A rated GTO prototyped by the inventors
You need a book of screws. Therefore, there is a new problem that the required accuracy of the screw hole size of the relevant portion becomes extremely high, the processing cost increases, and the workability at the time of attaching and detaching the relevant portion becomes extremely complicated.

FIG. 16 is a block diagram showing the main part of the semiconductor switching device according to the first embodiment of the present invention, that is, the connection part of the gate terminal of the semiconductor switching element, which solves the above new problems. . FIG. 1A is a plan view thereof, and FIG. 2B is a cross-sectional view taken along line X1-X1 of FIG. 1A, in which the gate driver is not shown. In the following, since the main points of interest are different from the contents described with reference to FIGS. 1 to 15, the same or corresponding parts will be described with new reference numerals.

In the figure, 100 is a GTO as a semiconductor switching device having a ring-shaped gate terminal 101 extending in the circumferential direction, and 102 and 103 are GTO 10.
An anode electrode and a cathode electrode formed on the upper and lower ends of 0 in the axial direction, and 104 are insulating cylinders that insulate the respective electrode terminals. Reference numeral 110 denotes a wiring board that constitutes a current path between the GTO 100 and the gate driver, and includes four conductive layers 111 to 114 stacked on each other through an insulating layer 115, as shown in a detailed cross section in FIG. ing. And the first
The first conductive layers 111 and 113 of the third and third layers form a gate-side current path, and one end (the left end not shown in FIG. 17) of each is connected to the gate-side output terminal of the gate driver. The second conductive layer 112 of the second layer and the fourth layer connected,
Reference numeral 114 forms a cathode side current path, and one end of each is connected to the cathode side output terminal of the gate driver. Note that the first conductive layers 111 and 113 and the second conductive layers 112 and 114 are electrically connected to each other by through holes 116 near the connection position of the gate terminal 101. Further, 117 is the wiring board 11.
No. 0 is an insulating film applied to both front and back surfaces.

Returning to FIG. 16, 120 is a flat conductor plate, and as will be described later with reference to FIG. 18, the right end of the conductor plate comes into contact with the cathode electrode 103 when it is assembled into a stack structure, and is pressed in the axial direction. Fixed. The left end of the conductor plate 120 is integrally fixed to a gate driver (not shown).
Reference numeral 121 denotes a cathode spacer ring made of a conductive material, which is integrally fixed to the conductor plate 120 by a countersunk screw 122 as a first tightening tool, and the second conductive layer 114 is exposed on the upper surface of the wiring board 110. The bottom surface abuts.

Reference numeral 123 denotes a mounting seat as a ring-shaped fixed side member made of a conductive material, which is arranged coaxially with the GTO 100 and has an internal thread 124 formed on the inner periphery thereof.
The upper surface of the wiring board 110 having the exposed conductive layer 111 is in contact. Numeral 125 is a bolt as a second fastening tool, which clamps the wiring board 110 by the cathode spacer ring 121 and the mounting seat 123 to fix them to each other integrally. 126 is an insulating spacer for insulating the bolt 125. 12
Reference numeral 7 denotes a male screw 128 formed on the outer periphery of which is screwed into a female screw 124 of the mounting seat 123 to press the gate terminal 101 axially downward to electrically connect the gate terminal 101 and the first conductive layer 111. It is a gate pressing ring as a movable member to be connected. Denoted at 127a are recesses provided at four circumferential positions of the gate pressing ring 127 for engaging a tool used during this screwing.

In the semiconductor switching device shown in FIG. 16, the mounting seat 123, the wiring board 110, the cathode spacer ring 121 and the conductor plate 120, and the gate driver are assembled in advance by using the flat head screw 122 and the bolt 125. , The GTO 100 is aligned, and the gate pressing ring 127 is screwed into the mounting seat 123, so that the first gate terminal 101 and the first wiring board 110
With the conductive layer 111. Since this contact is made not only from the lower surface of the gate terminal 101 but also from the upper surface of the gate terminal 101 via the mounting seat 123 and the gate pressing ring 127, a good conduction state can be obtained. Since the conductive layer 111 is connected to the conductive layer 113 through the through hole 116, the current from the gate-side output terminal of the gate driver flows through the conductive layers 111 and 113 to the gate terminal 101.

The cathode electrode 103 is the conductor plate 120.
And is connected to the second conductive layer 114 via the cathode spacer ring 121. Since the conductive layer 114 is connected to the conductive layer 112 through the through hole 116, the current from the cathode side output terminal of the gate driver flows through the conductive layers 112 and 114 to the cathode electrode 103. As described above, the gate driver and G
Since the current path connecting to the TO 100 is composed of the wiring board 110 formed by laminating two pairs of conductive layers in which currents flow in mutually opposite directions, the inductance of this current path is suppressed to an extremely small value. The desired steep turn-off current can be easily and surely supplied based on the above-described principle.

To disconnect the gate terminal 101, the screwing state of the gate pressing ring 127 is loosened, and the mounting seat 123 is removed.
Should be separated from. As described above, in the connection / detachment structure of the gate terminal of the semiconductor switching device according to this embodiment, the gate pressing ring 127 can be attached / detached by screwing a single screw structural component.
The workability becomes extremely simple. Moreover, unlike the above-described FIGS. 6 and 7, since a large number of screw holes are not required, specially high processing accuracy is not required, and the product price can be reduced. In addition, when there are many small-diameter screw holes, there is a possibility that short circuit will occur between the gate and the cathode due to screw chips during the assembly work. Becomes

FIG. 18 shows a structure in which a plurality of semiconductor switching devices described above are used and assembled with other peripheral parts as a semiconductor stack device. FIG. 1A is its structural diagram, and FIG. 2B is its circuit block diagram. In the figure, 100 is a GTO, 200 is a gate driver, 201 is a free-wheeling diode, 202 is a snubber diode, 203 is a cooling fin as a cooling member, 20
Reference numeral 4 is a stack electrode, and 205 is an insulating spacer. Of these, a water cooling pipe 206 is connected to the cooling fin 203,
The heat generated from the GTO 100 and the freewheeling diode 201 is radiated to the cooling water. Reference numeral 210 denotes a mounting frame that stacks the above-mentioned components and tightens them from above and below to store the components in a pressed state. As can be seen from FIG. 18, in this embodiment, the gate driver 200 is supported via the conductor plate 120 and is integrated with the stack structure.

Embodiment 2. Hereinafter, another modified example for solving the same problem as in the first embodiment will be described with a focus on the differences from the first embodiment. FIG. 19 is a configuration diagram showing a main part of a semiconductor switching device according to a second embodiment of the present invention. The difference from FIG. 16 is that the mounting seat 1
23. That is, the seat portion 123a extending to the inner diameter side is formed in the lower part of the mounting seat 123, and the gate terminal 1
01 is configured to directly contact the seat portion 123a. Therefore, when the gate pressing ring 127 is screwed and the gate terminal 101 is pressed, the mounting seat 123 itself receives all the reaction force and does not apply to the wiring board 110, so that the reliability of the wiring board 110 is improved. is there.

Further, as shown in FIG. 19, the dimension L1 on the side of the mounting seat 123 (dimension between the upper surface of the receiving portion 123a and the lower surface of the cathode spacer ring 121) and the dimension L2 on the side of the GTO 100 (root portion of the gate terminal 101). The following effects can be obtained by setting the dimensions such that the relationship of L1> L2 (for example, L1 = L2 + 0.1 mm) is established between the bottom surface of the cathode electrode 103 and the bottom surface of the cathode electrode 103. That is, when the GTO 100 is assembled together with the conductor plate 120 into a stack and pressure-contacted by the mounting frame 210, the force generated by the pressure-contact is transmitted to the mounting seat 123 side through the gate terminal 101. The above-mentioned force is applied to the wiring board 11 by the conductor plate 120 and the mounting seat 123.
0 and a force in the direction of compressing the cathode spacer ring 121, and long-term stability of these attachment mechanisms is ensured without inhibiting the tightening force of the flat head screw 122 and the bolt 125.

Regarding the bolt 125,
In FIG. 19, a screw hole having a bottom is formed on the mounting seat 123, and a bolt 125 is screwed into the screw hole to tighten the screw hole. However, a round hole penetrating to the upper part is formed on the mounting seat 123, and a nut is used separately. Needless to say, the structure may be such that it is tightened with the bolt 125. This is the same in the case of the first embodiment and the example of the mode described later.

Third embodiment. 20 is a configuration diagram showing a main part of a semiconductor switching device according to a third embodiment of the present invention. In this form 3, the cathode spacer ring 121 is made smaller than that of the previous form. That is, the shape of only the portion facing the gate pressing ring 127,
The wiring board 110, the cathode spacer ring 121, and the conductor plate 1 are formed by using countersunk screws 122 and nuts 129 shown in the figure.
Twenty three are tightened and integrated. As a result, the second conductive layers 112 and 114 and the cathode electrode 103 of the GTO 100 are electrically connected via the cathode spacer ring 121 and the conductor plate 120. At this time,
In order to ensure electrical insulation between the flat head screw 122 and the first conductive layers 111 and 113, patterning of each conductive layer is set as shown in the cross section in the figure.

On the other hand, the bolt 125 tightens and integrates only the mounting seat 123 and the wiring board 110. Here, as in the case of the countersunk screw 122, the electrical insulation between the bolt 125 and the second conductive layers 112 and 114 is secured by appropriately setting the patterning of each conductive layer.
Therefore, there is an advantage that the insulating spacer 126 used in FIG. 16 is unnecessary.

Fourth Embodiment 21 is a configuration diagram showing a main part of a semiconductor switching device according to a fourth embodiment of the present invention. The difference from the previous embodiment is that a dovetail-shaped recess is formed on the lower surface of the gate pressing ring 127, that is, the end surface on the pressure contact side, and the elastic contactor 130 made of an elastic material is formed in this recess.
Is the point where it was attached. As a result, even if the tightening force by the gate pressing ring 127 is relatively small, a substantially uniform pressure contact force works over the entire circumference of the gate terminal 101. Therefore, the work of attaching / detaching the gate terminal 101 is simplified, and a more stable contact state can be obtained over the entire circumference of the gate.

Note that FIG. 21 shows an example in which the elastic contactor 130 is additionally provided to the example of the form shown in FIG. 19 having the seat portion 123a, but similarly to the example of other forms such as FIG. Can be applied.

Embodiment 5. FIG. 22 is a configuration diagram showing a main part of a semiconductor switching device according to a fifth embodiment of the present invention. Here, we are pursuing the simplification of the work of tightening with the gate pressing ring. FIG. 1A is a side view of the whole including the gate driver 200, and FIG. 2B is a cross-sectional view of a main part. In this embodiment, no screw is formed on either the mounting seat 123 or the gate pressing ring 127. Instead of screws, the mounting seat 123 is formed with a guide 131 that extends spirally as shown in the figure, and the guide 1 is provided on the outer periphery of the gate pressing ring 127.
A pin 132 that engages with 31 is provided in a protruding manner. Although not shown, the guides 131 and the pins 132 are provided at equal intervals in the circumferential direction, for example, at four locations.

For the tightening work, first, the pin 13
2 is located at the upper end position of the guide 131, and the gate pressing ring 127 is rotated from there so that the pin 132 fits in the guide 131. As a result, the gate pressing ring 127 descends in the axial direction according to the inclination of the guide 131, and eventually contacts the gate terminal 101 by pressure and stops. Therefore, by appropriately setting the inclination angle of the guide 131, the gate terminal 101 can be pressure-contacted and connected with a smaller rotation angle as compared with the above-described example using the screw, and this workability is improved. To be done.

Although not described in the above embodiment, even if a screw is used, for example,
If the four screw groove threads are formed on both the mounting seat 123 and the gate pressing ring 127 starting from positions at equal intervals in the circumferential direction, the gate pressing ring 1 can be formed.
If you rotate 27 up to 90 degrees, both male and female screws will engage,
The tightening work becomes simple.

Although the guide 131 penetrates the mounting seat 123 in the radial direction in FIG. 22, it is of course possible that the guide 131 does not penetrate the mounting seat 123 and is open to the inner peripheral side.

FIG. 23 shows a structure in which the guide-pin structure is adopted in the embodiment of FIG. 19 described above, and the other parts are the same as the case of FIG. Figure 24 shows
Since the guide-pin structure is adopted in the example of the embodiment shown in FIG. 21, the description thereof will be omitted.

Sixth Embodiment 25 is a configuration diagram showing a main part of a semiconductor switching device according to a sixth embodiment of the present invention. In the figure, the configuration of the cathode of the GTO 100 is largely different from the previous embodiment. That is, FIG.
In the case of No. 5, the cathode electrode 103 for passing the main current is used.
Separately from the cathode terminal 105 for connecting the gate driver
Has been added. The gate terminal 101 and the cathode terminal 105 are integrally formed on the front and back of the insulating ring 106 in a ring shape extending in the circumferential direction. In addition, the conductor plate 120 is separated from the GTO 100. Therefore, since the cooling fin 203 can be directly brought into contact with the cathode electrode 103,
The heat transfer of heat dissipation is improved.

Next, FIG. 26 shows a wiring board 11 near the pressure contact portion.
A cross section of 0 is shown. Here, a portion of the upper surface of the wiring board 110 that abuts the mounting seat 123 is the first conductive layer 111.
Is exposed, but the portion of the gate pressing ring 127 that contacts the cathode terminal 105 is the second conductive layer 11
The conductive layer connected to 2, 114 is exposed. The wiring substrate 110 is patterned so that the exposed conductive layers are electrically insulated.

Therefore, in this embodiment, the gate pressing ring 127 is screwed into the mounting seat 123 and the gate terminal 101 and the cathode terminal 105 are pressed against each other. Will be connected to the gate side output terminal of the gate driver via the conductive layers 111 and 113. Further, the cathode terminal 105 is connected to the cathode side output terminal of the gate driver through the uppermost conductive layer of the wiring board 110 and the second conductive layers 112 and 114.

FIG. 27 shows a GTO 100 having the gate terminal 101 and the cathode terminal 105 described with reference to FIGS.
Is a further modified example. In the figure, 121A is a spacer ring made of an insulating member. Although similar to the embodiment shown in FIG. 20 described above, the connection to the gate driver is made not only on the gate terminal 101 side but also on the cathode terminal 105 here.
Since the side is also performed through the wiring substrate 110 that directly abuts against this, by forming the spacer ring 121A with an insulating member, a simple structure in which the insulating spacer 126 is not necessary is obtained. Will be reinforced.

Seventh Embodiment 28 is a configuration diagram showing a main part of a semiconductor switching device according to a seventh embodiment of the present invention. Here, the gate pressing ring 127 which is the movable side member is integrated with the gate terminal 101.
The mounting seat 123, which is the fixed-side member, is no different from the previous embodiment. Therefore, in the case of both male and female screws, GTO10
It will be performed by rotating 0 itself. There is an advantage that the number of parts is reduced.

FIGS. 1 (1) to 4 (4) show an example of a structure in which the gate pressing ring 127 and the gate terminal 101 are integrated with each other, and all of them show only the joint portion between them. The same figure (1) joins both by brazing, and the same figure (2) joins both by spot welding. Further, in FIG. 3C, a hole having a tapered portion is formed in the gate terminal 101 by press working, and a countersunk screw 107 is tightened to integrate both. It is applied when a thin plate is used for the gate terminal 101. Further, FIG. 4 (4) shows a case where a counterbore is formed in the gate terminal 101 and is tightened with a flat head screw 107 to integrate the both, and is applied when a thick plate is used for the gate terminal 101.

Eighth Embodiment FIG. 29 is a configuration diagram showing a main part of a semiconductor switching device according to an eighth embodiment of the present invention. Here, an elastic washer 133 newly made of an elastic member is adopted, and this is used for the gate pressing ring 127.
And the gate terminal 101.
FIGS. 1A and 2B are a plan view and a side view of the elastic washer 133 alone, and FIG. 3C is a cross-sectional view of a main part when the elastic washer 133 is applied. As shown in the figure, the elastic washer 133 is formed in a wave shape, and when the gate pressing ring 127 is screw-rotated with the mounting seat 123, the elastic washer 133 is pressed and deformed together with the gate terminal 101, and its axial height is contracted. And it becomes a state of energy accumulation. Since this accumulated force acts almost uniformly over the entire circumference of the gate terminal 101, if the gate pressing ring 127 is properly tightened and managed, even if there is some distortion in the flatness of the contact portion. , The elastic washer 133 is deformed to conform to the shape of each part of the contact surface, and the electrical connection between the gate terminal 101 and the wiring board 110 is made more uniform and reliable,
Also, the contact state becomes stable.

In FIG. 29, this elastic washer 13
The case where 3 is applied to the structure of FIG. 16 of the first embodiment has been described, but it goes without saying that it can also be applied to the other example of the preceding embodiment. Further, the number of elastic washers 133 to be inserted is not limited to one, and one may be inserted on each of the gate terminal 101 or both surfaces of the gate terminal 101 and the cathode terminal 105, that is, two in total.

Ninth Embodiment 30 is a configuration diagram showing a main part of a semiconductor switching device according to a ninth embodiment of the present invention. Here, the gate terminal 10 of the GTO 100
1 itself is configured by an elastic member that is deformed and contracted in the axial direction during pressure contact to be in a stored state. That is, FIG. 1A is its plan view and FIG. 2B is its side view. As shown in the figure, the gate terminal 101A is like a multi-blade turbofan,
Consisting of a large number of blade-shaped pieces 108 formed in the circumferential direction,
Each wing-shaped piece 108 is twisted at a predetermined gradient, and when pressed in the axial direction, each wing-shaped piece 108 is individually deformed to be in a stored state. This accumulated force is applied to the gate terminal 10
Since it works almost uniformly over the entire circumference of 1A, if the tightening control of the gate pressing ring 127 is properly performed, the flatness of the abutting portion of the gate pressing ring 127 and the wiring board 110 will have some distortion. Also, each blade-like piece 108 is deformed in a shape conforming to the shape of each part of the contact surface, and the gate terminal 10
The electrical connection between 1A and the wiring board 110 is made more uniform and reliable, and the contact state becomes stable. Figure 2
There is also an advantage that the number of parts such as the elastic washer 133 shown in 9 does not increase.

FIG. 31 is a further modification of the gate terminal shown in FIG. 30, in which the gate terminal 101B is made of an elastic member formed in a wave shape in the circumferential direction, as shown in FIG.
The same effect as the gate terminal 101A shown in FIG.

The gate terminal 1 in each of the above embodiments
Although all 01 are described as having a ring shape extending in the circumferential direction of the GTO 100, as shown in FIG. 32, a plurality of terminal pieces 109 are provided at equal intervals along the circumferential direction of the GTO 100. Thus, the present invention can be similarly applied to the gate terminal 101C having a form that extends discontinuously in the circumferential direction, and has the same effect.

Further, by applying the semiconductor switching elements according to the present invention and further including a gate controller for controlling the gates of these semiconductor switching elements to perform power conversion, as described above, the workability of connecting / disconnecting the gate terminals is improved. It is possible to obtain an electric power conversion device such as an inverter, which is good and has good value.

[0122]

As described above, the semiconductor switching device according to the first aspect of the invention has the semiconductor switching element provided with the gate terminal extending in the circumferential direction, and the pair of fixed side member and movable side member engaging with each other. The fixed-side member is fixed to the current path, the movable-side member is rotated to move in the axial direction of the rotating shaft, and the gate terminal is pressed against the gate terminal in the axial direction. And a gate connecting means for electrically connecting the current path to each other, the gate and the current path can be connected / disconnected by simply rotating a single movable member, and the work is extremely simple. Becomes

According to another aspect of the semiconductor switching device of the present invention, the semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path is the first conductive layer forming the gate side current path and the cathode side current. A wiring board formed by laminating a second conductive layer forming a path with an insulating layer interposed therebetween,
A ring-shaped mounting seat coaxially arranged with the semiconductor switching element on the outer periphery thereof, electrically connected to the first conductor layer of the wiring board and having female threads formed on the inner periphery, and a male member formed on the outer periphery. Since the screw is screwed into the female screw of the mounting seat, the gate pressing ring axially presses the gate terminal to electrically connect the gate terminal and the first conductor layer to each other. The operation of connecting and disconnecting the gate and the current path can be done by simply turning the male screw of one gate pressing ring onto the female screw of the mounting seat, which makes the work extremely simple and makes it possible to use a wiring board. A low inductance current path is realized.

According to another aspect of the semiconductor switching device of the present invention, the semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path includes a first conductive layer forming a gate side current path and a cathode side current. A wiring board formed by laminating a second conductive layer forming a path with an insulating layer interposed therebetween,
A ring-shaped mounting seat that is coaxially arranged with the semiconductor switching element and that is electrically connected to the first conductor layer of the wiring board and that has a guide extending in a spiral shape on the inner periphery, and an outer periphery. A gate pressing ring for projecting a pin engaging with the guide of the mounting seat and rotating the pin to axially press the gate terminal to electrically connect the gate terminal to the first conductor layer. Since it is equipped with, it is possible to connect and disconnect the gate and the current path only by the operation of engaging and rotating the pin of the single gate pressing ring with the guide of the mounting seat,
The work is extremely simple, and the use of a wiring board realizes a low-inductance current path.

Further, in the semiconductor switching device according to the fourth aspect, the first conductor layer exposed on one surface of the wiring substrate is brought into direct contact with the gate terminal, so that the gate terminal and the first conductive layer are electrically connected. An electrical connection with the layer is ensured.

According to a fifth aspect of the present invention, in the semiconductor switching device, the mounting seat has a seat portion formed by extending the end portion on the wiring board side toward the inner diameter side, and the seat portion is directly attached. Since the contact with the gate terminal is made, the force associated with the pressure contact operation is absorbed only by the mounting seat and the gate pressing ring and is not transmitted to the wiring board, so that the reliability of the wiring board is improved.

According to a sixth aspect of the semiconductor switching device of the present invention, there is provided a mounting plate, a gate pressing ring and a shaft via a conductor plate which is in contact with the cathode electrode of the semiconductor switching element and fixed by being pressed in the axial direction. Direction, the cathode spacer ring interposed between the second conductor layer exposed on the other surface of the wiring board and the conductor plate, and the conductor plate and the cathode spacer ring are pressed against each other. Since the first fastening tool to be joined and the second fastening tool to sandwich and press-contact the wiring board with the mounting seat and the cathode spacer ring to join with each other are provided, the presence of the cathode spacer ring results in the vicinity of the mounting seat. The structure is strong and reliability is improved.

According to a seventh aspect of the semiconductor switching device of the present invention, the semiconductor switching device is axially opposed to the gate pressing ring via the conductor plate and the wiring substrate which are in contact with the cathode electrode of the semiconductor switching element and fixed by being pressed in the axial direction. And a cathode spacer ring interposed between the second conductor layer exposed on the other surface of the wiring board and the conductor plate, and a first spacer for press-connecting the wiring board and the mounting seat to each other.
, And the second fastener for sandwiching and pressing the cathode spacer ring between the wiring board and the conductor plate to join them together, the size of the cathode spacer ring can be reduced by utilizing the strength of the wiring board. Will be realized.

A semiconductor switching device according to an eighth aspect is provided with a gate terminal and a cathode terminal for connecting a gate driver, which are formed on the front and back sides of the semiconductor switching element extending in the circumferential direction and electrically insulated from each other. ,
The current path is a wiring board in which a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path are laminated via an insulating layer, and is coaxial with the semiconductor switching element. A ring-shaped mounting seat, which is disposed on the outer periphery of the mounting seat, is electrically connected to the first conductor layer of the wiring board and has a female screw formed on the inner periphery thereof, and a male screw formed on the outer periphery of the ring-shaped mounting seat. A gate that is screwed onto a screw to press the gate terminal and the cathode terminal in the axial direction to electrically connect the gate terminal and the first conductor layer, and the cathode terminal and the second conductor layer, respectively. Since the presser ring is provided, the gate and cathode can be connected / disconnected with the current path by simply turning the male screw of the single gate presser ring onto the female screw of the mounting seat. Simply With, low-inductance current path is realized by adoption of the wiring board. Further, since it is not necessary to interpose a member for connecting the gate driver on the cathode electrode, it is possible to improve the cooling performance by directly bringing the cooling member into contact with the cathode electrode, for example.

According to a ninth aspect of the present invention, there is provided a semiconductor switching device comprising a gate terminal for connecting a gate driver and a cathode terminal which are formed on the front and back sides of the semiconductor switching element and which are circumferentially extended and electrically insulated from each other. ,
The current path is a wiring board in which a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path are laminated via an insulating layer, and is coaxial with the semiconductor switching element. A ring-shaped mounting seat provided on the outer periphery thereof and electrically connected to the first conductor layer of the wiring board and having a guide extending spirally on the inner periphery, and a guide for the mounting seat on the outer periphery. The gate terminal and the cathode terminal are pressed against each other in the axial direction by projecting and rotating the engaging pin, and the gate terminal and the first conductor layer, and the cathode terminal and the second conductor layer, respectively. Since the gate retainer ring to be electrically connected is provided, it is possible to connect / disconnect the gate / cathode and the current path by only the operation of engaging and rotating the pin of the single gate retainer ring with the guide of the mounting seat. That work Together becomes very simple, low-inductance current path is realized by adoption of the wiring board. Further, since it is not necessary to interpose a member for connecting the gate driver on the cathode electrode, it is possible to improve the cooling performance by directly bringing the cooling member into contact with the cathode electrode, for example.

According to a tenth aspect of the semiconductor switching device of the present invention, the first conductor layer and the second conductor layer are exposed on one surface of the wiring board in a mutually insulated state, and the exposed first conductor layer is exposed. Since the mounting seat and the cathode terminal are brought into direct contact with the first layer and the second conductor layer, respectively, by pressing the gate terminal and the cathode terminal with the gate pressing ring, both terminals respectively have the first and second conductive layers. Securely connected to.

According to the eleventh aspect of the semiconductor switching device of the present invention, there is provided a spacer ring arranged axially opposite the mounting seat and the gate pressing ring via the wiring board, and the mounting seat and the spacer ring. Since the clamps for sandwiching and pressing the wiring boards into contact with each other are provided, the structure in the vicinity of the mounting seat becomes strong due to the presence of the spacer ring, and the reliability is improved.

Further, in the semiconductor switching device according to the twelfth aspect, since the gate pressing ring is integrally fixed to the gate terminal of the semiconductor switching element,
The number of parts is reduced and the structure is simplified.

Further, in the semiconductor switching device according to the thirteenth aspect, since the elastic contactor is attached to the end surface of the gate pressing ring on the pressure contact side so that the elastic contactor is in the energy storage state during the pressure contact, the gate pressing ring. Even if the screws are loosely tightened, a uniform pressure contact force is applied to the gate terminal and a stable contact state can be obtained.

The semiconductor switching device according to a fourteenth aspect of the invention comprises an elastic washer which is made of an elastic member, is inserted between the gate pressing ring and the gate terminal, and is deformed and shrunk in the axial direction when pressed to be in a stored state. Since it is provided, even if the gate pressing ring is loosely tightened, a uniform pressure contact force is applied to the gate terminal and a stable contact state can be obtained.

Further, in the semiconductor switching device according to the fifteenth aspect, since the gate terminal is constituted by the elastic member which is deformed and contracted in the axial direction during the pressure contact to be in the energy storage state, the gate retainer is increased without increasing the number of parts. Even if the ring is loosely tightened, a uniform pressure contact force is applied to the gate terminal and a stable contact state can be obtained.

Further, in a semiconductor switching device according to a sixteenth aspect of the present invention, the wiring board has a plurality of pairs of first and second conductor layers, and the conductor layers are alternately laminated.
Since the first conductor layers are electrically connected to each other and the second conductor layers are electrically connected to each other through the through holes in the vicinity of the connection position with the semiconductor switching element, it is possible to further thoroughly reduce the inductance of the current path. It becomes easier to supply the turn-off current.

The semiconductor stack device according to the seventeenth aspect and the power conversion device according to the eighteenth aspect can provide a semiconductor stack device and a power conversion device having the above semiconductor switching elements and having particularly good workability in gate connection. .

[Brief description of drawings]

FIG. 1 is a circuit diagram of a semiconductor switching device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a specific configuration of a gate driver circuit.

FIG. 3 is a diagram showing a waveform of a current flowing to the gate side.

FIG. 4 is a cross-sectional view showing a GTO device package of the present invention.

FIG. 5 is a plan view showing the appearance of a GTO device package of the present invention.

FIG. 6 is a plan view showing the external appearance of the gate driver of the present invention.

FIG. 7 is a cross-sectional view showing a method for connecting a GTO element package of the present invention to a gate driver.

FIG. 8 is a plan view showing a gate driver when gate reverse currents are taken out from multiple directions.

FIG. 9 is a diagram showing an operation of the semiconductor switching device according to the first embodiment of the present invention.

FIG. 10 is a diagram showing an equivalent model of GTO.

FIG. 11 is a diagram showing the relationship between the increase rate of the voltage between the anode and the cathode electrode and the turn-off gain.

FIG. 12 is a diagram showing a flow of a main current at the time of turn-off in a conventional technique.

FIG. 13 is a diagram showing a main current flow at turn-off in the present invention.

FIG. 14 is a circuit diagram of a semiconductor switching device according to the first embodiment of the present invention, which is different from FIG.

FIG. 15 is a diagram showing actually measured waveforms in the apparatus of FIG.

FIG. 16 is a configuration diagram showing a main part of the semiconductor switching device according to the first embodiment of the present invention.

FIG. 17 is a cross-sectional view showing a part of FIG. 16 in an enlarged manner.

FIG. 18 is a configuration diagram showing a semiconductor stack device using the semiconductor switching device of FIG. 16.

FIG. 19 is a configuration diagram showing a main part of a semiconductor switching device according to a second embodiment of the present invention.

FIG. 20 is a configuration diagram showing a main part of a semiconductor switching device according to a third embodiment of the present invention.

FIG. 21 is a configuration diagram showing a main part of a semiconductor switching device according to a fourth embodiment of the present invention.

FIG. 22 is a configuration diagram showing a main part of a semiconductor switching device according to a fifth embodiment of the present invention.

FIG. 23 is a configuration diagram showing a modification of the semiconductor switching device according to the fifth embodiment of the present invention, which is different from that in FIG. 22.

FIG. 24 is a configuration diagram showing a modification of the semiconductor switching device according to the fifth embodiment of the present invention, which is different from FIG. 22.

FIG. 25 is a configuration diagram showing a main part of a semiconductor switching device according to a sixth embodiment of the present invention.

FIG. 26 is a cross-sectional view showing an enlarged part of FIG. 25.

FIG. 27 is a configuration diagram showing a modification of the semiconductor switching device according to the sixth embodiment of the present invention, which is different from that in FIG. 25.

FIG. 28 is a configuration diagram showing a main part of a semiconductor switching device according to a seventh embodiment of the present invention.

FIG. 29 is a configuration diagram showing a main part of a semiconductor switching device according to an eighth embodiment of the present invention.

FIG. 30 is a configuration diagram showing a main part of a semiconductor switching device according to a ninth embodiment of the present invention.

FIG. 31 is a configuration diagram showing a modification of the semiconductor switching device according to the ninth embodiment of the present invention, which is different from FIG. 30.

FIG. 32 is a diagram showing a modification of the gate terminal 101 extending in the circumferential direction.

FIG. 33 is a diagram showing a circuit of a conventional device.

FIG. 34 is a diagram showing measured waveforms of a conventional circuit.

FIG. 35 is a cross-sectional view of a conventional GTO device package.

FIG. 36 is a plan view showing the appearance of a conventional GTO device package.

FIG. 37 is a diagram for pointing out a conventional problem.

FIG. 38 is a diagram for pointing out a conventional problem.

[Explanation of symbols]

3 GTO, 3A anode electrode, 3K cathode electrode, 3G gate electrode, 4 gate driver, 5 peak voltage suppression circuit, R1 path, I _A main current, I _G turn-on control current, I _GQ gate reverse current, 100 GT
O, 101, 101A, 101B, 101C gate terminal, 102 anode electrode, 103 cathode electrode, 1
05 cathode terminal, 106 insulating ring, 110 wiring board, 111, 113 first conductive layer, 112, 11
4 second conductive layer, 115 insulating layer, 116 through hole, 120 conductor plate, 121 cathode spacer ring, 121A spacer ring, 122 flat head screw, 12
3 mounting seat, 124 female screw, 125 bolt, 126
Insulating spacer, 127 Gate retaining ring, 128
Male screw, 200 gate driver, 203 cooling fin, 210 mounting frame, 130 elastic contactor, 131 guide, 132 pin, 133 elastic washer.

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-9-201039 (JP, A) JP-A-8-330572 (JP, A) JP-A-61-227661 (JP, A) JP-A-8- 331835 (JP, A) Actual development Sho 55-67685 (JP, U) (58) Fields investigated (Int.Cl. ⁷ , DB name) H02M 1/06

Claims (18)

(57) [Claims] 1. A semiconductor switching device comprising: a semiconductor switching element having a gate electrode; and a gate driver for supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and comprises a pair of fixed side members and movable side members that engage with each other, the fixed side member being fixed to the current path, and the movable side. The member is provided with a gate connecting means for rotating to move in the axial direction of the rotating shaft to press the gate terminal in the axial direction to electrically connect the gate terminal and the current path. Characteristic semiconductor switching device. 2. A semiconductor switching device comprising: a semiconductor switching element having a gate electrode; and a gate driver for supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path is insulated from a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path. A ring formed by stacking layers through layers, the ring being provided coaxially with the semiconductor switching element on the outer circumference thereof and electrically connected to the first conductor layer of the wiring board and having a female screw formed on the inner circumference. The mounting terminal and the male screw formed on the outer circumference are screwed into the female screw of the mounting seat to press the gate terminal in the axial direction and Semiconductor switching device characterized by comprising a gate retaining ring for electrically connecting the over preparative terminal and said first conductive layer. 3. A semiconductor switching device comprising a semiconductor switching element having a gate electrode, and a gate driver supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The semiconductor switching element is provided with a gate terminal extending in the circumferential direction, and the current path is insulated from a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path. A guide that is a wiring board formed by stacking layers through layers, is coaxially arranged with the semiconductor switching element, is arranged on the outer periphery thereof, is electrically connected to the first conductor layer of the wiring board, and extends spirally on the inner periphery. A ring-shaped mounting seat formed with a pin, and a pin engaging the guide of the mounting seat on the outer periphery of the mounting seat, and the gate terminal is pivoted by rotating the pin. Pressed against the direction semiconductor switching device characterized by comprising a gate retaining ring for electrically connecting the gate terminal and the first conductive layer. 4. The semiconductor switching device according to claim 2, wherein the first conductor layer exposed on one surface of the wiring board is in direct contact with the gate terminal. 5. The mounting seat has a seat portion formed by extending an end portion on the wiring board side toward the inner diameter side, and the seat portion is configured to directly contact the gate terminal. The semiconductor switching device according to claim 2 or 3. 6. A conductor plate, which is in contact with a cathode electrode of a semiconductor switching element and is pressed and fixed in the axial direction, is fixed so as to be axially opposed to a mounting seat and a gate pressing ring via a wiring board. A cathode spacer ring interposed between the second conductor layer exposed on the other surface of the substrate and the conductor plate, a first fastener for pressure-bonding the conductor plate and the cathode spacer ring to each other, and 6. The semiconductor switching device according to claim 4, further comprising a second tightening tool that clamps and presses the wiring board with the mounting seat and the cathode spacer ring to couple the wiring board to each other. 7. A conductor plate, which is in contact with a cathode electrode of a semiconductor switching element and is pressed and fixed in an axial direction, is fixed so as to be axially opposed to a gate pressing ring via a wiring board, and the other side of the wiring board is provided. A cathode spacer ring interposed between the second conductor layer exposed on the surface of the substrate and the conductor plate, and a first spacer for press-connecting the wiring board and the mounting seat to each other.
6. The semiconductor switching device according to claim 4, further comprising: a second fastening tool for clamping the cathode spacer ring between the wiring board and the conductor plate to press-connect the cathode spacer ring to each other. 8. A semiconductor switching device comprising: a semiconductor switching element having a gate electrode; and a gate driver for supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The semiconductor switching element is provided with a gate terminal and a cathode terminal for circumferentially extending the semiconductor switching element and electrically insulated from each other and formed on the front and back sides for connecting a gate driver.
The current path is a wiring board formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path via an insulating layer, and is coaxial with the semiconductor switching element. A ring-shaped mounting seat that is disposed on the outer periphery of the mounting base and is electrically connected to the first conductor layer of the wiring board and that has a female screw formed on the inner periphery, and a male screw formed on the outer periphery of the mounting seat. The gate terminal and the cathode terminal are pressed against each other in the axial direction by being screwed into the female screw to electrically connect the gate terminal and the first conductor layer, and the cathode terminal and the second conductor layer, respectively. A semiconductor switching device comprising a gate pressing ring. 9. A semiconductor switching device comprising: a semiconductor switching element having a gate electrode; and a gate driver supplying a turn-off current between the gate electrode and the cathode electrode of the semiconductor switching element via a current path. The semiconductor switching element is provided with a gate terminal and a cathode terminal for circumferentially extending the semiconductor switching element and electrically insulated from each other and formed on the front and back sides for connecting a gate driver.
The current path is a wiring board formed by laminating a first conductive layer forming a gate side current path and a second conductive layer forming a cathode side current path via an insulating layer, and is coaxial with the semiconductor switching element. And a ring-shaped mounting seat formed on the outer periphery thereof and electrically connected to the first conductor layer of the wiring board and formed with a spirally extending guide on the inner periphery, and a guide for the mounting seat on the outer periphery. The gate terminal and the cathode terminal are axially pressed against each other by projecting and rotating a pin that engages with the gate terminal and the first terminal.
And a gate pressing ring for electrically connecting the cathode terminal and the second conductor layer, respectively. 10. A first conductor layer and a second conductor layer are exposed to one surface of a wiring board in a mutually insulated state, and are directly attached to the exposed first conductor layer and second conductor layer, respectively. The semiconductor switching device according to claim 8 or 9, wherein the seat and the cathode terminal are in contact with each other. 11. A spacer ring axially opposed to a mounting seat and a gate pressing ring with a wiring board interposed therebetween, and a tightening for clamping and contacting the wiring board with the mounting seat and the spacer ring to couple them together. The semiconductor switching device according to claim 8, further comprising an attachment. 12. The semiconductor switching device according to claim 2, wherein the gate pressing ring is integrally fixed to the gate terminal of the semiconductor switching element. 13. The elastic contactor is attached to an end surface of the gate pressing ring on the pressure contact side so that the elastic contactor is in a stored state during pressure contact. Semiconductor switching device. 14. An elastic washer which is made of an elastic member, is inserted between the gate pressing ring and the gate terminal, and is deformed and contracted in the axial direction during pressure contact to be in a stored state. 13. The semiconductor switching device according to any one of 1 to 12. 15. The semiconductor switching device according to claim 2, wherein the gate terminal is composed of an elastic member that is deformed and contracted in the axial direction when pressed to be in a stored state. 16. A wiring board comprising a plurality of pairs of first and second conductor layers and alternating layers of the two conductor layers, wherein the first conductor is provided in the vicinity of a connection position with a semiconductor switching element. 16. The semiconductor switching device according to claim 2, wherein the layers and the second conductor layers are electrically connected to each other through a through hole. 17. The semiconductor switching device according to claim 1, wherein the semiconductor switching device and a cooling member for radiating heat generated from the semiconductor switching device are stacked and arranged in a mounting frame. Semiconductor stack device using the device. 18. A power conversion device using the semiconductor switching device according to claim 1, further comprising a gate control device that gate-controls the semiconductor switching element to perform power conversion.