JP3369396B2 - Wireless transmission / reception shared frequency converter - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency converter provided in a mobile communication device such as a mobile phone, and more particularly to a reception multiplication circuit used in a time division duplex (TDD) system. The present invention relates to a frequency converter capable of sharing a transmission multiplication circuit.

[0002]

2. Description of the Related Art In recent years, mobile radio communication devices such as mobile phones have been actively developed, and these mobile radio communication devices are always carried by users or mounted in vehicles. Therefore, there is a demand for miniaturization and weight reduction. Therefore, conventionally, a mobile wireless communication device was configured by a hybridized (composite) component in which a large number of single components were connected, but in recent years, a monolithic integrated circuit (IC) component suitable for downsizing and weight reduction has been used. It has become essential to configure. Further, in terms of portability, it is strongly demanded that a mobile phone or the like be driven by a battery or the like, so that lower voltage and lower power consumption of an integrated circuit (IC) are also required.

As an example of such a conventional mobile radio communication device, a configuration of a heterodyne type radio communication device is shown in FIG. In FIG. 28, time division duplexing (TD
The D) type wireless communication device has terminals 1 and 2 for inputting a baseband signal to be transmitted and terminals 3 and 4 for inputting a baseband signal converted from a received high frequency signal.
An antenna 5 for receiving a high frequency signal including a radio frequency (RF), converting the base frequency signal into a high frequency signal and transmitting the high frequency signal; and a transmitting unit 1 for generating a high frequency signal to be transmitted.
0, and a receiver 20 that converts the received high-frequency signal into an intermediate frequency (IF) or a base frequency.

The antenna 5 includes a transmission / reception changeover switch 6
It functions as a transmitting antenna when transmitting and as a receiving antenna when receiving. Reference numerals 7 and 8 are first and second local oscillators that supply the first and second local oscillation signals to the multipliers provided in the transmission unit 10 and the reception unit 20, respectively, which will be described later, and the reference numeral 9 is the second local oscillator. Is a 90-degree phase shifter for converting the second local oscillation signal output from the local oscillator 8 into a signal having a 90-degree phase difference.

The transmission section 10 outputs from the I-channel transmission terminal 2 (I-ch Tx) and the Q-channel transmission terminal 3 (I-ch Tx), which outputs the signal subjected to the digital signal processing in the digital signal processing section 1, respectively. An I-channel transmission frequency converter 11 and a Q-channel transmission frequency converter 1 for multiplying the output transmission signals by the signals supplied from the second local oscillator 8 and the 90-degree phase shifter 9, respectively.
2 and the adder 13 for adding the outputs of the converters 11 and 12
A high-frequency amplifier 14 for amplifying the added output of the adder 13 at a high frequency while varying its gain, and a band-pass filter 1 for passing the frequency of a specific band of the output of the amplifier 14.
5, a multiplier 16 that multiplies the first local oscillation signal supplied from the first local oscillator 7 and the output of the amplifier 14 to convert the frequency, and a variable attenuation that attenuates the output of the multiplier 16. It includes a device 17, a power amplifier 18 for amplifying the power of its output, and a bandpass filter 19 for passing only a specific frequency of its output. The output of the transmitter 10 is transmitted via the antenna 6a while the transmission mode is being switched by the transmission / reception selector switch 6.

The receiving section 20 receives a received signal received through the antenna 6a during the switching to the receiving mode by the change-over switch 6 and amplifies this received signal with low noise, and a low noise amplifier 21 therefor. A bandpass filter 22 that passes only a specific frequency of the output, a multiplier 23 that multiplies the first local oscillation signal supplied from the first local oscillator 7 to convert the frequency, and a specific frequency of the output A band pass filter 24 for passing only
A variable gain high frequency amplifier 25 that amplifies the output of 4 while varying it, and outputs the respective frequencies of the I channel component and the Q channel component of the received signal to the second local oscillator 8 and the 90-degree phase shifter 9. I-channel receiving frequency converter 26 and Q-channel receiving frequency converter 2 for converting respective frequencies by multiplying the respective outputs
7 and the outputs of the respective frequency converters 26 and 27 are the I-channel receiving terminal 4 (I-ch Rx) and the Q-channel receiving terminal 5 of the digital signal processing unit 1.
(Q-ch Rx).

The operation of the conventional frequency converter having the above structure will be described below.

Two orthogonal baseband signals Ich generated by a baseband signal generator (not shown)
(TX) and Qch (TX) are each passed through an appropriate band limiting filter, and then the frequency converter I-MIX (T
X) and Q-MIX (TX) are input to the baseband input section. I-MIX (TX) is the second local signal (2
nd-LO) is input, and the second is input to Q-MIX (TX).
A local signal having a phase difference of 90 degrees from that of the local signal is input. I-MIX (TX), Q-MIX (TX)
Modulate each local signal with the respective input baseband signals. I-MIX (TX) and Q-MIX
The (TX) output signals are summed to produce an intermediate frequency (IF) signal.

The IF signal is an intermediate frequency amplifier (AM
P) and the band pass filter (BPF), and is input to the first frequency converter MIX (TX). MIX (T
X) modulates a first local signal (1st-LO) with an IF signal, and outputs a desired RF (Radio Frequency).
ncy) signal is output. The RF signal is a variable attenuator (A
After being amplified to a desired output level by the TT) and the power amplifier (PA), it is input to the bandpass filter (BPF) to attenuate out-of-band spurious. Then RF
Signals are transmitted / received switch (T / R), antenna (A
It is radiated in the air through (NT).

Next, the receiving section will be described. The RF signal received by the ANT is sent to the low noise amplifier (LN
It is input to A) and amplified by LNA. The RF signal output from the LNA is attenuated by the bandpass filter to eliminate unnecessary signals at the image frequency and input to the MIX (RX). The MIX (RX) performs frequency conversion of the RF signal by multiplying the RF signal and the first local signal (1st-LO) to generate an IF signal. IF signal is BPF,
I-MIX (RX) and Q-MIX (R) via AMP
X). I-MIX (RX), Q-MIX
(RX) frequency-converts the IF signal input to the second local signal (2nd-LO) having a phase difference of 90 degrees into a baseband signal. The frequency-converted baseband signals Ich (RX) and Qch (RX) are input to a detector via a low-pass filter (not shown).

The frequency converter described with reference to FIG. 28 can be roughly divided into a transmission system frequency converter and a reception system frequency converter. In other words, the frequency converter of the transmission system uses the input signal IN
(LOW) is a low frequency signal such as a baseband signal,
The output signal OUT (HIG
H) indicates a frequency converter that outputs a high frequency signal compared to an input signal such as an RF signal. On the other hand, in the frequency converter of the receiving system, the input signal IN (HIGH) is a high frequency signal such as an RF signal, and the output signal OUT (LOW) is compared with an input signal such as a baseband signal by multiplication with a local signal. 3 illustrates a frequency converter that outputs a low frequency signal. The input / output relationship between the frequency converter of the transmission system and the frequency converter of the reception system is shown in FIGS. 30 (a) and 30 (b), respectively. The horizontal axis of the figure represents frequency and the vertical axis represents signal amplitude.

As described above, when the frequency converter uses the heterodyne system, it is a frequency converter of the transmission system I.
-MIX (TX), Q-MIX (TX), MIX (T
X) and the frequency converter of the receiving system, MIX (RX), I
A large number of -MIX (RX), Q-MIX (RX), etc. are required. Since miniaturization of wireless terminals is essential for wireless terminals that require portability, we would like to reduce the number of frequency converters in order to reduce the mounting area and hence the chip area, but in the above example, at least 6 It will be necessary.

Next, a direct modulation / demodulation system which can be reduced by the frequency converter will be described with reference to FIG.

Two orthogonal baseband signals Ich generated by a baseband signal generator (not shown)
(TX) and Qch (TX) are passed through an appropriate band limiting filter, and then the frequency converter I-MIX1 (T
X) and Q-MIX1 (TX) are input to the baseband input section. I-MIX (TX) is a local signal (LO)
Is input, and 9 of the local signal is input to Q-MIX (TX).
Local signals having a phase difference of 0 degrees are input. I-MI
X1 (TX) and Q-MIX1 (TX) modulate each local signal by the input baseband signal. The output signals of I-MIX1 (TX) and Q-MIX1 (TX) are added to generate an RF signal. The RF signal is amplified to a desired output level by a variable attenuator (ATT) and a power amplifier (PA), and then input to a bandpass filter (BPF) to spatter spurious outside the band. After that, the RF signal is transmitted / received by the switch (T
/ R) and the antenna (ANT).

Next, the receiving section will be described. The RF signal received by the ANT is sent to the low noise amplifier (LN
It is input to A) and amplified by LNA. The RF signal output from the LNA has an unnecessary signal attenuated by a bandpass filter, and two frequency converters I-MIX1 (R
X) and Q-MIX1 (RX). I-MIX
(RX) and Q-MIX (RX) are RF signals input using local signals (LO) whose phases are different by 90 degrees.
Frequency-convert the signal to a baseband signal. Frequency-converted baseband signals Ich (RX), Qch (R
X) is input to the detector via a low-pass filter (not shown). In the direct modulation method, the number of frequency converters can be reduced to at least 4 as described above. However, there is a demand to further reduce the required number. In addition, reducing the number of frequency converters requires FDD (Fre
In a frequency division duplex (QD) system, power consumption is also reduced.

[0016]

Due to the area of the IC or the low power consumption, the number of frequency converters used in the radio is reduced.

In order to solve the above-mentioned problems, a radio transmission / reception shared frequency converter according to a first basic configuration of the present invention multiplies a high frequency signal including a received radio frequency by a local oscillation signal, outputs the product, and transmits the product. A multiplication circuit that multiplies a low-frequency signal including a base frequency to be multiplied by the local oscillation signal and outputs the result, and a multiplication circuit that adds a transmission signal and a reception signal having different frequency bands used in a radio to add the addition signal. , An at least one filter that inputs the output signal of the multiplication circuit and separates the output after frequency conversion into different frequency bands, and at least one filter between the multiplication circuit, the output, and the filter. And a buffer amplifier inserted in between. In addition, in the radio transmission / reception shared frequency converter according to the first basic configuration, a switching means for switching between signal processing at the time of transmission and signal processing at the time of reception is further provided, and the multiplication circuit is configured to perform switching operation of the switching means. Based on this, the high frequency signal including the radio frequency signal may be multiplied by the local oscillation signal during reception, and the high frequency signal including the base frequency signal may be multiplied by the local oscillation signal during transmission. In addition, in the wireless transmission / reception shared frequency converter according to the first basic configuration, the adder includes a base / gate terminal to which a first input signal is supplied and an emitter / source to which a second input signal is supplied. A first transistor having a terminal may be provided. In addition, in the wireless transmission / reception shared frequency converter according to the first basic configuration, the adder includes a first transistor to which a first signal and a second signal are supplied to an emitter / source terminal. Is also good. In addition, in the wireless transmission / reception shared frequency converter according to the first basic configuration, the adder includes a second transistor including a base / gate terminal to which a first input signal is supplied and an emitter / source terminal which is grounded. And a third transistor including a base / gate terminal supplied with the second input signal and an emitter / source terminal grounded,
And the currents flowing in the collector / drain of the second and third transistors may be added. Also, the shared radio transmission / reception frequency converter according to the second basic configuration of the present invention multiplies and outputs a high frequency signal including a received radio frequency and a local oscillation signal, and outputs a low frequency including a base frequency to be transmitted. A multiplication circuit that multiplies a frequency signal and the local oscillation signal and outputs the result; an adder that adds a transmission signal and a reception signal of different frequency bands used in a radio device and outputs an addition signal to the multiplication circuit; At least one filter that receives the output signal of the multiplication circuit and separates the output after frequency conversion into different frequency bands, and at least one buffer amplifier interposed between the multiplication circuit, the output, and the filter And a switching means for switching between signal processing at the time of transmission and signal processing at the time of reception, wherein the multiplication circuit is configured to perform a switching operation of the switching means. Zui, the multiplies the high-frequency signal and the local oscillation signal including the radio frequency signal at the time of reception, the time of transmission is characterized by multiplying the high frequency signal and the local oscillation signal including the base frequency signal.

[0018]

1 is a block diagram showing a radio communication system to which a frequency converter according to the present invention is applied. In FIG. 1, each circuit constituting a transmitting unit 10B and a receiving unit 20B is a diagram. The same components as those of the circuit described in 28 are denoted by the same reference numerals, and redundant description will be omitted. The novel configuration in FIG. 1 is a frequency conversion unit 30 that also serves as both transmission and reception.

The frequency converter 30 includes a bandpass filter 15 and a variable attenuator 17 of the transmitter 10B, and a receiver 20B.
And a band-pass filter 22 and 24 of, and a frequency converter 32 for both transmission and reception that multiplies an input signal by a local oscillation signal from the local oscillator 7, an I-channel frequency converter 33 for both transmission and reception, and transmission and reception sharing. Q channel frequency converter 34 of FIG. The frequency converter 32,
33 and 34 are controlled to switch between transmitting and receiving by a switching control signal supplied from a terminal 1a of the digital signal processing section 1. The digital signal processing unit 1 also supplies a switching control signal to the transmission / reception switching switch 6 via the terminal 1b.

FIG. 2 is a block diagram showing a direct conversion wireless communication system to which the frequency converter according to the present invention is applied, and corresponds to the conventional direct conversion wireless communication system shown in FIG. is doing. Also in the figure,
The same reference numerals as those in FIG. 29 are omitted for redundant description.

In FIG. 2, the frequency conversion unit 30 of FIG. 1 corresponds to the frequency conversion unit 30A, which is substantially the same as the frequency conversion unit 30 of FIG. 1 except that the frequency converter 32 is not provided. It has the same configuration.

Embodiments will be described below with reference to the drawings.
FIG. 3 is a basic conceptual diagram relating to the present invention. Adder 30
Is a multiplication circuit as a frequency converter after adding the high frequency input signal RXin (frequency f (RXin)) and the low frequency input signal TXin (frequency f (TXin)) input from the input terminals 1 and 2, respectively. Input to the input terminal 3 of 10. On the other hand, the local signal LO is the frequency converter 1
0 is input to the local input terminal 4. The output terminal 5 of the multiplication circuit 10 is connected to the high frequency output signal TXout and is also input to the input terminal of the buffer amplifier BUFF20. The output terminal 6 of the BUFF 20 is a low frequency output terminal RX.
connected to out. Although not shown in the figure, TXou
Only the high frequency component of t is extracted through the high pass filter or the band pass filter, and only the low frequency component of RX out is extracted through the low pass filter or the band pass filter. BUFF is RXou
This is for preventing the characteristics of the filter connected after t from affecting the terminal 5. If the frequency converter is applied to a TDD system, TXo
The filter may not be necessary after ut.

FIG. 4 is another basic conceptual diagram relating to the present invention. The difference from FIG. 3 is that the output terminal 5 of the multiplication circuit 10 as the frequency converter is connected to TXout via the buffer amplifier BUFF40. That is, the adder 30 receives the high frequency input signal RXin (frequency f (RXi) input from the input terminals 1 and 2, respectively.
n)) and the low-frequency input signal TXin (frequency f (TXi
n)) is added and then input to the input terminal 3 of the multiplication circuit 10 as a frequency converter. On the other hand, the local signal L
O is input to the local input terminal 4 of the frequency converter 10. The output terminal 5 of the multiplication circuit 10 is a buffer amplifier BUFF.
40 and buffer amplifier BUFF20. Output terminal 7 of buffer amplifier BUFF40
Is connected to the high frequency output signal TXout. The output terminal 8 of the buffer amplifier BUFF20 has a low-frequency output signal RXo.
connected to ut.

The input / output spectrum of the frequency converter of this basic conceptual diagram is shown in FIG. The RXin spectrum is shown at 1 and the TXin spectrum is shown at 2. The local signal is shown at 4 and the output is shown at 5.
As shown in the figure, the input signal is the addition of 1 and 2, and the added signal is multiplied by LO (4) to perform frequency conversion. If the frequency converter is ideal, the 1 component of the input signal is converted into the low frequency component 5-1 of the output signal, and the 2 component of the input signal is converted into the high frequency component 5-2. With the TDD method shown in FIGS. 28 and 29,
As for the input signal, only 1 or 2 is instantaneously input, and there is no difference from the frequency converter of the conventional example, but the signals of the transmission system and the signals of the reception system are temporally changed. Will be input alternately. Although not shown in the conventional example, in the case of FDD, as shown in FIG. 5, the input signals 1 and 2 are simultaneously input and the output signal 5 is input.
-1, 5-2 will be output. However,
Even in this case, as in the case of TDD, only the desired signal can be taken out from the output signal by the filter connected after the frequency converter.

Next, a specific embodiment of the frequency converter for inputting the addition signal of the reception signal (high frequency signal) and the transmission signal (low frequency signal) will be described.

FIG. 18 shows a concrete circuit diagram. TXin
Shows a low frequency input signal which is IN (LOW) in FIG. 18, and LO and LO / show local signals. Also OU
T and OUT / indicate output signals. The base of the transistor Q1 is connected to TXin via the terminal 100, and the emitter terminal (101) is grounded via the resistor R1. The collector terminal is connected to the common emitter terminal of the transistors Q2 and Q3. Base terminal of transistor Q2 (10
3) is connected to LO and the collector terminal is the output terminal OUT
Connected to the power supply terminal VD via the resistor R2
Connected to D. Base terminal of transistor Q3 (10
4) is connected to LO /, the collector terminal is the output terminal OU
It is connected to T / and is also connected to the power supply terminal VDD via the resistor R3. Generally, resistance values of R2 and R3 are selected to be equal. In this circuit, the input signal of TXin is converted into a current by the transistor Q1 and the resistor R1. The signal converted into the current is determined by the differential pair transistors Q2 and Q3 to flow through the resistor R2 or the resistor R3 according to the magnitude of the LO signal and the LO / signal. If the gains of the transistors Q2 and Q3 are infinite, current flows into R2 if (potential of LO)> (potential of LO /), and if (potential of LO) <(potential of LO /). Current will flow in R3.

FIG. 5 is a specific circuit diagram of the conventional example shown in FIG. Compared with FIG. 4, the circuit is different only in that the terminal TXin is RXin which is a high frequency input. The operation is the same as in FIG.

FIG. 6 shows one concrete circuit diagram. The part different from FIG. 4 is the part of the current source composed of Q20, VBB, and R20. The structure of that portion is shown below. The collector of the transistor Q20 is connected to the common emitter terminal of the differential pair transistor composed of Q21 and Q22,
It is grounded through the base power supply VBB. The emitter terminal is connected to TXin and is grounded via the resistor R20. In this circuit, a voltage can be input from TXin as in the case shown in FIG. 4, but a signal by current can also be input. The operation of the circuit is the same as in FIG.

FIG. 19 shows another concrete circuit diagram. The circuit configuration is the same as that of FIG. 6, except that the signal input from Q30 is RXin which is a received signal.

FIG. 6 shows a concrete circuit example of the present invention. The signal addition function shown in FIG. 3 or 4 and the LO are shown.
Only the multiplication with the signal is shown. The BUFF shown in FIG. 3 or FIG. 4, which is not shown in the figure, can be easily realized by, for example, an emitter follower circuit, and thus this circuit is omitted. The circuit connections are shown below. Transistor Q1
The emitter terminal of 00 is connected to the high frequency input RXin on the receiving side and is grounded via the resistor R100.
The base terminal is connected to the low frequency input TXin on the transmitter side,
The collector terminal is connected to the common emitter terminal of the differential pair transistor including the transistors Q101 and Q102. The base terminal of Q101 is connected to the local input terminal LO, the collector terminal is connected to the output terminal OUT, and is also connected to the power supply terminal VDD via the load resistor R101. The base terminal of Q102 is connected to the local input LO / terminal, the collector terminal is connected to the output terminal OUT /, and is also connected to the power supply VDD via the load resistor R102.

The differential pair transistor causes a current flowing in the collector terminal of Q100 to flow into a resistor R1 in response to a local signal.
No. 01 or the resistor 102 is switched to flow. The addition of the TXin signal and the RXin signal is performed by the transistor Q100 and the resistor R100. The TXin signal input to the base is the transistor Q100,
The voltage is converted into a current by the linear voltage-current conversion circuit including the resistor R100, and is output to the collector terminal of the transistor Q100. On the other hand, the RXin signal input to the emitter terminal of Q100 is the transistor Q seen from the emitter terminal.
The current is shunted to the ratio of the reciprocal of the input impedance of 100 and the reciprocal of the resistance value of the resistor R100, and the current input to the emitter terminal is output to the collector terminal with a gain of approximately 1. Therefore, a current proportional to the TXin signal and a current proportional to the RXin signal are added and output to the collector terminal of the transistor Q100.

FIG. 7 shows an example of a concrete circuit according to the present invention. The circuit of FIG. 7 has substantially the same configuration as the circuit of FIG. 6, except that the base RXin signal of the transistor Q120 is input and TXin is input to the emitter terminal. The operation is similar to that of the circuit shown in FIG. 6, and therefore its explanation is omitted.

FIG. 8 shows an example of a concrete circuit according to the present invention. Transistors Q141, 142, resistors R141,
The configuration of the differential circuit formed of 142 is the same as that of FIG.

One end of the current source I-TXin has a power source VDD.
The other end of the transistor Q144 is connected to the collector and the base of the transistor Q144.
3 is connected to the base terminal. The emitter terminal of Q144 is grounded via a resistor R143. Transistor Q1
The emitter terminal of 43 is grounded via a resistor R140,
The collector terminal is connected to the emitter terminal of the grounded base transistor Q140 connected to the base power supply VBB and also to the reception signal input terminal RXin. Q14
The collector terminal of 0 is a differential pair transistor Q141, Q
It is connected to the common emitter terminal of 142. In the present circuit, the current source I-TXin represents the current signal of the TXin signal, but the bias current may include the current (DC current). The operation of this circuit is shown below. Low frequency current I-TXin which is a transmission signal including a bias current
Is input to the emitter terminal of Q140 by the current mirror circuit composed of Q144, Q143, R143, and R140. In addition, as shown in FIG.
in is input as a current to the emitter terminal of Q140 according to the ratio of the reciprocal of the impedance seen from the emitter of Q140 and the reciprocal of the impedance seen from the collector terminal of Q143. Therefore, the current proportional to the current signal due to TXin and the current signal due to RXin are added to the collector terminal of Q140 and output. The current is supplied to the differential pair transistor Q1 according to the local signal.
41 and Q142 flow to either of the load resistors R141 and R142.

FIG. 9 shows an example of a specific circuit according to the present invention. The difference from FIG. 8 is the configuration of the current source I-TXin, and therefore only that will be described. Transistor Q
The emitter terminal of 165 is connected to the power source VD via the resistor R164.
Connected to D. The low frequency signal TXin is input to the base terminal. The collector terminal of Q165 is transistor Q1
It is connected to the collector and base terminals of 64 and the base terminal of the transistor Q163. The TXin signal is converted into a current by the voltage-current conversion circuit including the transistor Q165 and the resistor R164, and the current is input to Q164. Q164,
The current is duplicated by the current mirror circuit composed of Q163, R163 and Q160, and the grounded base transistor Q
A signal proportional to TXin is input to the emitter terminal of 160. In other parts, the operation is exactly the same as in FIG.

FIG. 10 shows an example of a specific circuit according to the present invention, in which the reception signal RXin input and the low frequency transmission signal TXin (I-TXin) input of FIG. 10 are interchanged.

FIG. 11 is a diagram showing an example of a specific circuit according to the present invention in which the reception signal input RXin and the low frequency transmission signal TXin of FIG. 10 are replaced. 12 and 13 perform operations similar to those in FIGS. 8 and 9, respectively.

FIG. 12 shows an example of a specific circuit according to the present invention, in which a signal obtained by adding a low frequency signal for transmission and a high frequency signal for reception is input to the base of a voltage-current converting transistor Q10. It is. On the other hand, FIG. 13 shows an example of a specific circuit according to the present invention. A signal obtained by adding a low frequency signal for transmission and a high frequency signal for reception is input to a terminal of a high frequency (current) signal for reception RXin. It is a thing.

14 to 17 show a concrete embodiment of a circuit for adding the low frequency signal for transmission and the high frequency signal for reception shown in FIGS. 12 and 13.

In FIG. 14, the TXin signal is converted into a current by the voltage-current conversion circuit composed of Q260 and resistor R260. Further, the TXin signal is converted into a current by the voltage / current circuit composed of Q261 and the resistor R261. The signals converted into currents are added together and flow through the load resistor R262. As a result, a signal proportional to the signal obtained by adding TXin is output to the output terminal OUT.

FIG. 15 shows a circuit in which cascode transistors Q282 and 283 are connected to the circuit shown in FIG. 14, thereby increasing the speed.

FIG. 16 is a level shift circuit (Level Shift Circuit) having a buffer amplifier function at the output stage of the circuit of FIG.
t) is connected.

FIG. 17 shows a circuit in which a level shift circuit is connected to the circuit of FIG. Since the adder circuits of FIGS. 15 to 19 basically perform the same operation as that of FIG. 14, the description of the operation will be omitted.

20, FIG. 21, FIG. 22, FIG. 23, FIG.
4, FIG. 25, FIG. 26, and FIG. 27 are specific circuit examples according to the present invention, which are differential circuits of FIGS. 6, 7, 12, 13, 8, 9, 10, and 12, respectively. Since the operation of the digitalization circuit is the same as that of the single-phase input, the description is omitted.

The above-described embodiment of the frequency converter for transmission / reception has been described on the assumption that a bipolar transistor is used as an active element (which is assumed by the symbol).
-For example, CMOS or GaAs MESF as well as HBT
The same operation can be performed using a field effect transistor (FET) such as ET.

FIG. 1 shows a diagram in which the transmission / reception frequency converter described above is applied to the conventional heterodyne system shown in FIG. MIX (RX) and MI shown in FIG.
X (TX) can be replaced with one combined MIX (RX, TX) by using the transmission / reception frequency converter of the present invention.

The I-MIX (RX) shown in FIG.
And I-MIX (TX) are replaced with I-MIX (RX, TX), and Q-MIX (TX) and Q-MI
X (RX) is replaced with Q-MIX (RX, TX).

FIG. 2 shows a configuration in which the present transmission / reception frequency converter is used in the direct modulation system.

By using the transmitting / receiving frequency converter of the present invention, Q-MIX1 (RX) and Q-MI shown in FIG.
X1 (TX) is replaced with Q-MIX1 (RX, TX), and I-MIX1 (RX) and I-MIX1 (TX) are replaced with I-MIX1 (RX, TX).

In the application of the transmission / reception frequency converter described above, the TDD system has been taken as an example, but by adding the desired filter after distributing the output of the frequency converter using a buffer amplifier or the like, FDD (Frequency
It can also be applied to a Division Duplex system. In this case, since there is only one frequency converter, not only the IC can be downsized, but also low power consumption can be achieved.

[0051]

As described above in detail, in the frequency converter according to the present invention, the conversion of the respective frequencies of the signal to be transmitted and the received signal is performed by the sharable multiplication circuit. It is not necessary to provide the respective multipliers for reception and transmission in duplicate, and the integrated circuit constituting this frequency converter can be highly integrated.

When the frequency converter according to the present invention is mounted in a transmission / reception system such as a radio device or a mobile phone,
The overall size and weight of the device can be reduced. Furthermore, when the frequency converter according to the present invention is applied to a frequency division duplex system, one frequency converter is used for both reception and transmission, which results in high integration of integrated circuits. Therefore, it also has an effect of contributing to reduction of power consumption.

[Brief description of drawings]

FIG. 1 is a block diagram showing an entire wireless transmission / reception system including a frequency converter according to the present invention.

FIG. 2 is a block diagram showing the whole of another wireless transmission / reception system including the frequency converter according to the present invention.

FIG. 3 is a circuit diagram showing a basic configuration of an example of a frequency converter according to the present invention.

FIG. 4 is a circuit diagram showing a basic configuration of another example of the frequency converter according to the present invention.

FIG. 5 is an explanatory diagram showing an operation of the frequency converter according to the present invention.

FIG. 6 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 7 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 8 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 9 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 10 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 11 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 12 is an explanatory diagram showing an example of a transmission / reception shared frequency converter according to the present invention.

FIG. 13 is an explanatory diagram showing an example of a transmission / reception shared frequency converter according to the present invention.

FIG. 14 is an explanatory diagram showing an example of a transmission / reception signal addition circuit according to the present invention.

FIG. 15 is an explanatory diagram showing an example of a transmission / reception signal addition circuit according to the present invention.

FIG. 16 is an explanatory diagram showing an example of a transmission / reception signal addition circuit according to the present invention.

FIG. 17 is an explanatory diagram showing an example of a transmission / reception signal addition circuit according to the present invention.

FIG. 18 is an explanatory diagram showing an example of a transmission / reception shared frequency converter according to the present invention.

FIG. 19 is an explanatory diagram showing an example of a transmission / reception shared frequency converter according to the present invention.

FIG. 20 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 21 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 22 is an explanatory diagram showing an example of a transmission / reception shared frequency converter according to the present invention.

FIG. 23 is an explanatory diagram showing an example of a transmission / reception shared frequency converter according to the present invention.

FIG. 24 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 25 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 26 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 27 is an explanatory diagram showing an example of a transmission / reception shared frequency converter including a transmission / reception signal addition circuit according to the present invention.

FIG. 28 is an explanatory diagram showing an example of a conventional wireless system.

FIG. 29 is an explanatory diagram showing another example of a conventional wireless system.

FIG. 30 is a diagram for explaining the operation of each of the conventional frequency converters for transmission (a) and reception (b).

[Explanation of symbols]

30, 30A Transceiver shared frequency converter 31 Switching control circuit 32, 33, 34 frequency converter PA power amplifier T / R transmission / reception switch AMP variable gain high frequency amplifier MIX frequency converter 90 90 degree phase shifter LO local signal or local input terminal BUFF buffer amplifier ANT antenna Level Shift level shift circuit Rn (n = integer) resistance Cn (n = integer) capacitor Qn (n = integer) transistor In (n = integer) Current source VDD, VBB voltage source TXin Low frequency signal or transmission signal RXin high frequency signal or received signal OUT output terminal

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI H04B 7/26 H04L 27/00 Z H04Q 7/32 H04B 7/26 V // H04L 5/16 P (56) References JP-A-6-216803 (JP, A) JP-A-6-125368 (JP, A) JP-A-5-130055 (JP, A) JP-A-4-227194 (JP, A) JP-A-6-253167 (JP , A) JP-A-2-73481 (JP, A) JP-A-3-13004 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H04L 27/00-27/38 H04B 1/00

Claims (4)

(57) [Claims] 1. A multiplication for multiplying and outputting a high frequency signal including a received radio frequency and a local oscillation signal, and for multiplying and outputting a low frequency signal including a base frequency to be transmitted and the local oscillation signal. A circuit, an adder for adding a transmission signal and a reception signal having different frequency bands used in a radio device, and outputting the addition signal to the multiplication circuit; and an output signal of the multiplication circuit for inputting a frequency-converted output. At least one filter for separating each of the different frequency bands, at least one buffer amplifier interposed between the multiplication circuit, the output, and the filter, and switching between signal processing during transmission and signal processing during reception. a radio transceiver shared frequency converter comprising a switching means, wherein the multiplier circuit is based on the switching operation of said switching means
When receiving, a high frequency signal including the radio frequency signal
It is multiplied by the local oscillation signal and the
Multiplies a high-frequency signal including several signals by the local oscillation signal
A frequency converter for both wireless transmission and reception. 2. The adder comprises a first transistor having a base / gate terminal supplied with a first input signal and an emitter / source terminal supplied with a second input signal. The shared frequency transmitter-receiver frequency converter according to claim 1. 3. The radio transmission / reception shared frequency conversion according to claim 1, wherein the adder comprises a first transistor to which a first signal and a second signal are supplied to an emitter / source terminal. vessel. 4. A second transistor having a base / gate terminal supplied with a first input signal and an emitter / source terminal grounded, and a base / gate supplied with a second input signal. A third transistor including a gate terminal and an emitter / source terminal grounded,
2. The radio transmission / reception shared frequency converter according to claim 1, wherein the currents flowing through the collectors / drains of the second and third transistors are added.