JP3351345B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, with the development of information communication, demands for miniaturization, weight reduction, and high performance of portable information devices have been increasing more than ever. Along with this, it is desired to reduce the mounting area of the semiconductor package and increase the connection terminal density. Accordingly, attention has been paid to a mounting technique of a method called flip-chip mounting. In the flip-chip mounting method, bump electrodes (bumps) are formed on connection pads of a semiconductor chip as a semiconductor device, and the semiconductor chip is bonded to a circuit board (PCB) with the LSI surface of the semiconductor chip facing down (face down). It is.

In order to manufacture a semiconductor chip used in the flip-chip mounting method, an integrated circuit is formed in each chip area 3 defined by dicing streets 2 of a wafer 1 as shown in an enlarged plan view of a main part of FIG. . FIG. 10 (a)
9 is a cross-sectional view taken along the line III-IV in FIG. 9. In FIG. 9, C shown by a dashed line is a cutting line for performing dicing along the dicing street 2. Thereafter, bumps (not shown) are formed on connection pads (not shown) provided on the surface of the wafer 1. Next, as shown in FIG.
A resin sealing film 4 is applied to substantially the entire surface of the wafer 1. Finally, as shown in FIG. 10C, the wafer 1 is diced along dicing streets and divided into semiconductor chips 5 as individual semiconductor devices.

[0004]

However, when the above-described conventional semiconductor chip 5 is divided by dicing, it is necessary to continuously cut the resin sealing film 4 and the (silicon) wafer 1 with a dicing blade. However, there is a problem that the resin sealing film 4 may be peeled off from the wafer 1 due to the stress generated at this time. Further, when the resin sealing film 4 and the wafer 1 are cut at the same time, there is a problem that abrasion and damage of the dicing blade increase.

The problem to be solved by the present invention is to solve the problem that a semiconductor device capable of preventing peeling of a resin sealing film and suppressing abrasion of a dicing blade and a method of manufacturing the same can be obtained. It is in the point.

[0006]

According to the first aspect of the present invention,
In a semiconductor device, a bump is formed on a connection pad on a surface of a chip region surrounded by a planned dividing line of a semiconductor wafer on which an integrated circuit is formed, and a non-adjustment in the chip region
In the active region , a common portion with the bump , which rises at a position inside the division line and circulates along the division line, is provided.
Is formed on the metal layer, the jetty is formed to have the same height as at least the bump covering the integrated circuit on the inside region of the jetty, small of the jetty and the bump
At least a resin sealing film exposing the upper surface is formed, and the semiconductor wafer is cut and divided along a predetermined dividing line.

Therefore, according to the first aspect of the present invention, since the jetty rises in the chip area located inside the planned dividing line of the semiconductor wafer, the jetty rises in the area inside from the rise of the jetty.
The element formation region around the bump and on the surface of the semiconductor wafer can be covered with the resin sealing film. Outward from this area, the resin sealing film is not formed due to the rise of the jetty.
For this reason, the resin sealing film is not formed on the dividing line of the semiconductor wafer, and the dicing blade is worn and damaged by the resin sealing film when cutting and dividing at the dividing line by dicing. It has the effect of preventing. Even in the case of a structure in which the jetty is not formed on the planned dividing line, since the jetty is formed inside the planned dividing line of the chip area, there is no resin sealing film on the portion on the planned dividing line, and only the semiconductor wafer is provided. Can be cut. When only the semiconductor wafer is cut in this way, it becomes possible to perform chip division by scribing using, for example, a diamond needle, in addition to dicing.

According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the jetty is formed of the same material as the bump.

Therefore, according to the second aspect of the present invention, in addition to the operation of the first aspect of the present invention, it is possible to simultaneously form a jetty when forming a bump, thereby simplifying the manufacture of a semiconductor device. Also, the dikes formed of the same material as the bumps (bump metal) are less likely to wear and damage the dicing blade than the resin sealing film, even when formed on the dividing lines.

The invention according to claim 3 is the semiconductor device according to claim 1 or 2, wherein the planned dividing line is
It is a dicing street that performs cutting with a dicing blade.

Therefore, according to the third aspect of the invention, in addition to the functions of the first and second aspects of the invention, the efficiency of dicing can be improved. Therefore, the cost of the semiconductor device can be reduced.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising forming a resist covering at least a predetermined dividing line on a surface of a semiconductor wafer, and forming a resin sealing film in a region surrounded by the resist. The resist is peeled off, and the semiconductor wafer is cut and divided along the predetermined dividing line. According to a fifth aspect of the present invention, in the method for manufacturing a semiconductor device according to the fourth aspect, the resist is formed in a plane lattice shape along the predetermined dividing line.

Therefore, in the inventions according to the fourth and fifth aspects, the formation pattern of the resin sealing film can be defined by the resist which is accurately patterned by the photolithography technique, so that the resin sealing in the semiconductor device is required. Area can be accurately sealed. Further, since the semiconductor wafer is exposed due to the peeling of the resist, and the planned dividing line is set in the exposed portion, the alignment accuracy is increased and the cutting efficiency is improved.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fifth aspect, a protrusion is formed in a chip region of the semiconductor wafer defined by the predetermined division line before the resist is formed. It is characterized in that electrodes are formed.

Therefore, according to the invention of claim 6, in addition to the effect of the invention of claim 5, when the resin sealing film is formed in the area surrounded by the resist, the area around the bump and the element formation area of the semiconductor device are formed. The surface can be sealed, and a highly reliable semiconductor device can be manufactured.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the fourth aspect, the resist is surrounded by a grid-like portion formed along the predetermined dividing line and the grid-like portion. And a rectangular portion formed through a dam-forming groove for exposing the semiconductor wafer in a region to be exposed, and a bump opening for exposing a bump-forming region on the surface of the semiconductor wafer in the rectangular portion. Forming a portion, and filling the dam forming groove and the bump opening with a bump metal.

Therefore, according to the invention of claim 7, in addition to the effect of the invention of claim 4, in addition to the effect of the invention of claim 4, the bump metal filled in the groove for dam formation between the grid-like portion and the rectangular portion of the resist is formed. It becomes a dam portion, and this dam portion has a function of preventing the resin constituting the resin sealing film from flowing out to the scheduled dividing line side. Further, since the dam and the bump can be formed in the same process, it is not necessary to dedicate a special process to the formation of the dam portion, and the semiconductor device can be manufactured efficiently.

The invention according to claim 8 is a method for manufacturing a semiconductor device, comprising: forming an integrated circuit on an inactive region in a chip region on a surface of a semiconductor wafer along an expected dividing line of the semiconductor wafer; A resist having a sealing dam forming groove for exposing the planned dividing line portion and a bump opening for exposing a bump forming region is patterned, and a bump metal is formed in the dam forming groove and the bump opening. After filling and forming the sealing dam and the bumps at the same height at the same time, the resist is removed, and the sealing formed by the bump metal formed in the dam forming groove is performed. supplying resin sealing agent in the region surface surrounded by use dam
And at least the upper surface of the sealing dam and the bump
The exposed resin-sealed film is formed, it is characterized by cutting and dividing by performing dicing along the sealing dam portion and the semiconductor wafer for sealing to the dividing line.

Therefore, in the invention according to claim 8, the dam forming groove exposes the planned dividing line portion of the semiconductor wafer, and the dam portion formed of the bump metal filled in the groove is located on the dividing line. Formed. For this reason, dicing is a process of cutting the dam portion made of metal for bumps and the semiconductor wafer, but the metal for bumps is easier to cut than the resin sealing film, and the dicing blade wears out.
Damage can be suppressed. Therefore, the processing time and cost required for dicing can be reduced, and a low-cost semiconductor device can be manufactured.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of a semiconductor device and a method of manufacturing the same according to the present invention will be described below based on embodiments shown in the drawings.

(Embodiment 1) FIGS. 1 to 4 show Embodiment 1 of a method for manufacturing a semiconductor device according to the present invention. In the present embodiment, as shown in FIG. 1, a desired integrated circuit is formed in each chip area 13 divided by a dicing street 12 as a planned dividing line of a wafer 11 by using a known element forming technique. Bumps 14 are formed on connection pads (not shown) formed on the surface of each chip region 13. FIG. 2A is a cross-sectional view taken along the line I-II in FIG. 1. In FIG. 2, C shown by a dashed line is a cutting line for performing dicing along the dicing street 12.

Next, as shown in FIG.
The photoresist 15 is spin-coated on the surface of the wafer 11 including, for example, 4. Thereafter, exposure and development are performed by using a photolithography technique, and as shown in FIGS. 2C and 3, a lattice-shaped photoresist (resist pattern) 1 covering the dicing street 12.
5A is left on the wafer 11. The photoresist 15A is positioned so that the dicing street 12 passes through the center of the photoresist 15A in the width direction. The width of the photoresist 15A is set to be larger than the width of the dicing street 12, but is set so as not to cover the active region (the region where devices and the like are formed) in the chip region 13.

Thereafter, as shown in FIG. 4A, a lattice-shaped shielding portion 1 having the same pattern as the photoresist 15A is formed.
6A and an opening 16B surrounded by the shielding portion 16A, a hard mask 16 is prepared.
6 is placed such that the shielding portion 16A contacts the entire upper surface of the photoresist 15A. In this state, a resin sealant is applied from above the hard mask 16 using a squeegee (not shown). At this time, the resin sealant is applied to the wafer 11 through the opening 16B. As a result, FIG.
As shown in (b), the resin sealing film 17 is formed in a region (including the entire active region) on the wafer 11 which is not covered with the photoresist 15A. As shown in FIG. 4B, when the hard mask 16 is removed, the photoresist 15 is removed.
The upper surface of A is exposed.

Next, a step of removing the photoresist 15A is performed. As a result, as shown in FIG. 4C, the photoresist 15A is peeled off, the dicing street 12 is exposed, and the island-shaped resin sealing film 17 is arranged on the wafer 11 in a matrix. . In this stripping step, the photoresist 15A is stripped and removed using a resist stripping solution that strips only the photoresist 15A.
Note that a surface grinding step for exposing the bumps 14 is appropriately performed before and after such a photoresist 15A peeling step (in the present embodiment, the surface grinding step is performed after the peeling step).

Thereafter, a dicing process is performed along the dicing streets 12 set on the exposed wafer 11. That is, as is well known, the wafer 11 is set on a dicer (not shown) in a state of being attached to the wafer mount frame, and dicing is performed along the dicing street 12 and the planned cutting line C with a rotating dicing blade (not shown). As shown in FIG. 4D, a semiconductor chip 1 as an individual semiconductor device
Divide into eight.

In this embodiment, since the resin sealing film 17 is not provided on the dicing street 12 when dicing is performed, the resin sealing film 1 is not used in the dicing process.
It is possible to prevent a problem that the wafer 7 comes off the wafer 11. Also, since the dicing blade only needs to dice the wafer 11 alone, the dicing blade can be prevented from being worn or damaged by the resin sealing film 17. Further, in the present embodiment, since the wafer 11 is exposed in the portion where the dicing street 12 is set, the dicing street 12 of the dicing blade is exposed.
Can be improved with respect to the alignment accuracy.
In this embodiment, the resin sealing film 17 is applied to all the chip areas of the wafer 11 by a printing method using the hard mask 16, but a screening test as a single chip at the wafer stage is performed to select a good chip. Only the chip region (the region surrounded by the photoresist 15A) may be sealed with a resin by using a potting method using a dispenser. When the potting method is used as described above, useless resin sealing for defective chips can be omitted, so that the processing time can be reduced.

Embodiment 2 FIGS. 5 to 8 are process sectional views showing Embodiment 2 of a semiconductor device and a method of manufacturing the same according to the present invention. Hereinafter, a method of manufacturing a semiconductor device will be sequentially described, including the description of the configuration of the semiconductor device of the present embodiment, step by step.

FIG. 5A shows a chip area 23 divided by a dicing street 22 of a wafer 21. Further, C in the figure indicates a cutting line in the depth direction when dicing is performed along the dicing street 22. First, a desired integrated circuit (not shown) is formed in each chip area 23 of the wafer 21 by using a known element forming technique. Although not shown, the connection pads are processed so as to be exposed on the surface side of each chip region 23.

Next, as shown in FIG. 5B, a thin under bump metal layer 24 is formed on the entire surface of the wafer 21. The under-bump metal layer 24 has a laminated structure of a metal layer having high adhesion to the connection pad and a metal layer having high diffusion barrier, or a metal having high adhesion to the connection pad and high diffusion barrier. And a single-layer structure of an alloy, and formed by a sputtering method or a metal CVD method depending on the material.

Thereafter, as shown in FIG. 5C, a photoresist 25 having a film thickness longer than the height of a bump 26A to be described later is applied on the under bump metal layer 24 by spin coating. I do. Subsequently, patterning of the photoresist 25 is performed by performing exposure and development using a photolithography technique, so that the photoresist 25A having a pattern as shown in FIGS. 6A and 6B is left. The photoresist 25A is surrounded by a narrow grid portion 25a that covers the dicing street 22 and a narrow groove portion (a portion where no resist exists) 25b formed along the grid portion 25a. And a rectangular portion 25c. In addition, this groove portion 25b
It is formed in an inactive area at the periphery of the chip area 23 (an area where an integrated circuit is not substantially formed in the surface layer area). In the rectangular portion 25c, a pattern is formed by the number of bumps in which openings 25d having a rectangular flat surface are to be formed at the positions where the bumps are erected and formed. That is, although described later, exposure is performed using a stepper provided with a reticle corresponding to the pattern of the photoresist 25A, and development is performed thereafter.

Next, for example, copper (C
u) and the like, and the photoresist 25A
On the under bump metal layer 24 not covered with
That is, a bump metal is grown in the groove 25b and the opening 25d. As a result, as shown in FIG. 7A, a bump 26A is formed in the opening 25d, and a ridge-shaped sealing dam 26B circulating along the periphery of the chip region 23 is formed in the groove 25b. Is done. It goes without saying that this electroplating process is stopped when the height of the bump 26A reaches a predetermined design dimension.

Thereafter, the photoresist 25A is peeled off using a resist peeling liquid, so that the bump 26A and the sealing dam 26B project above the under bump metal layer 24 as shown in FIG. 7B.

Subsequently, as shown in FIG. 8A, the under-bump metal layer 24 in the exposed region is completely anisotropically etched under the condition that the selectivity with respect to the bump metal can be obtained. Remove. As the anisotropic etching, for example, dry etching such as reactive ion etching (RIE) or wet etching can be employed. As a result, a portion corresponding to the dicing street 22 of the wafer 21 is exposed.

Thereafter, as shown in FIG. 8B, the sealing dam 26 formed around the periphery of each chip region 23 is formed.
A resin sealing agent is supplied to the inner region surrounded by B using, for example, a dispenser, and the resin sealing agent is cured to form a resin sealing film 27. In this resin sealing step, the bumps 26 are formed.
When the upper end surface of A is covered with the resin sealing film 27, a surface grinding process is appropriately performed after the resin sealing step.
Even after such a resin sealing step, the wafer 21
The portion corresponding to the dicing street 22 is exposed as shown in FIG.

Finally, the wafer 21 is set on the dicer, and the dicing street 22 and the cut line C are cut.
Dicing is performed along the line, as shown in FIG.
It is divided into semiconductor chips 28 as individual semiconductor devices.

In the second embodiment, as in the first embodiment, the resin sealing film 27 is not formed on the dicing streets 22 when dicing is performed. 21
It is possible to prevent the occurrence of a problem that the sheet is peeled off. Further, since the dicing blade only needs to dice the wafer 21 alone, it is possible to prevent the dicing blade from being worn or damaged by the resin sealing film 27. Further, also in the present embodiment, the dicing street 22
Is exposed, the alignment accuracy of the dicing blade with respect to the dicing street 22 can be improved. Also in the second embodiment, a chip area (a sealing dam 26B) that is subjected to a sorting test as a single chip at the wafer stage and is sorted as a non-defective chip is performed.
(A region surrounded by a circle) may be resin-sealed. The sealing dam 26B is made of bump metal,
The underlying under-bump metal layer 24 is also made of a conductive metal.
Since it is an inactive region on the periphery of No. 3, it does not adversely affect the electrical characteristics.

In the second embodiment, the sealing dam 26B is set so as not to be formed on the dicing street 22. It may be configured to be integrally formed so as to cover 22. In this case, the portion of the wafer 21 where the dicing street 22 is set is not exposed and is covered with the bump metal.
Since the resin sealing film 27 does not exist, wear and damage of the dicing blade can be suppressed as compared with the conventional manufacturing method.

Although the first and second embodiments have been described above, the present invention is not limited to these, and various changes accompanying the gist of the configuration are possible. For example, in both embodiments described above, the present invention is applied to the case where the wafer is diced. However, the present invention can be applied to the case where the conventional scribing is performed. In particular, scribing cannot be performed when a resin sealing film is formed on the wafer surface, but there is an advantage that scribing can be newly performed by applying the present invention. In the second embodiment, the resin sealing film 27 is sealed in a wafer state. However, the resin sealing film 27 may be divided into chip states and then sealed. Furthermore, in both embodiments described above, the present invention is applied to the case where a bump is provided on the surface of a semiconductor chip. However, the present invention can be applied to the manufacture of a semiconductor chip having no bump. is there.

[0039]

As is apparent from the above description, according to the present invention, it is possible to obtain a semiconductor device which can prevent the resin sealing film from peeling off in the manufacturing process. Further, according to the present invention, it is possible to realize a semiconductor device and a method of manufacturing the same, which can suppress the wear of the dicing blade.

[Brief description of the drawings]

FIG. 1 is an essential part enlarged plan view showing Embodiment 1 of a method for manufacturing a semiconductor device according to the present invention.

FIGS. 2A to 2C are process cross-sectional views corresponding to the I-II cross section in FIG.

FIG. 3 is a process plan view of the first embodiment.

FIGS. 4A to 4D are process cross-sectional views of Embodiment 1. FIGS.

FIGS. 5A to 5C are process cross-sectional views showing Embodiment 2 of the method for manufacturing a semiconductor device according to the present invention.

6A is a process sectional view of the second embodiment, and FIG. 6B is a process plan view of the second embodiment.

FIGS. 7A and 7B are process cross-sectional views of Embodiment 2. FIGS.

FIGS. 8A to 8C are cross-sectional views illustrating a process according to the second embodiment.

FIG. 9 is an enlarged plan view of a main portion for explaining a conventional method for manufacturing a semiconductor device.

FIGS. 10A to 10C are process cross-sectional views corresponding to the cross section taken along line III-IV of FIG. 9;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Wafer 12 Dicing street 13 Chip region 14 Bump 15A Photoresist 17 Resin sealing film 18 Semiconductor chip 21 Wafer 22 Dicing street 23 Chip region 24 Underbump metal layer 25A Photoresist 25A Lattice portion 25b Groove portion 25c Rectangular portion 26A Bump 26B Sealing dam 27 Resin sealing film 28 Semiconductor chip

Claims (8)

(57) [Claims] 1. A bump is formed on a connection pad on a surface of a chip area surrounded by a planned division line of a semiconductor wafer on which an integrated circuit is formed, and an inactive area in the chip area is formed.
To pass the circulating along the rising and the dividing line at a position inside than the dividing line, the bumps and the common metal layer
Formed thereon, to have the same height at least the bump
That with jetty is formed, the inside area of the jetty
At least one of the jetty and the bump covers the integrated circuit.
A semiconductor sealing device, wherein a resin sealing film exposing the upper surface is also formed, and the semiconductor wafer is cut and divided along a predetermined dividing line. 2. The semiconductor device according to claim 1, wherein the jetty is formed of the same material as the bump. 3. The semiconductor device according to claim 1, wherein the predetermined dividing line is a dicing street that is cut by a dicing blade. 4. After forming a resist covering at least the dividing line on the surface of the semiconductor wafer, forming a resin sealing film in a region surrounded by the resist, peeling off the resist, and forming the resin along the dividing line. A method of manufacturing a semiconductor device, comprising cutting and dividing a semiconductor wafer. 5. The method of manufacturing a semiconductor device according to claim 4, wherein said resist is formed in a plane lattice shape along said predetermined dividing line. 6. The method of manufacturing a semiconductor device according to claim 5, wherein a protruding electrode is formed in a chip region of the semiconductor wafer defined by the predetermined division line before forming the resist. 7. The resist is formed through a lattice-shaped portion formed along the planned division line and a dam-forming groove exposing the semiconductor wafer in a region surrounded by the lattice-shaped portion. A rectangular opening portion for exposing a bump formation region on the surface of the semiconductor wafer, and a bump metallization is formed in the dam forming groove and the bump opening portion. 5. The method according to claim 4, further comprising: 8. A sealing dam forming groove for exposing the planned dividing line portion along a planned dividing line of the semiconductor wafer to an inactive region in a chip region on a surface of the semiconductor wafer on which the integrated circuit is formed; And patterning a resist having a bump opening for exposing a bump forming region, filling the dam forming groove and the bump opening with a bump metal, and simultaneously sealing the dam and the bump. After forming at the same height, the resist is peeled off, and a resin sealing agent is supplied to the surface of the region surrounded by the sealing dam portion formed of the bump metal formed in the dam forming groove.
And at least the upper surface of the sealing dam and the bump
The exposed resin-sealed film is formed, a method of manufacturing a semiconductor device, characterized in that the sealing dam portion and the semiconductor wafer for sealing to cut and divide by performing dicing along the dividing line.