JP3331745B2 - Method of forming solder bumps - Google Patents

Method of forming solder bumps

Info

Publication number
JP3331745B2
JP3331745B2 JP12651594A JP12651594A JP3331745B2 JP 3331745 B2 JP3331745 B2 JP 3331745B2 JP 12651594 A JP12651594 A JP 12651594A JP 12651594 A JP12651594 A JP 12651594A JP 3331745 B2 JP3331745 B2 JP 3331745B2
Authority
JP
Japan
Prior art keywords
metal mask
solder
bump
forming
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP12651594A
Other languages
Japanese (ja)
Other versions
JPH07335651A (en
Inventor
雅信 渡邊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP12651594A priority Critical patent/JP3331745B2/en
Publication of JPH07335651A publication Critical patent/JPH07335651A/en
Application granted granted Critical
Publication of JP3331745B2 publication Critical patent/JP3331745B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/11001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11005Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for aligning the bump connector, e.g. marks, spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/11848Thermal treatments, e.g. annealing, controlled cooling
    • H01L2224/11849Reflowing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、被バンプ形成体上に半
田バンプを形成するための半田バンプの形成方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming solder bumps for forming solder bumps on an object to be bumped.

【0002】[0002]

【従来の技術】近年、回路基板上に電子部品を高密度に
実装するため、半田バンプを用いた実装方法が多く用い
られる。すなわち、回路基板あるいは電子部品の電極パ
ッド上にあらかじめ形成した半田の突起である半田バン
プを形成後、半田バンプを介して電子部品を回路基板の
電極パッドに固定し、その後半田バンプを溶融して電子
部品を接続する方法や、銀ペースト等の導電性接着剤を
用いて電極パッドに形成した半田バンプを回路基板ある
いは電子部品の電極パッドに接続する方法である。回路
基板は、プリント基板、セラミック基板、シリコン基板
等のいずれでも良く、また、電子部品は能動部品、受動
部品、機構部品のいずれでも良い。
2. Description of the Related Art In recent years, in order to mount electronic components on a circuit board at high density, mounting methods using solder bumps are often used. That is, after forming solder bumps, which are solder protrusions formed in advance on the electrode pads of the circuit board or the electronic component, the electronic component is fixed to the electrode pads of the circuit board via the solder bumps, and then the solder bumps are melted. This is a method of connecting an electronic component or a method of connecting a solder bump formed on an electrode pad to a circuit board or an electrode pad of an electronic component using a conductive adhesive such as a silver paste. The circuit board may be any of a printed board, a ceramic board, a silicon board, and the like, and the electronic component may be any of an active component, a passive component, and a mechanical component.

【0003】図10を用いて、回路基板の電極パッド上
に半田バンプを形成する従来の方法を説明する。
A conventional method for forming a solder bump on an electrode pad of a circuit board will be described with reference to FIG.

【0004】図10(a)のように、回路基板1の表面
には電極パッド2が形成されている。半田バンプ3を形
成するための電極パッド2を設けた回路基板1の表面
に、フラックスを塗布する(図示せず)。次に、図10
(b)のように、電極パッド2の位置に合わせて貫通孔
4を設けたメタルマスク5を重ね合わせる。メタルマス
ク5は、溶融半田と反応しない、ステンレス、モリブデ
ン等の金属板が使用される。貫通孔4の内径は、電極パ
ッド2の外径よりやや大きく設計される。各貫通孔4に
は、形成する半田バンプ3の大きさに合わせて、所定寸
法の半田ボール6を一つ置く。この状態でリフロー炉に
流すと(図示せず)、各貫通孔4の中で半田ボールが溶
融し、電極パッド2に図10(c)のような半球状の半
田バンプ3が形成される。
As shown in FIG. 10A, an electrode pad 2 is formed on a surface of a circuit board 1. A flux is applied to the surface of the circuit board 1 provided with the electrode pads 2 for forming the solder bumps 3 (not shown). Next, FIG.
As shown in (b), a metal mask 5 provided with a through hole 4 is overlapped with the position of the electrode pad 2. As the metal mask 5, a metal plate made of stainless steel, molybdenum, or the like that does not react with the molten solder is used. The inner diameter of the through hole 4 is designed to be slightly larger than the outer diameter of the electrode pad 2. In each through hole 4, one solder ball 6 having a predetermined size is placed according to the size of the solder bump 3 to be formed. When flowing into a reflow furnace (not shown) in this state, the solder balls are melted in each through hole 4, and a hemispherical solder bump 3 as shown in FIG.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、半田ボ
ール6を溶融した後は、フラックスの残渣によってメタ
ルマスク5と回路基板1は強固に密着してしまい、剥離
が困難であった。
However, after the solder balls 6 are melted, the flux residue leaves the metal mask 5 and the circuit board 1 firmly in close contact with each other, making it difficult to separate them.

【0006】また、図11(a)のように、メタルマス
ク5の位置が長さL1だけずれて電極パッド2の一部と
重なった場合、図11(b)のように、電極パッド2の
一部しか半田バンプ3が形成できず、また半田バンプ3
の形状は変形して均一な高さの半球状の半田バンプを得
ることができなかった。このため、半田バンプ3と電子
部品の電極との接続状態にばらつきが生じ、信頼性に欠
ける場合があった。
When the position of the metal mask 5 is shifted by the length L1 and overlaps a part of the electrode pad 2 as shown in FIG. 11A, the position of the electrode pad 2 is reduced as shown in FIG. Only part of the solder bumps 3 can be formed.
Was deformed, and a hemispherical solder bump having a uniform height could not be obtained. For this reason, the connection state between the solder bumps 3 and the electrodes of the electronic component is varied, and the reliability may be lacking in some cases.

【0007】そこで本発明は、半田ボール6の溶融後で
もメタルマスク5が剥がしやすく、またメタルマスク5
の位置が多少ずれても、電極パッド2に均一な半田バン
プ3を形成することができる半田バンプの形成方法を提
供することを目的とする。
Accordingly, the present invention provides a metal mask 5 which can be easily peeled off even after the solder ball 6 is melted.
It is an object of the present invention to provide a method for forming a solder bump which can form a uniform solder bump 3 on the electrode pad 2 even if the position of the solder bump is slightly shifted.

【0008】[0008]

【課題を解決するための手段】本発明は、上記目的を達
成するために、次のように構成される。すなわち、本発
明の半田バンプの形成方法は、第一に、半田バンプを形
成する被バンプ形成体の表面にフラックスを塗布する工
程と、メタルマスクを前記被バンプ形成体に重ね合わせ
てメタルマスクに形成した貫通孔を電極パッド上に設け
る工程と、貫通孔に半田ボールを置く工程と、リフロー
炉で半田ボールを溶融する工程とからなる半田バンプの
形成方法において、少なくとも電極パッドとメタルマス
クの間に間隙を設けるものであり、第二に、メタルマス
クを置く部分と、被バンプ形成体を置く部分とから一体
に形成される治具を用い、前記被バンプ形成体と前記メ
タルマスクの間に間隙を設けるものであり、第三に、被
バンプ形成体を回路基板として構成すると共に、回路基
板と重ね合わせるメタルマスク面に支持部を設け、前記
回路基板と前記メタルマスクの間に間隙を設けるもので
あり、第四に、被バンプ形成体を回路基板として構成す
ると共に、回路基板と重ね合わせるメタルマスク面に、
電極パッドの外径よりやや大きい内径を有する穴と、該
穴の内径よりも小さい内径を有する貫通孔とを同心円状
に一体に設け、前記電極パッドと前記メタルマスクの間
に間隙を設けるものである。
The present invention is configured as follows to achieve the above object. That is, the method of forming a solder bump according to the present invention includes, first, a step of applying a flux to the surface of a bump-formed body on which a solder bump is to be formed, and overlaying a metal mask on the bump-formed body to form a metal mask. A method for forming a solder bump, comprising the steps of: providing a formed through hole on an electrode pad; placing a solder ball in the through hole; and melting the solder ball in a reflow furnace. Secondly, using a jig integrally formed from a portion where a metal mask is to be placed and a portion where a bump target is to be placed, between the bump target and the metal mask. Thirdly, a gap is provided. Thirdly, the object to be bumped is configured as a circuit board, and a supporting portion is provided on a metal mask surface to be overlapped with the circuit board. It is intended to provide a gap between the substrate and the metal mask, the fourth, as well as constituting an object to be bump-formed body as a circuit board, the metal mask surface overlaying a circuit board,
A hole having an inner diameter slightly larger than the outer diameter of the electrode pad, and a through hole having an inner diameter smaller than the inner diameter of the hole are integrally provided concentrically, and a gap is provided between the electrode pad and the metal mask. is there.

【0009】[0009]

【作用】被バンプ形成体とメタルマスクとの間に間隙を
設けたので、半田ボールの溶融後であっても、フラック
スの残渣によってメタルマスクと被バンプ形成体は密着
しない。また、メタルマスクの位置が多少ずれても、溶
融半田がメタルマスクに規制されず、電極パッド上に均
一に広がり、均一な高さの半田バンプが形成できる。
Since the gap is provided between the bump-formed body and the metal mask, the metal mask and the bump-formed body do not adhere to each other due to the flux residue even after the solder balls are melted. Further, even if the position of the metal mask is slightly shifted, the molten solder is not restricted by the metal mask, but spreads evenly on the electrode pad, and a solder bump having a uniform height can be formed.

【0010】治具を使用する場合は、被バンプ形成体と
メタルマスクの位置ずれを防ぐことができる。
[0010] When a jig is used, it is possible to prevent a displacement between the bump-formed body and the metal mask.

【0011】支持部を設けたメタルマスク、あるいは穴
および貫通孔を同心円状に一体に設けたメタルマスクを
使用する場合は、簡便に回路基板とメタルマスクあるい
は電極パッドとの間に間隙を形成できる。
When a metal mask provided with a support portion or a metal mask provided with holes and through holes concentrically and integrally is used, a gap can be easily formed between the circuit board and the metal mask or the electrode pad. .

【0012】[0012]

【実施例】【Example】

(実施例1)図1乃至図3を用いて、本発明に係る被バ
ンプ形成体に半田バンプを形成する方法の実施例を示
す。なお、図10と同じ構成部分は同じ番号を用いて説
明を省略する。
(Embodiment 1) An embodiment of a method for forming a solder bump on a bump-formed body according to the present invention will be described with reference to FIGS. Note that the same components as those in FIG. 10 are denoted by the same reference numerals and description thereof is omitted.

【0013】図1に示す治具7は、本発明の半田バンプ
の形成方法に用いられる。半田バンプ3を形成する際に
使用する治具7は、メタルマスク5を置く部分7Aと、
被バンプ形成体、例えば回路基板を置く部分7Bとから
一体に形成される。メタルマスク設置部分7Aは、メタ
ルマスク5の形状よりやや広く、中央部に回路基板を落
とし込むための四角形の開口部8を有する四角板9と、
四角板9の周縁部に連続して設けられた第一の立設部1
0とから形成される。回路基板設置部分7Bは、四角板
9の開口部8の周縁部に第一の立設部10と反対向きに
立設して設けられた第二の立設部11と、第二の立設部
11の先端面と接続する底面12とから一体に形成され
る。治具7は、溶融半田と反応しないアルミニウム等に
より形成する。
The jig 7 shown in FIG. 1 is used in the method of forming a solder bump according to the present invention. A jig 7 used when forming the solder bumps 3 includes a portion 7A on which the metal mask 5 is placed,
It is integrally formed with a bump forming body, for example, a portion 7B on which a circuit board is placed. The metal mask installation portion 7A is slightly wider than the shape of the metal mask 5, and has a square plate 9 having a square opening 8 for dropping a circuit board in the center,
First standing portion 1 provided continuously on the peripheral portion of square plate 9
0. The circuit board installation portion 7B includes a second upright portion 11 provided on the periphery of the opening 8 of the square plate 9 in a direction opposite to the first upright portion 10, and a second upright portion. It is formed integrally with the bottom face 12 connected to the tip end face of the part 11. The jig 7 is formed of aluminum or the like that does not react with the molten solder.

【0014】次に、治具7を用いて半田バンプ1を形成
する方法を説明する。
Next, a method of forming the solder bump 1 using the jig 7 will be described.

【0015】図2(a)のように、電極パッド2を上側
にした回路基板1を、治具7の底面12に落とし込む。
電極パッド2にはフラックスが塗布されている。
As shown in FIG. 2A, the circuit board 1 with the electrode pads 2 facing upward is dropped on the bottom surface 12 of the jig 7.
A flux is applied to the electrode pads 2.

【0016】次に、治具7のメタルマスク設置部分7A
の四角板9に貫通孔4を有するメタルマスク5を載せ
る。この場合、貫通孔4は、電極パッド2の位置に合わ
せて形成されている。第二の立設部11の高さH1は、
メタルマスク5と回路基板1の上面との間に間隙Gを形
成するように決められている。
Next, the metal mask installation portion 7A of the jig 7
The metal mask 5 having the through holes 4 is placed on the square plate 9 of FIG. In this case, the through holes 4 are formed in accordance with the positions of the electrode pads 2. The height H1 of the second standing portion 11 is
It is determined that a gap G is formed between the metal mask 5 and the upper surface of the circuit board 1.

【0017】次に、図2(b)のように、各貫通孔4に
半田ボール6を一つ置き、この状態でリフロー炉に流
す。この工程で半田ボール6は溶融し、図2(c)のよ
うに、電極パッド2の上に半球状の半田バンプ3が形成
される。ここで半球状とは、半田バンプの3の断面形状
が球に近いものから、扁平に近いものまで幅広い形状を
いう。
Next, as shown in FIG. 2B, one solder ball 6 is placed in each through-hole 4, and in this state, the solder ball 6 flows into a reflow furnace. In this step, the solder balls 6 are melted, and hemispherical solder bumps 3 are formed on the electrode pads 2 as shown in FIG. Here, the term “hemispherical” refers to a wide range of shapes of the solder bump 3 from a shape close to a sphere to a shape close to flat.

【0018】メタルマスク5と電極パッド2の間に間隙
Gを設けているため、図3(a)のように、メタルマス
ク5の位置が長さL2だけずれて、電極パッド2と一部
重なったとしても、溶融した半田はメタルマスク5によ
って遮られないため、図3(b)のように、電極パッド
2の上全体に広がり、均一な高さの半球状の半田バンプ
3が形成される。
Since the gap G is provided between the metal mask 5 and the electrode pad 2, the position of the metal mask 5 is shifted by the length L2 and partially overlaps the electrode pad 2 as shown in FIG. Even if the molten solder is not blocked by the metal mask 5, it spreads over the entire electrode pad 2 and the hemispherical solder bump 3 having a uniform height is formed as shown in FIG. .

【0019】間隙Gは、形成する半田バンプ3の大きさ
によって決まり、半田ボール6が貫通孔4から転がり出
てしまうのを防ぐため、少なくとも半田ボール6の直径
よりは狭く設けられる。
The gap G is determined by the size of the solder bump 3 to be formed, and is provided at least smaller than the diameter of the solder ball 6 in order to prevent the solder ball 6 from rolling out of the through hole 4.

【0020】(実施例2)図4および図5は、被バンプ
形成体として電子部品を用いた実施例を示す。
(Embodiment 2) FIGS. 4 and 5 show an embodiment in which an electronic component is used as a body to be bumped.

【0021】図4のように、電子部品に半田バンプを形
成する際は、図1に示す治具7と、電子部品を配置する
区画13を設けるための仕切り板14を使用する。図1
に示す治具7の構成部分は同じ番号を用いて説明を省略
する。
As shown in FIG. 4, when forming solder bumps on an electronic component, a jig 7 shown in FIG. 1 and a partition plate 14 for providing a section 13 for disposing the electronic component are used. FIG.
The components of the jig 7 shown in FIG.

【0022】仕切り板14は、治具7の回路基板設置部
分7Bの内寸法に合わせて縦横に板を井桁状に組み合わ
せて形成され、治具7の底面12に落とし込まれて使用
される。仕切り板14の厚みH2は、メタルマスク5を
四角板9に載せたときに当たらないように、四角板9の
上面より低くなるように決める。
The partition plate 14 is formed by combining plates vertically and horizontally in a cross-girder shape in accordance with the inner dimensions of the circuit board installation portion 7B of the jig 7, and is used by being dropped on the bottom surface 12 of the jig 7. The thickness H2 of the partition plate 14 is determined so as to be lower than the upper surface of the square plate 9 so that the metal mask 5 is not hit when the metal mask 5 is placed on the square plate 9.

【0023】次に、電子部品に半田バンプ1を形成する
方法を説明する。
Next, a method of forming the solder bump 1 on the electronic component will be described.

【0024】図5(a)のように、電極パッド15を上
側にした電子部品16を、各区画13に配置する。電極
パッド15にはフラックスが塗布されている。
As shown in FIG. 5A, the electronic component 16 with the electrode pad 15 facing upward is arranged in each section 13. A flux is applied to the electrode pads 15.

【0025】次に、四角板9に貫通孔4を有するメタル
マスク5を載せる。この場合、貫通孔4は、電極パッド
15の位置に合わせて形成されている。第二の立設部1
1の高さH1は、メタルマスク5と電子部品16の上面
との間に間隙Gを形成するように決められている。
Next, the metal mask 5 having the through holes 4 is placed on the square plate 9. In this case, the through holes 4 are formed in accordance with the positions of the electrode pads 15. Second standing part 1
The height H1 of 1 is determined so as to form a gap G between the metal mask 5 and the upper surface of the electronic component 16.

【0026】次に、図5(b)のように、各貫通孔4に
半田ボール6を一つ置き、この状態でリフロー炉に流
す。この工程で半田ボール6は溶融し、図5(c)のよ
うに、電極パッド15の上に半球状の半田バンプ3が形
成される。
Next, as shown in FIG. 5 (b), one solder ball 6 is placed in each through hole 4, and in this state, it flows into a reflow furnace. In this step, the solder balls 6 are melted, and the hemispherical solder bumps 3 are formed on the electrode pads 15 as shown in FIG.

【0027】メタルマスク5と電極パッド15の間に間
隙Gを設けているため、図3と同様に、メタルマスク5
の位置がずれて、電極パッド15と一部重なったとして
も、溶融した半田はメタルマスク5によって遮られない
ため、電極パッド15の上全体に広がり、均一な高さの
半球状の半田バンプ3が形成される。
Since the gap G is provided between the metal mask 5 and the electrode pad 15, as in FIG.
Even if the position is shifted and partially overlaps with the electrode pad 15, the molten solder is not blocked by the metal mask 5, so it spreads over the entire electrode pad 15 and has a uniform spherical hemispherical solder bump 3. Is formed.

【0028】間隙Gは、形成する半田バンプ3の大きさ
によって決まり、半田ボール6が貫通孔4から転がり出
てしまうのを防ぐため、少なくとも半田ボール6の直径
よりは狭く設けられる。
The gap G is determined by the size of the solder bump 3 to be formed, and is provided at least smaller than the diameter of the solder ball 6 in order to prevent the solder ball 6 from rolling out of the through hole 4.

【0029】[0029]

【0030】[0030]

【0031】[0031]

【0032】[0032]

【0033】[0033]

【0034】[0034]

【0035】[0035]

【発明の効果】半田ボールを溶融する際のフラックスの
残渣によって、メタルマスクと被バンプ形成体は密着し
ないので、両者を剥がす工数がなくなる。このため、半
田バンプを形成する時間が短縮でき、コスト削減ができ
る。
The metal mask and the object to be bumped do not come into close contact with each other due to the residual flux when the solder ball is melted. Therefore, the time for forming the solder bumps can be reduced, and the cost can be reduced.

【0036】 電極パッド上に均一な高さの半球状の半田
バンプを形成することができるので、電子部品と半田バ
ンプの接続状態が一定し、信頼性が向上する。
Since a hemispherical solder bump having a uniform height can be formed on the electrode pad, the connection state between the electronic component and the solder bump is constant, and the reliability is improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る被バンプ形成体の回路基板に半田
バンプを形成する方法に使用する治具の斜視図である。
FIG. 1 is a perspective view of a jig used in a method of forming a solder bump on a circuit board of a bump-formed body according to the present invention.

【図2】本発明に係る被バンプ形成体の回路基板に半田
バンプを形成する方法の概略図である。
FIG. 2 is a schematic view of a method for forming a solder bump on a circuit board of a bump-formed body according to the present invention.

【図3】本発明に係る被バンプ形成体の回路基板に半田
バンプを形成する方法において、図3(a)はメタルマ
スクの位置ずれを示す図で、図3(b)は半田バンプの
形成状態を示す図である。
FIGS. 3A and 3B are diagrams showing a displacement of a metal mask in a method of forming a solder bump on a circuit board of a bump-formed body according to the present invention, and FIG. It is a figure showing a state.

【図4】本発明に係る被バンプ形成体の電子部品に半田
バンプを形成する方法に使用する治具の斜視図である。
FIG. 4 is a perspective view of a jig used in a method for forming a solder bump on an electronic component of a bump-formed body according to the present invention.

【図5】本発明に係る被バンプ形成体の電子部品に半田
バンプを形成する方法の概略図である。
FIG. 5 is a schematic view of a method for forming a solder bump on an electronic component of a bump-formed body according to the present invention.

【図6】従来の回路基板に半田バンプを形成する方法の
概略図である。
FIG. 6 is a schematic view of a conventional method for forming solder bumps on a circuit board.

【図7】従来の回路基板に半田バンプを形成する方法に
おいて、図7(a)はメタルマスクの位置ずれを示す図
で、図7(b)は半田バンプの形成状態を示す図であ
る。
FIGS. 7A and 7B are views showing a positional shift of a metal mask and FIGS. 7B and 7B are views showing a state of forming a solder bump in a conventional method of forming a solder bump on a circuit board.

【符号の説明】[Explanation of symbols]

1 回路基板 2 電極パッド 3 半田バンプ 4 貫通孔 5 メタルマスク 6 半田ボール 7 治具 13 区画 14 仕切り板 15 電極パッド 16 電子部品 DESCRIPTION OF SYMBOLS 1 Circuit board 2 Electrode pad 3 Solder bump 4 Through hole 5 Metal mask 6 Solder ball 7 Jig 13 Section 14 Partition board 15 Electrode pad 16 Electronic component

フロントページの続き (56)参考文献 特開 昭64−22049(JP,A) 特開 昭63−104397(JP,A) 特開 昭50−126550(JP,A) 特開 昭50−56348(JP,A) 特開 平2−238693(JP,A) 特開 平7−122841(JP,A) 特開 平7−212021(JP,A) 実開 平4−4742(JP,U) (58)調査した分野(Int.Cl.7,DB名) H01L 21/60 H05K 3/34 Continuation of the front page (56) References JP-A-64-2249 (JP, A) JP-A-63-104397 (JP, A) JP-A-50-126550 (JP, A) JP-A-50-56348 (JP, A) JP-A-2-23893 (JP, A) JP-A-7-122841 (JP, A) JP-A-7-212021 (JP, A) JP-A-4-4742 (JP, U) (58) Field surveyed (Int. Cl. 7 , DB name) H01L 21/60 H05K 3/34

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半田バンプを形成する被バンプ形成体
の表面にフラックスを塗布する工程と、メタルマスクを
前記被バンプ形成体に重ね合わせてメタルマスクに形成
した貫通孔を電極パッド上に設ける工程と、貫通孔に半
田ボールを置く工程と、リフロー炉で半田ボールを溶融
する工程とからなる半田バンプの形成方法において、
タルマスクを置く部分と、被バンプ形成体を置く部分と
から一体に形成される治具を用い、前記被バンプ形成体
と前記メタルマスクの間に間隙を設けることを特徴とす
る半田バンプの形成方法。
1. A step of applying a flux to a surface of a bump-formed body on which a solder bump is formed, and a step of overlaying a metal mask on the bump-formed body and providing a through hole formed in the metal mask on an electrode pad. When a step of placing solder balls in the through hole, the method of forming solder bumps comprising the step of melting the solder balls in a reflow furnace, main
The part where the metal mask is placed and the part where the body to be bumped is placed
Using a jig integrally formed from
And forming a gap between the metal mask and the metal mask.
JP12651594A 1994-06-08 1994-06-08 Method of forming solder bumps Expired - Fee Related JP3331745B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12651594A JP3331745B2 (en) 1994-06-08 1994-06-08 Method of forming solder bumps

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12651594A JP3331745B2 (en) 1994-06-08 1994-06-08 Method of forming solder bumps

Publications (2)

Publication Number Publication Date
JPH07335651A JPH07335651A (en) 1995-12-22
JP3331745B2 true JP3331745B2 (en) 2002-10-07

Family

ID=14937124

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12651594A Expired - Fee Related JP3331745B2 (en) 1994-06-08 1994-06-08 Method of forming solder bumps

Country Status (1)

Country Link
JP (1) JP3331745B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4947408B2 (en) * 2006-06-01 2012-06-06 澁谷工業株式会社 Array mask support device
TW201818521A (en) * 2016-11-04 2018-05-16 唐虞企業股份有限公司 Circuit pin positioning structure and welding circuit module manufacturing method thereof

Also Published As

Publication number Publication date
JPH07335651A (en) 1995-12-22

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