JP3329498B2 - Building block electronic equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a building block type electronic device used for a sequencer or the like, and more particularly to an improvement in address setting for absorbing a difference between the number of slots and software.

[0002]

2. Description of the Related Art As disclosed in, for example, Japanese Patent Application Laid-Open No. 2-87596, a building block type electronic device has a power supply module, a CPU module, an input / output module and the like attached to appropriate slots provided on a bus. It is suitable for use in constructing a system according to the scale of a control target such as a sequencer. In such a device, it is necessary to set the address of each module. For example, as disclosed in Japanese Patent Application Laid-Open No. 1-228048, there is a technique for obtaining a unique address corresponding to each module. Has been adopted.

FIG. 4 is a block diagram showing the configuration of a conventional apparatus.
In each module, a large number of printed circuit boards may be accommodated in a single module for the sake of system configuration, and a single slot width is insufficient in lateral width, so a double slot width housing is used. In the figure, (A) is a standard system, (B) is a power supply module having a double slot width,
(C) shows the case where the power supply module and the CPU module have a double slot width, and (D) shows the case where the CPU module has a double slot width. Here, the power supply module and the CP
Since one set of U module is always mounted on each motherboard,
Called the basic module. With such a building block configuration, the power supply module and the C
The basic module of the PU module is mounted, and I / O modules are sequentially mounted from slot 1 toward the right end.

FIG. 5 shows an address generation circuit provided in each slot. Here, the slots 0 to 7 can be displayed by a 3-pin binary display. The module mounted in this slot recognizes "1" and "0" by applying a potential to this pin and whether or not it is grounded, and recognizes its own physical slot address.

[0005]

However, since a slot number is usually given on the premise of a standard system,
When a double slot width module is mounted, a phenomenon occurs in which the slot number does not match the mounting order of the I / O modules. In this case, if the CPU module is a standard system, the slot number and the physical I / O module mounting order match, so it is sufficient to pick up the CPU module at the start, but there is one double slot width module. However, there is a problem that the I / O module which does not start the slot number 2 from the first does not start from the first slot number. For this reason, in the software mounted on the CPU module, it is necessary to change the start start position according to the type of the basic module, and there is a problem that the engineering work becomes complicated. The present invention has solved such a problem, and provides a building block type electronic device which starts from a first I / O module without changing software even if a basic module includes a double slot width module. With the goal.

[0006]

SUMMARY OF THE INVENTION In order to achieve the above object, according to the present invention, a power supply module is mounted on one end of a mother plate (10), and then a CPU module (20) is mounted. An I / O module (30) is mounted from the slot adjacent to the CPU module toward the other end, and the I / O module mounted in the CPU module adjacent slot is sequentially started from the I / O module toward the other end. CP by accessing the / O module
A building block type electronic device having a motherboard structure in which processing is performed by a U module has the following configuration.

That is, means (16) for generating an address of the slot provided for each slot on the mother board;
A CPU address bus (15) for transmitting a slot address in which the CPU module is mounted is provided.
The CPU module further includes an address output circuit (24) for reading an address of a slot connected to the CPU module and outputting the address to a CPU address bus. On the I / O module side, the address of the slot connected to the own device is read, and the CPU input from the CPU address bus is read.
A logical address operation circuit (34) for determining the logical address of the own device from the module mounting address is provided. The CPU module determines the I / O module to be started first using the logical address.

[0008]

When the CPU module accesses a signal handled by the I / O module, it performs the operation in a certain order by starting first. Since the position of the slot in which the CPU module is mounted is determined depending on the power supply module and the width of the module itself, the physical slot address of the I / O module to be started first is not uniform. Therefore,
The address output circuit outputs the slot address of the CPU module to the CPU address bus, and the logical address operation circuit determines the logical address of the I / O module. In the CPU module, I / O is performed by a logical address.
Since the module is accessed, the I / O module of the logical address to be started first responds as determined by the logical address arithmetic circuit of its own device.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG.
1 is a configuration diagram of a mother plate 10 showing an embodiment of the present invention. In the figure, a base plate 10 is a sheet metal in which a plurality of slots 12 are arranged at regular intervals, and buses 13 to 15 for connecting terminals of each slot 12 are provided. The power supply line 13 supplies power for operation to the module attached to each slot 12. Here, power is supplied from the power supply module 40. The system bus 14 plays a major role when the CPU module 20 accesses the I / O module 30, and is divided into an address bus, a data bus, and a control line. CPU address bus 15 is CP
CPU from U module 20 to I / O module
The physical address of the slot in which module 20 is installed is transmitted. The slot address 16 physically gives the address of the corresponding slot 12, and has a terminal configuration as shown in FIG.

FIG. 2 is a block diagram showing the main components of the CPU module. In the figure, an internal operation circuit 22 is a circuit on which a microprocessor or the like is mounted. The machine to be controlled is controlled according to the programmed location. The address output circuit 24 is connected to the CPU module 2
The slot address 16 of the mounted slot 12 is read and sent to the internal arithmetic circuit 22 and output to the CPU address bus 15. The CPU module 2
If 0 is a double slot width, the I / O module 3
0 is the slot address of the mounting side. Connector 2
Reference numeral 6 denotes a portion physically connected to the mother plate 10.

FIG. 3 is a block diagram showing the main components of the I / O module. In the figure, an I / O internal circuit 32 is provided for each terminal to which an external signal line (not shown) is connected, depending on whether it is a signal input or a signal output. Determines the circuit configuration. When a signal for data transfer is sent from the CPU module 20 via the system bus 14, it recognizes that it is a request for its own device using the logical address. The logical address operation circuit 34 reads the mounting slot address 16 of the CPU module 20 sent from the CPU address bus 15, reads the slot address 16 of the mounting slot 12 of its own device, adds the two, and performs logical addition. The address is calculated and the I / O internal circuit 3
Sent to 2. The connector 36 is a portion that is physically connected to the mother board 10.

The operation of the apparatus having the above-mentioned configuration will be described below. As shown in FIG. 4, the power supply module is mounted on the left end of the mother board 10, and then the CP is mounted.
The U module 20 is mounted, and several I / O modules are mounted on the right end side adjacent thereto. CPU
The module 20 sets its own mounting slot address 16 to C
Since the I / O module 30 outputs the signal to the PU address bus 15, the I / O module 30 calculates the logical address of the own device and stores it in the I / O internal circuit 32. Next, the CPU module 20 accesses the I / O module 30, which is the first start, using the logical address. In this way, regardless of whether the basic module has a single slot width or a double slot width, the first I / O module 30 can be reliably accessed.

Although the above embodiment deals with the case of the mounting order shown in FIG. 4, the CPU module 20 is mounted on the left end of the motherboard 10, the power supply module 20 is mounted next, and the power supply module 20 is mounted next to the power supply module 20. In some cases, several I / O modules are mounted on the right end side. In such a case, the CPU module 20 recognizes the slot address where the power supply module is mounted, and outputs it to the CPU address bus 15. For this recognition, communication using the system bus 14 may be performed between the power supply module and the CPU module, or a slot address of the power supply module may be set from outside. I / O module 3
The 0 side receives the power supply module mounting address from the CPU address bus and generates its own logical address.

Further, instead of the CPU module, a circuit may be provided on the power supply module side for recognizing the slot address in which its own device is mounted and outputting it to the CPU address bus 15.

[0015]

As described above, according to the present invention, it is possible to determine the I / O module to be the first starting irrespective of the width of the basic module, and to use the logical address for programming in the CPU module. I /
There is an effect that it is not necessary to consider the physical slot address where the O module is mounted.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a mother plate 10 showing one embodiment of the present invention.

FIG. 2 is a block diagram of a main part configuration of a CPU module.

FIG. 3 is a block diagram of a main part configuration of an I / O module.

FIG. 4 is a configuration block diagram of a conventional device.

FIG. 5 shows an address generation circuit provided in each slot.

[Description of Signs] 10 mother board 14 system bus 15 CPU address bus 16 slot address 20 CPU module 24 address output circuit 30 I / O module 34 logical address operation circuit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-2-116903 (JP, A) JP-A-2-139611 (JP, A) JP-A-4-268659 (JP, A) JP-A-4- 76653 (JP, A) JP-A-62-126454 (JP, A) JP-A-60-204052 (JP, A) JP-A-58-174733 (JP, U) International publication 90/14621 (WO, A1) ( 58) Field surveyed (Int. Cl. ⁷ , DB name) G06F 13/14 G05B 19/05

Claims (2)

(57) [Claims] 1. A power supply module is mounted on one end of a mother plate (10), followed by a CPU module (20), and an I / O module is inserted from a slot adjacent to the CPU module toward the other end. (30) is mounted, and the I / O module mounted in the slot adjacent to the CPU module is accessed as the first start and sequentially accesses the I / O module toward the other end.
In a building block type electronic device having a motherboard structure in which processing is performed by a U module, the motherboard is provided with a means (16) provided for each slot and for generating an address of the slot, and a CPU module mounted thereon. CPU that transmits the slot address
An address bus (15) is provided. The CPU module is provided with an address output circuit (24) for reading an address of a slot connected to the own device and outputting the address to a CPU address bus. A logical address operation circuit (34) for reading the address of the connected slot of the CPU module and determining its own logical address from the CPU module mounting address inputted from the CPU address bus, and the CPU module uses the logical address to A building block type electronic device, wherein an I / O module to be started first is determined. 2. A CPU module (20) is mounted on one end of a mother plate (10), followed by a power supply module (40).
Are mounted, an I / O module (30) is mounted from a slot adjacent to the power supply module toward the other end, and the I / O module mounted in the slot adjacent to the power supply module is sequentially started from the start. In a building block type electronic device having a motherboard structure in which processing is executed by a CPU module by accessing an I / O module toward the other end, the motherboard includes a slot provided for each slot. A means (16) for generating an address and a CPU address bus (15) for transmitting a slot address in which the power supply module is mounted are provided, and the CPU module or the power supply module recognizes an address of a slot connected to the power supply module. And C
Address output circuit for outputting to PU address bus (24)
On the I / O module side, a logical address operation circuit (34) for reading the address of the slot connected to the own device and determining the logical address of the own device from the power supply module mounting address input from the CPU address bus is provided. The building block type electronic device, wherein the CPU module determines an I / O module to be started first using a logical address.