JP3326933B2 - Sensor signal processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sensor signal processing device which detects magnetism as an electric signal and binarizes it.

[0002]

2. Description of the Related Art Conventionally, as an apparatus for detecting the rotation of a rotating body by using an MRE (ferromagnetic thin film resistor), Japanese Patent Laid-Open No. 4-69 is disclosed.
No. 986 discloses this. This is because when the gear-shaped rotating body rotates, the direction of the magnetic flux passing through the MRE changes, so that the output of the MRE changes, and the rotation of the rotating body is detected by binarizing the output and performing signal processing. Things.

[0003] In the above-mentioned publication, when a waveform output by the MRE is digitally output, that is, when the waveform is binarized, a method of determining which part of the waveform is to be used as a threshold value to determine a rectangular shape is used. The thresholds (upper limit S1 and lower limit S2) of the binary pulsing comparator, which is a means for converting values, are set in advance so that the output of the MRE crosses the threshold, that is, the output of the MRE is The MRE output is always corrected so that the binarization can be detected even if it fluctuates.

In this method of correcting the output, an upper limit setting comparator and a lower limit setting comparator are provided, and when the output of the MRE exceeds the upper limit value or the lower limit value, an up-converter is used by using an oscillator.
The count value of the / down counter is counted down or counted up to change the counter value,
By using the counter value as an offset input, the MRE
The offset adjustment is performed so that the output of the above becomes a value between the upper limit value and the lower limit value.

[0005]

SUMMARY OF THE INVENTION However, MRE
Since the output of the MRE includes an offset voltage or changes in the output due to aging, the output must always be corrected so that the output of the MRE falls within the set value as described above. That is, the output correction circuit must always operate. Therefore, the oscillator of the output correction circuit always operates, and oscillation spike noise always occurs. When the spike noise and the switching operation of the binary pulse comparator for binarizing the output of the MRE occur at the same time, the timing of the switching is slightly shifted. This appears as an error in the angle accuracy. The angle accuracy refers to how reproducible the level of the output waveform of the MRE sensor at which the binarized output is switched from 1 to 0 or from 0 to 1. Therefore, when spike noise occurs, 2
When the value pulsing comparator performs a comparison operation, a slight edge shift occurs, which results in an error in angle accuracy. For example, a crank angle sensor or a cam angle sensor used for controlling an engine of a vehicle or the like requires high accuracy of absolute angle accuracy of ± 0.1 ° and repetition (repeatability) of 0.02 °. There is a demand to cut off noise such as noise as much as possible.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a sensor signal processing circuit capable of stopping an oscillation operation during a normal operation after output correction.

[0007]

That is, a sensor signal processing device according to the present invention adds an offset signal to an output signal of a magnetic detection sensor that senses magnetism, converts it into an electric signal, and outputs the signal, and amplifies the electric signal. Amplifying means, signal determining means for outputting an offset adjustment start signal only when an output signal of the signal amplifying means exceeds a desired upper limit or lower limit, and a periodic signal for outputting a periodic signal by the offset adjustment start signal generating means, and counting means for changing the count value by the periodic signal, and an output correction means comprising an offset signal outputting means for outputting an offset signal corresponding to the count value, the output correcting means or <br/> et al Peak-bottom hold means for holding the peak value and bottom value of the output signal of And threshold setting means for setting a threshold value from the peak value and the bottom value that, if the output correction unit
And al of the output signal is compared with the set threshold by the threshold value setting means is characterized by comprising comparison means for outputting a binary signal by the magnitude relation.

[0008]

Operation and effect of the present invention The sensor signal processing of the present invention described above.
According to the configuration of the device , the output signal of the signal
Generates a periodic signal only when the upper or lower limit is exceeded
It outputs an offset adjustment start signal that activates the means.
The output of the magnetic detection sensor changes to compensate for
If a positive value is required, the output correction means
Correct the output of the sensor and exceed the desired upper or lower limit.
If it is corrected so that it is not
You. That is, a cycle for outputting a periodic signal for output correction.
The period signal generating means is stopped. And output
The output signal from the correction means and the peak / bottom hold
The threshold set from the peak value and bottom value by the step
At the timing to output the binarized signal by comparing
Is a periodic signal generator that outputs a periodic signal for output correction
Since the means is stopped, it is possible to prevent a decrease in angle accuracy due to oscillation spike noise.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described below with reference to the drawings. FIG. 1 shows a gear 1, an MRE bridge circuit 2, an output correction circuit 3 and a binarization circuit 4. First, 2
The value conversion circuit 4 will be described with reference to FIG. This is M
A binary pulsing comparator 11 having the inverted and amplified output signal A of the RE bridge circuit 2 as an inverted input;
Hold circuit 12a and bottom hold circuit 12b for holding the peak value and bottom value of the above, a reset circuit 13 for resetting the hold of these hold circuits, and a threshold for setting a threshold value to be a non-inverting input of the comparator 11 based on the hold value. It comprises a value setting circuit 14.

The operation of the circuit shown in FIG. 2 will be described with reference to a simple time chart shown in FIG. FIG. 3A shows the comparator 11, and FIG. 3B shows a time chart. Note that the inverted input of the comparator 11, that is, the MRE output signal A is indicated by IN as a solid line, the non-inverted input, that is, the threshold value is indicated by a dotted line as TH, and the output is OUT.
That is, when the value of IN becomes smaller than the value of TH, the output OUT of the comparator 11 becomes “High”, and I
When the value of N becomes larger than the value of TH, the output OUT becomes “L”.
ow ". The peak hold value is the peak value of the MRE output signal A, and the bottom hold value is the valley value. Each reset is performed when the IN waveform becomes smaller than the TH waveform. That is, OUT is “Hig”
h ”, the bottom hold value is reset, and I
When the N waveform becomes larger than the TH waveform,
The configuration is such that the peak hold value is reset when the UT becomes “Low”. Also, the threshold is
The voltage is set, for example, by a voltage dividing resistor so as to have a value between the output value of the peak hold circuit and the output value of the bottom hold circuit (hereinafter referred to as PH-BH). In the present embodiment, when OUT becomes “High”, (１ ／) · (P
H-BH), when it becomes “Low”, (3/4) · (PH−
BH) is determined by an analog switch or the like (not shown) that is turned on / off according to the value of OUT.

As described above, in the binarization circuit 4 according to the present embodiment, the threshold value for binarization is not always a fixed threshold value but is always determined by the peak value and the bottom value of the MRE output signal A. I have decided. That is, even if the output fluctuates, a threshold value corresponding to the output is always set, so that a detection error due to the output fluctuation can be prevented. This allows
After the power is turned on, once the offset adjustment is performed, the offset adjustment can be stopped. That is, since the oscillator of the output correction circuit can be stopped and is not affected by the oscillation spike noise, high angular accuracy can be obtained.

Next, an output correction circuit 3 having a configuration in which the oscillator is stopped once the offset is adjusted will be described with reference to FIG. The positive input of the differential amplifier 5 is the output of the bridge circuit 2, and the negative input is the D / A converter 10
Adjustment voltage. The output of the differential amplifier 5 is
The positive input of the comparator 6a for setting the upper limit and the negative input of the comparator 6b for setting the lower limit are also input to the binarization circuit 4. The + input and the-input of the comparator 6a and the comparator 6b are each set to one of the set voltages ref1 to ref4 formed of resistors obtained by dividing the power supply voltage for setting the upper limit voltage and the lower limit voltage into four stages. Supplied.

In this embodiment, ref1 or ref2 is input to the-input of the comparator 6a, and ref3 or ref is input to the + input of the comparator 6b.
4 is input. And comparators 6a and 6b
Is input to the OR circuit 7. The output of the OR circuit 7 is input to the oscillator 8 as an oscillation start signal, and the output of the oscillator 8 is input to the up / down counter 9. Also,
The up / down counter 9 determines which of the up / down counters should operate based on the output of the comparator 6a.
DownFLAG is input. That is, if the output of the comparator 6a is "High", the count is down, and the output of the comparator 6a is "Low".
If so, it is set to count up. Then, the output of the counter 9 is input to the D / A converter.

Next, the operation of the circuit block diagram shown in FIG. 1 will be described. Here, the gain of the differential amplifier (operational amplifier) 5 is set so that when the signal of the MRE bridge circuit 2 is amplified, the output of the differential amplifier 5 becomes equal to or lower than the set voltage ref1 and equal to or higher than ref4. I do. This ref
The value of 1 is below the upper limit of the output voltage range of the operational amplifier 5,
The value of ref4 is set to be equal to or higher than the lower limit of the output voltage of the operational amplifier 5. The values of ref2 and ref3 are set to values obtained by adding a hysteresis width for stabilizing the operation to the above set values.

First, when a power supply voltage is applied, each block is set to an initial state. Here, when the gear 1 starts rotating, the balance of the MRE bridge circuit 2 is lost, and the output voltage fluctuates. At this time, the output of the operational amplifier 5 becomes the set voltage re.
If f1 is larger than f1, the output of the comparator 6a (meaning that the offset voltage is generated in the + direction) becomes "High", and the output of the OR circuit 7 becomes "High".
h ”and the oscillator 8 starts oscillating.
Since downFLAG becomes “High”, up / d
The own counter 9 starts counting down with the oscillation of the oscillator 8. The D / A converter 10 uses this up / down
Since the connection is made so as to output the analog voltage set by the data of the counter 9, the output voltage of the D / A converter 10 decreases. Therefore, the output voltage of the operational amplifier 5 gradually decreases. This operation is continued until the output voltage of the operational amplifier 5 becomes equal to or less than ref2. When the output voltage of the operational amplifier 5 falls below ref2, the oscillation operation of the oscillator 8 stops, and the output voltage of the D / A converter is fixed.

In this state, the output voltage range of the operational amplifier 5 is equal to or less than ref2 and equal to or more than ref4, and is a voltage range in which the binarization circuit 4 at the subsequent stage of the operational amplifier operates stably. Next, when the output voltage of the operational amplifier 5 is smaller than ref4, the output of the comparator 6b becomes "High", the output of the OR circuit 7 becomes "High", and the oscillator 8 starts oscillating. Then, at this time, since the output of the comparator 6a is "Low", up / downFLAG becomes "L".
ow ", the up / down counter 9 starts counting up with the oscillation of the oscillator 8. Therefore, the D / A is performed.
The output voltage of converter 10 gradually increases. This operation is continued until the output voltage of the operational amplifier 5 becomes ref3 or more. When the output voltage of the operational amplifier becomes ref3 or more, the oscillation operation of the oscillator 8 is stopped, and the output range of the operational amplifier is fixed at ref1 or less and ref3 or more. , A voltage range in which the binarization circuit 4 at the subsequent stage of the operational amplifier 5 operates stably.

As described above, according to this embodiment, the MRE
The set voltage r at which the amplified signal of the bridge output is set in advance
When the output voltage exceeds ef1 or ref4, the oscillation operation of the oscillator is started, and the oscillation operation is stopped when the output voltage of the operational amplifier falls within the above range. Therefore, the influence of oscillation spike noise can be eliminated.
That is, highly accurate angle detection with an absolute angle accuracy of ± 0.1 ° and repetition (repeatability) of 0.02 ° can be stably performed.

The two-pulse comparator 11 and the peak / bottom hold circuit 12 described above
The binarizing circuit 4 binarizes the output waveform. The peak / bottom hold circuit 12 stores the peak voltage and the bottom voltage of the output waveform of the operational amplifier 5 each time, sets a threshold value according to the values, and inputs the threshold value to the binary pulse comparator 11. In the binary pulse comparator 11,
The output waveform of the operational amplifier 5 is binarized according to the threshold values set by the peak hold / bottom hold circuits 12a and 12b. By doing so, it is possible to output a binary pulse edge with high angular accuracy with respect to the output waveform A having a proper amplitude in a wide range of ref1 to ref4. afterwards,
The binary pulse is processed by a signal processing circuit (not shown).

[Brief description of the drawings]

FIG. 1 is a diagram showing a part of a signal processing circuit of an angle sensor.

FIG. 2 is a diagram illustrating a binarization circuit.

FIG. 3A is a diagram illustrating input and output of a comparator. (B) is a diagram showing an input / output time chart of the comparator.

[Explanation of symbols]

 Reference Signs List 3 output correction circuit 5 differential amplifier 6a upper limit setting comparator 6b lower limit setting comparator 7 OR circuit 8 oscillator 9 up / down counter 10 D / A converter 11 binary pulse comparator 12a peak hold circuit 12b bottom hold circuit 13 Reset circuit 14 Threshold value determination circuit

────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yasuaki Makino 1-1-1 Showa-cho, Kariya-shi, Aichi Japan Inside Denso Co., Ltd. (56) References JP-A-4-69986 (JP, A) JP-A-61- 91770 (JP, A) JP-A-58-62514 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 43/08 G01R 33/09

Claims (4)

(57) [Claims] A signal amplifying means for adding an offset signal to an output signal of a magnetic detection sensor for sensing magnetism, converting the signal into an electric signal, and outputting the electric signal, and amplifying the electric signal; Signal determining means for outputting an offset adjustment start signal only when the value exceeds a lower limit or a lower limit value; periodic signal generating means for outputting a periodic signal in accordance with the offset adjustment start signal; and counting means for changing a count value in accordance with the periodic signal Output correction means comprising : an offset signal output means for outputting an offset signal corresponding to the count value ; peak / bottom hold means for holding a peak value and a bottom value of an output signal from the output correction means; Threshold setting to set threshold from peak value and bottom value by peak / bottom hold means Means, an output signal from the output correction unit compares the set threshold by the threshold value setting means, further comprising a comparison means for outputting a binary signal by the magnitude relationship A sensor signal processing device characterized by the above-mentioned. 2. The signal determination means includes: first signal comparison means for comparing the signal amplification means with the upper limit; second signal comparison means for comparing the signal amplification means with the lower limit. 2. The sensor signal processing device according to claim 1, further comprising: signal determination means for determining the predetermined signal based on outputs of the two signal comparison means. 3. The apparatus according to claim 2, wherein said offset signal output means determines a direction of a change caused by an output of said periodic signal generation means, based on an output of said first or second signal comparison means. Sensor signal processing device. 4. The sensor signal processing device according to claim 1, wherein there are at least two set values between the upper limit value and the lower limit value.