JP3325536B2 - Semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to SOI (Silicon On I
The present invention relates to a semiconductor integrated circuit device using a nsulator type semiconductor substrate, and particularly to an effective technology in which a diode type photosensor and its signal processing circuit are mounted on one chip.

[0002]

2. Description of the Related Art FIG. 4 is a sectional view of a semiconductor integrated circuit device using a conventional SOI substrate. In this case, the diode 105
The type photosensor is formed in a so-called planar type, and the diode 105 type photosensor and its signal processing circuit are formed in a surface semiconductor insulated and separated by a semiconductor substrate 101 and a buried insulating film 102. SO
The purpose of forming the signal processing circuit on the I-substrate is to operate at low voltage, reduce power consumption, increase speed, and avoid the influence of noise.

[0003]

In recent years, a line type image sensor IC and an area image sensor IC equipped with a diode type photo sensor are required to have a high resolution, which is equivalent to the cell size of the diode type photo sensor. Refers to shrinking. However, it has become difficult to reduce the size while maintaining the S / N ratio of the photosensor at or above a certain value. As the cell size decreases, the absolute value of the signal per unit cell decreases,
This is because the noise level does not decrease in proportion to the size.

An object of the present invention is to solve the above-mentioned problems and to provide a structure of a diode type photosensor having a sufficient S / N ratio even if the cell size is small.

[0005]

In order to solve the above-mentioned problems, the present invention uses the following means. (1) By the buried insulating layer formed in the semiconductor substrate,
In a SOI semiconductor integrated circuit device in which a main surface portion on which an element is formed is insulated and separated, a region where a buried insulating layer is not formed is provided in the semiconductor substrate, and a diode type photosensor is formed in this region. Semiconductor integrated circuit device.

(2) The diode type photosensor comprises a trench formed in a semiconductor substrate, a diffusion layer provided on a side wall and a bottom of the trench, and a region where a buried insulating layer is not formed in the semiconductor substrate. Semiconductor integrated circuit device. (3) A semiconductor integrated circuit device, wherein the inside of the trench formed in the semiconductor substrate is buried with an insulating film.

(4) A semiconductor integrated circuit device wherein the inside of the trench formed in the semiconductor substrate is formed of an insulating film and polycrystalline silicon to which a potential is applied.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic sectional view showing one embodiment of the semiconductor integrated circuit device of the present invention. In a semiconductor substrate 101 made of P-type single crystal silicon, for example, SIMOX
By selectively implanting oxygen ions into the semiconductor substrate 101 by a (Separation by Implanted Oxygen) method, a partially formed buried insulating film 102 is formed. A region (hereinafter referred to as an SOI region) insulated from the semiconductor substrate 101 by the partially formed buried insulating film 102 is formed. Of course, a region where the buried insulating film is not selectively formed is a region where the single crystal silicon substrate 101 remains as it is.
(Hereinafter referred to as a bulk region). That is, in the semiconductor substrate 101, a semiconductor region is formed on the buried insulating film 102 formed selectively.

A first MOS transistor 103 constituting a signal processing circuit is formed in the SOI region, and its first M transistor 103 is formed.
A field oxide film 104 whose bottom reaches the buried insulating film 102 is provided around the OS transistor 103 in plan view, and is completely insulated from the periphery. On the other hand, in the bulk region, a trench 106 having a groove shape and an N-type diffusion layer 10 provided on the side wall and bottom of the trench 106 are provided.
7 and an insulating film 108 filling the inside of the trench 106 is formed. Further, a second MOS transistor 109 for transferring a signal obtained by the photodiode 105 is formed in the bulk region.

The first and second MOS transistors 103 and 109 have a gate electrode 114 and a diffusion region 113 serving as a source / drain region. The width of the trench 105 constituting the photodiode is 0.3
μm to 3.0 μm, and the depth is about 1 μm to 10 μm, depending on the wavelength of the target light. In FIG. 1, even if the plane size is small, the diffusion effective area in which carriers generated by light absorption can be collected is large, so that the cell size can be made compact without deteriorating the S / N ratio. . In particular, this structure is advantageous on the long wavelength side.

FIG. 2 is a schematic sectional view showing another embodiment of the semiconductor integrated circuit device of the present invention. The first MOS transistor 103 for signal processing is formed in the SOI region as in the embodiment of FIG. However, the configuration in the trench 106 of the photodiode 105 formed in the bulk region is different. On the inner wall of the trench 106,
An N-type diffusion layer is formed. On its surface, an insulating film 1
10 is formed, and polycrystalline silicon 111 is formed on the surface of the insulating film 110. This structure is such that a potential is applied to the polycrystalline silicon 111.

Although not shown in the drawing, the potential can be achieved by electrically contacting the metal wiring and the polycrystalline silicon 111 through the contact holes. Photodiode 1
The main generation region of the noise signal detected at 05 is an interface level unevenly distributed at the interface between the surface of the semiconductor substrate 101 and the insulating film.
In the structure of this embodiment, an interface state can be substantially reduced by applying a potential that fills the holes to the polycrystalline silicon 111. For this reason, it is possible to drastically reduce the noise level.

FIG. 3 is a schematic sectional view showing another embodiment of the semiconductor integrated circuit device of the present invention. FIGS. 1 and 2 show an embodiment in which an SOI region is selectively formed in a semiconductor substrate. However, in the embodiment shown in FIG.
After forming the I region, the surface semiconductor layer and the insulating film are selectively removed by photolithography and etching to expose the semiconductor substrate, and the photodiode 105 is formed there. The effect is the same as that of the embodiment shown in FIGS.

[0014]

As described above, according to the structure of the present invention,
Since a photodiode having a high S / N ratio and a compact size can be realized, a high-resolution line or area type image sensor integrated circuit device can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing one embodiment of a semiconductor integrated circuit device of the present invention.

FIG. 2 is a schematic cross-sectional view showing one embodiment of another semiconductor integrated circuit device of the present invention.

FIG. 3 is a schematic cross-sectional view showing one embodiment of another semiconductor integrated circuit device of the present invention.

FIG. 4 is a schematic cross-sectional view showing one embodiment of a conventional semiconductor integrated circuit device.

[Explanation of symbols]

 Reference Signs List 101 semiconductor substrate 102 buried insulating film 103 first MOS transistor 104 field oxide film 105 photodiode 106 trench 107 N-type diffusion layer 108 insulating film 109 second MOS transistor 110 insulating film 111 polycrystalline silicon 112 gate electrode 113 diffusion layer

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 27/146 H01L 27/148 H01L 27/14 H01L 31/10

Claims (1)

(57) [Claims] An SOI in which a main surface portion on which an element is formed is insulated and separated by a buried insulating layer formed in a semiconductor substrate.
In the semiconductor integrated circuit device, a region in which a buried insulating layer is not formed is provided in the semiconductor substrate;
A diode-type photosensor is formed in this region. The diode-type photosensor includes a trench formed in a semiconductor substrate, a diffusion layer provided on a sidewall and a bottom of the trench, and a buried insulating layer in the semiconductor substrate. A semiconductor integrated circuit device, wherein the inside of the trench is formed of an insulating film and polycrystalline silicon to which a potential is applied.