JP3312145B2 - Timer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timer device for starting a timer circuit by using a power supply circuit for converting an AC power supply into a DC power supply.

[0002]

2. Description of the Related Art FIG. 3 is a block diagram showing a configuration of a power-off delay timer device (hereinafter simply referred to as a "timer device") using a conventional power supply circuit. In FIG. 3, reference numeral 1 denotes a power supply circuit, which converts a supplied AC voltage power supply into a DC voltage power supply. The power supply circuit 1 is composed of a thyristor and other circuit components. ZD1 is a constant voltage diode that conducts when the AC voltage supplied to the power supply circuit 1 exceeds a predetermined value, and ZD2 is a constant voltage diode that conducts when the DC voltage converted by the power supply circuit 1 exceeds a predetermined value. Reference numeral 2 denotes a relay set coil (hereinafter simply referred to as a "set coil") for setting a relay for activating an external device such as a control device. Reference numeral 3 denotes a relay reset coil (hereinafter, simply referred to as “reset coil”) that resets the relay and stops the activation of the external device. TR1 and TR2 are coil driving transistors for driving the set coil 2 and the reset coil 3, respectively.

Reference numeral 4 denotes a timer circuit for supplying a coil drive signal to the transistors TR1 and TR2. Reference numeral 5 denotes a time limit circuit that supplies a signal corresponding to a preset time to the timer circuit 4. The timed circuit 5 is, for example, an oscillation circuit, and the oscillation frequency changes according to the set time. 6
Is when the zener diodes ZD1 and ZD2 conduct,
That is, when the input voltage (AC voltage) and the output voltage (DC voltage) of the power supply circuit 1 exceed a predetermined value, the logic circuit receives the detection signal 2 and the detection signal 1 and provides the timer circuit 4 with the detection output signal. It is composed of a gate and the like. In the logic circuit 6, when both the detection signal 1 and the detection signal 2 are at the high level, the detection output signal is turned on (active).

FIG. 4 is a timing chart of each signal in the timer device of FIG. The operation of the timer device shown in FIG. 3 will be described with reference to this timing chart. When an AC voltage is supplied to the power supply circuit 1 and the voltage value becomes equal to or higher than the Zener voltage of the constant voltage diode ZD1, the detection signal 2 goes high. FIG. 4A shows a signal waveform of an AC voltage power supply VIN. Thereafter, the AC voltage is converted to a DC voltage by the power supply circuit 1 and the capacitor C
1, C2 and C3 are charged and their terminal voltages gradually rise. When these terminal voltages reach a voltage at which the relay circuit can be driven and the timer circuit 4 and the timed circuit 5 can be driven even during the set time, the detection signal 1 becomes high level when the voltage exceeds the Zener voltage of the constant voltage diode ZD2. . Then, the detection output signal given from the logic circuit 6 to the timer circuit 4 is turned on, and the timer circuit 4
1 is supplied with a one-shot output coil drive signal.
FIG. 4B shows the coil drive signal V to the transistor TR1.
3 shows a signal waveform of XS. When the coil drive signal VXS is applied and the transistor TR1 is turned on, an exciting current flows through the set coil 2 and a relay (not shown) is turned on (set state). While the power supply VIN is on, this relay keeps on.

Next, when the power supply VIN is turned off, the detection signal 2 goes low immediately, and the output detection signal from the logic circuit 6 is turned off (non-active). When the detection output signal is turned off, the timer circuit 4 starts counting, and when the counting time reaches a set time, the transistor T
A coil drive signal is given to R2. FIG. 4C shows a signal waveform of the coil drive signal VXR to the transistor TR2.
This coil drive signal VXR is applied to the transistor TR
When 2 is turned on, an exciting current flows through the reset coil 3 and a relay (not shown) is turned off (reset state).

FIG. 4D shows a signal waveform of the relay output a / X. In this signal waveform, Rt is a delay time from when the power supply VIN is turned on to when the relay output is turned on. This delay time Rt is determined by the capacitors C1, C2 and C3.
Is a delay time caused by the need to charge the battery. That is, the delay time Rt is an application time of the power supply VIN to be added at a minimum to operate the timer device, and is called a minimum power application time. The performance of the power-off delay timer device is determined by how short the minimum power application time Rt is.

FIG. 5 is a circuit diagram showing a specific example of the power supply circuit 1 in FIG. In FIG. 5, reference numeral 7 denotes a rectifier circuit composed of a diode bridge for full-wave rectifying the power supply VIN of the AC voltage. FIG. 7A shows a current waveform based on the DC voltage rectified by the rectifier circuit 7. The SCR is a thyristor that is turned on when a predetermined voltage is applied between the cathode and the gate, and turned off when the voltage applied to the anode becomes about 0 V. ZD4 is a constant voltage diode that suppresses the DC voltage applied to the gate of the thyristor SCR to a predetermined voltage (Zener voltage) or less. Note that the same components as those in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted.
Further, a resistor inserted in series between the rectifier circuit 7 and the anode of the thyristor SCR is an inrush prevention resistor for suppressing an excessive inrush current from flowing to the load side.

Next, the operation of the circuit shown in FIG. 5 will be described.
When power is supplied to this circuit, the gate of the thyristor SCR becomes a Zener voltage, but since the terminal voltage of the capacitor C1 is 0 V, a voltage is applied between the gate and the cathode of the thyristor SCR to turn on the thyristor SCR. Become. This on state is maintained until the anode current of the thyristor SCR becomes equal to or less than the holding current. Thyristor SC
When R is turned on, the capacitors C1, C2 and C
3, a charging current I flows. The thyristor SCR repeatedly turns on and off until the terminal voltage of the capacitor C1 reaches the Zener voltage (accurately, the voltage obtained by subtracting the voltage for turning on the gate and the cathode from the Zener voltage). Capacitors C1, C2 and C
Inject into 3.

The timer circuit 4, the timed circuit (not shown), and the set coil 2 can operate when the terminal voltages of the capacitors C1 and C3 exceed a predetermined value, and the reset coil 3 operates when the terminal voltage of the capacitor C2 exceeds a predetermined value. Becomes
The subsequent operation is the same as that of FIG.

[0010]

However, in the circuit of FIG. 5, when a sharp rising or falling voltage such as a rectangular wave is applied to the AC voltage supplied to the rectifier circuit 7, noise is generated in the AC voltage. When superimposed,
There is a problem that the current of the thyristor SCR does not become lower than the holding current, the thyristor SCR remains on, and the rush prevention resistor and the capacitors C1, C2, and C3 are burned or broken.

FIG. 6 is a circuit diagram of a timer device using a power supply circuit conventionally used for this measure. FIG.
In the figure, reference numeral 8 denotes a rectifier circuit composed of a diode for half-wave rectifying the power supply VIN of the AC voltage. Other configurations are the same as those in FIG. 5, and are denoted by the same reference numerals and description thereof will be omitted. FIG. 7B shows a current waveform based on the DC voltage rectified by the rectifier circuit 8. As is apparent from this current waveform, the DC voltage applied to the anode of the thyristor SCR is a half-wave period, that is, a half cycle, and the DC voltage becomes 0 V in the next half cycle. Is applied, or when noise is superimposed, the thyristor SCR is reliably turned off during the period when the DC voltage is 0 V.

However, in the configuration of FIG. 6, since the DC voltage for charging the capacitors C1, C2 and C3 is every half cycle, the time required for charging, that is, the minimum power application time Rt becomes longer. Problems will arise.

The present invention solves the above-mentioned conventional problems. Even when a steep voltage such as a rectangular wave is applied to the AC voltage of the input power supply, or when noise is superimposed on the AC voltage, the inrush is prevented. It is an object of the present invention to provide a timer device using an excellent power supply circuit that does not cause burning and destruction of a prevention resistor and an internal capacitor and does not increase a minimum power supply time.

[0014]

In order to achieve the above-mentioned object, first switching means which conducts in a half cycle of an AC voltage of an input power supply to convert the AC voltage into a DC voltage, and another switching means for converting the AC voltage into a DC voltage. A power supply circuit having a second switching means that conducts in a half cycle to convert the AC voltage to a DC voltage; and a first control circuit that is operated by receiving a DC voltage from the power supply circuit and operates according to the input power supply. A timer circuit for transmitting a signal and transmitting a second control signal after a lapse of a predetermined time from when the input power supply is turned off.

[0015]

According to the present invention, since the two switching means are turned on alternately every half cycle, when a steep voltage such as a rectangular wave is applied to the AC voltage of the input power supply, or noise is generated in the AC voltage. Even when they are superimposed, there is no possibility of burning and destruction of the rush prevention resistor and the internal capacitor.
Further, since the DC power is supplied to the load over the entire cycle, the minimum power application time can be shortened.

Further, according to the present invention, it is possible to improve the production efficiency by precisely and precisely controlling the time of the external device.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram according to an embodiment of the present invention. Of the configuration shown in this figure, the same components as those of the conventional example shown in FIGS. 3, 5, and 6 are denoted by the same reference numerals, and description thereof is omitted. In FIG. 1, SCR1 and SCR2 are thyristors as first and second switching means,
When a positive voltage is applied to the anode and the voltage difference between the gate and the cathode reaches a certain value, conduction occurs. ZD5 and Z
D6 is a constant voltage diode that suppresses the voltage applied to the gates of the thyristors SCR1 and SCR2 to a predetermined voltage (Zener voltage) or less. In this case, the zener voltages of the two constant voltage diodes ZD5 and ZD6 are almost the same. Therefore, when the terminal voltage of the capacitor C1 is equal to or lower than a predetermined voltage, that is, equal to or lower than the Zener voltage, a trigger signal is applied to the gates of the thyristors SCR1 and SCR2, and the thyristor is turned on.

The anodes of the thyristors SCR1 and SCR2 are connected to one terminal and the other terminal of an input power supply via a resistor. Therefore, the positive voltage is applied to the anode of one thyristor during the half cycle of the AC voltage of the input power supply, and the positive voltage is applied to the anode of the other thyristor during the other half cycle. That is, when the terminal voltage of the capacitor C1 is equal to or lower than the predetermined voltage, that is, equal to or lower than the Zener voltage, the thyristors SCR1 and SCR2 are turned on alternately every half cycle.

Although not shown in FIG. 1, this timer device also includes the time limit circuit 5 and the logic circuit 6 shown in FIG.

Next, the overall operation of this circuit will be described. Now, it is assumed that the terminal voltage of the capacitor C1 is lower than the Zener voltage. FIG. 2 is a diagram showing a current waveform of a current flowing through the circuit of FIG. FIG. 2A shows a current waveform of a current that charges the capacitor C1 through the thyristor SCR1, and is a current waveform that passes through the path a in FIG. FIG. 2B shows a current waveform of a current for charging the capacitor C1 through the thyristor SCR2.
7 is a current waveform passing through FIG. As can be clearly seen in this figure, the thyristors SCR1 or SCR2 conduct alternately every half cycle. Therefore, each thyristor is reliably turned off every half cycle even when a steep voltage such as a rectangular wave is applied to the AC voltage of the input power supply or when noise is superimposed on the AC voltage.

Furthermore, the current waveform of the current flowing through the path c is a current flowing over the entire period as shown in FIG. 2C, and the capacitor C1 is rapidly charged, and the minimum power supply time Becomes shorter.

The capacitor C1 is charged so that its terminal voltage can be driven by a relay, and the timer circuit 4 and the timed circuit 5
When a voltage that can be driven during the set time is reached, the timer circuit 4 supplies a relay drive signal as a first control signal to the transistor TR1 as the relay drive means. As a result, an exciting current flows through the set coil 2, a relay (not shown) is set, and the external device is activated.

Thereafter, when the input power is turned off, the timer circuit 4 outputs a second signal to the transistor TR2, which is a relay driving means, after a predetermined time has elapsed from the time when the input power is turned off.
Is provided. as a result,
The exciting current flows through the reset coil 3, the relay is reset, and the operation of the external device stops.

[0025]

As apparent from the above embodiment, according to the present invention, the two switching means are turned on alternately every half cycle, so that the AC voltage of the input power supply is a steep voltage such as a rectangular wave. Is applied, or even when noise is superimposed on the AC voltage, the inrush prevention resistor and the internal capacitor are not burned or broken. Further, since the DC power is supplied to the load over the entire cycle, the minimum power application time can be shortened.

Further, according to the present invention, it is possible to improve the production efficiency by precisely and precisely controlling the time of the external device.

[Brief description of the drawings]

FIG. 1 is a circuit diagram to which an embodiment of the present invention is applied.

FIG. 2 is a diagram showing a current waveform of a current flowing through the circuit of FIG.

FIG. 3 is a block diagram showing a configuration of a power-off delay timer device using a conventional power supply circuit.

FIG. 4 is a timing chart of each signal in the timer device of FIG. 3;

FIG. 5 is a circuit diagram showing a specific example of a circuit of the power supply circuit 1 in FIG. 3;

FIG. 6 is a circuit diagram showing another example of a specific circuit of the power supply circuit 1 in FIG.

7A is a diagram showing a current waveform based on a DC voltage rectified by the rectifier circuit 7 of FIG. 5. FIG. FIG. 7B is a diagram illustrating a current waveform based on the DC voltage rectified by the rectifier circuit 8 of FIG. 6.

[Explanation of symbols]

 2 Relay set coil 3 Relay reset coil 4 Timer circuit SCR1, SCR2 Thyristor (switching means) TR1, TR2 Transistor (relay driving means)

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-61-161968 (JP, A) JP-A-4-88881 (JP, A) JP-A-5-30747 (JP, A) Jpn. 187541 (JP, U) Japanese Utility Model 1-20080 (JP, U) Japanese Utility Model 6-23325 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H02H 7/125 H02M 7 / 00-7/40

Claims (4)

(57) [Claims] A first switching unit that conducts in a half cycle of an AC voltage of an input power source to convert the AC voltage into a DC voltage; and conducts in another half cycle of the AC voltage to convert the AC voltage into a DC voltage. A power supply circuit having a second switching means for converting the input power into a first voltage and a first voltage in response to turning on the input power.
And a timer circuit for transmitting a second control signal after a lapse of a predetermined time from when the input power is turned off. 2. The external device according to claim 1, wherein the first control signal is a control signal for setting a relay for activating an external device, and the second control signal is for resetting the relay and controlling the operation of the external device. A timer device, which is a control signal for stopping. 3. The capacitor according to claim 1, further comprising: a capacitor for charging the DC voltage and supplying a DC current to the timer circuit, wherein the first and second switching means make the terminal voltage of the capacitor lower than a predetermined voltage. A timer device that conducts when it goes low. 4. The thyristor according to claim 1, wherein said first and second switching means apply a DC voltage supplied to said timer circuit to a cathode and a constant voltage for supplying a predetermined voltage to a gate of said thyristor. A timer device comprising a voltage diode.