JP3309155B2 - TFT array - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display (hereinafter simply referred to as "L") using thin film transistors (hereinafter simply referred to as TFTs) as switching elements.
CD array).

[0002]

2. Description of the Related Art Electro-optical devices using liquid crystals have been actively applied to displays. In general, an electro-optical element using liquid crystal is
A liquid crystal layer made of liquid crystal is sandwiched between two substrates having electrodes on the upper and lower surfaces, respectively, and a polarizing plate is disposed above and below the two substrates. Is installed. The surfaces of the upper and lower substrates having the electrodes are subjected to a so-called alignment treatment, and the director expressing the directions of the liquid crystal molecules on average is controlled to a desired initial state.

The liquid crystal has a birefringent property, and light incident from a backlight through a polarizing plate is changed to elliptically polarized light by birefringence, and is incident on the opposite polarizing plate. In this state,
When a voltage is applied between the upper and lower electrodes, the arrangement state of the director changes, the birefringence of the liquid crystal layer changes, and the elliptically polarized state incident on the opposite polarizer changes.
An electro-optical effect is obtained in which the intensity and spectrum of light transmitted through the electro-optical element change. The electro-optic effect is determined by the type of liquid crystal phase used (nematic phase, snectic phase, cholesteric phase, etc.), initial alignment state, direction of the polarizing axis of the polarizing plate, thickness of the liquid crystal layer, or the path through which light is transmitted. It varies depending on the color filter and various interference films, but has been reported in detail in known literature. In general, a TN (twisted
nematic) and a structure called STN (super twisted nematic) are used.

Electro-optical elements for display using liquid crystal include a simple matrix type liquid crystal display device and a TFT-LCD using a TFT as a switching element. TFT-LCDs having characteristics superior to CRTs and simple matrix type liquid crystal display devices in terms of portability and display quality are widely used in notebook personal computers and the like. In both the simple matrix type liquid crystal display device and the TFT-LCD, a liquid crystal layer is sandwiched between upper and lower electrode substrates. Color display is performed by providing a color filter on one of the electrode substrates. Further, a polarizing plate is provided on the outside of such a configuration, and a backlight is provided on one side. In a simple matrix type liquid crystal display device, an electrode substrate in which stripe-shaped transparent electrodes are formed on a transparent insulating substrate such as a glass substrate is used up and down, so that the stripe-shaped electrode patterns are substantially orthogonal between the upper and lower electrode substrates. And applying a desired voltage to the liquid crystal layer sandwiched between the intersections of the upper and lower electrode stripes, a display can be obtained using a pixel array having one pixel at the intersection of the electrode stripes. Since the simple matrix type liquid crystal display device has such a configuration, a specific pixel and either the horizontal or vertical pixel and the upper and lower electrodes are common electrodes, and the display signal potential applied to a certain pixel is There is a problem that crosstalk is likely to occur due to affecting other pixels, and the contrast is low because a sufficient applied voltage cannot be applied to each pixel in order to perform driving with less crosstalk. is there. In contrast, TFT
In an LCD, a common electrode is formed on an insulated transparent electrode such as a glass substrate and a TFT array substrate in which pixels are formed in an array, with a pixel connected to a pixel electrode as a pixel on a TFT substrate. By using the opposing substrates as the upper and lower electrode substrates and applying a desired voltage to the liquid crystal layer sandwiched between the pixel electrodes and the common electrode, a display can be obtained using a pixel array having one pixel electrode. . The color filter is generally provided on a counter substrate on which a common electrode is formed. Since the voltage applied to the liquid crystal layer of each pixel is independently controlled by selectively switching the TFT provided for each pixel electrode, crosstalk is unlikely to occur and sufficient contrast can be obtained. It is.

However, in a TFT-LCD, a gate line for selectively scanning a TFT provided in each pixel and a source line for supplying a signal potential to be written to a pixel electrode are formed in a substantially orthogonal state. A so-called domain portion in which a patterned metal thin film that does not transmit light is used, and the arrangement of directors generated because a desired voltage is not applied to the liquid crystal layer around each pixel electrode is disturbed. It is necessary to shield light leakage from the LCD with a black matrix provided on the opposite substrate, which reduces the ratio of the area of the TFT-LCD surface where the electro-optic effect can be used, that is, the so-called development rate, and reduces the backlight light. There is a problem that utilization efficiency is low.

To solve this problem, the aperture ratio T can be increased.
An FT array is disclosed in JP-A-7-230104 or JP-A-5-196969.

According to the TFT array disclosed in Japanese Patent Application Laid-Open No. Hei 7-230104, a light-shielding electrode for forming an auxiliary capacitance around a pixel electrode in the TFT array substrate and facing the pixel electrode is formed under the source wiring. When the pixel electrode is extended to the vicinity, the pixel electrode can be formed close to the source wiring, whereby the aperture ratio can be increased. However, in this configuration, the facing area between the source wiring and the electrode forming the auxiliary capacitance is large, and therefore, the wiring capacitance of the source wiring is large. For this reason, the load capacity of the drive IC of the source signal source provided outside the display area becomes extremely large, and when a normal drive IC is used, the waveform of the source signal is distorted and the display quality deteriorates. is there. Further, in order to prevent the source signal from being distorted, there is a problem in that a driving IC with large power consumption is required in order to sufficiently drive the driving IC to a large load capacity. In addition, in this configuration, the stray capacitance formed between the pixel electrode and the source line also increases. Therefore, when the potential of the source signal changes depending on display data, the coupling due to the stray capacitance between the pixel electrode and the source line. Since the pixel potential changes in the ring, there is a problem that crosstalk occurs in the source wiring direction.

According to the TFT array disclosed in Japanese Patent Application Laid-Open No. 5-196983, a light-shielding electrode for forming an auxiliary capacitance is arranged around a pixel electrode in a TFT array substrate so as to face the pixel electrode. It is possible to shield the domain generated around the pixel electrode, and to reduce the size of the black matrix arranged on the counter electrode, thereby increasing the aperture ratio. However, in this configuration, light leaking from between the source wiring or the gate wiring and the light-shielding auxiliary capacitance electrode provided around the pixel electrode must be shielded by a black matrix disposed on the counter electrode. In particular, even when the display device is viewed obliquely, it is necessary to increase the size of the black matrix disposed on the counter electrode in order to prevent light from leaking from this portion. was there.

[0009]

According to a first aspect of the present invention, there is provided a TFT array in which display pixels having pixel electrodes to which TFTs are electrically connected are formed in an array on a first insulating substrate. A gate line for scanning each of the TFTs line-sequentially and a source line for applying a signal potential to be written to a pixel electrode are formed in a matrix at right angles.
In the FT array substrate, a light-shielding auxiliary capacitance electrode provided around the pixel electrode with an insulating film interposed between the pixel electrode and the pixel electrode is formed to extend from the periphery of the pixel electrode, A portion of the auxiliary capacitance electrode extending outside the periphery of the pixel electrode and an a-Si film extending from below the source line overlap with each other;
The film is separated by a transparent electrode layer forming the pixel electrode and an insulating film layer used as a passivation film of the TFT, and the a-Si film is a light-shielding auxiliary capacitance electrode film and a gate insulating film of the TFT. Are separated by an extended film.

In the TFT array according to a second aspect of the present invention, the auxiliary capacitance electrode is formed electrically independent of a gate wiring, and the auxiliary capacitance electrode forms an auxiliary capacitance with an insulating film interposed therebetween. Since the TFT connected to the pixel electrode different from the pixel electrode is formed near the gate line for line-sequentially scanning and selecting the TFT, a signal can be input to the gate line and the auxiliary capacitance electrode independently. This is preferable because the size can be reduced and an electro-optical element with high display quality can be obtained.

According to a third aspect of the present invention, the TFT array extends from a region where the TFT is formed between a gate wiring and a portion of the auxiliary capacitance electrode extending outside the periphery of the pixel electrode. It is preferable that the formed a-Si films have an overlap since light leakage from between the gate wiring and the auxiliary capacitance electrode can be reduced.

According to a fourth aspect of the present invention, in the TFT array, the auxiliary capacitance electrode is one scanning period or one scanning period earlier than a gate line for scanning and selecting a TFT connected to a pixel electrode among the gate lines. It is preferable that the gate wiring be a part of the gate wiring which is selected by scanning later, since the number of wirings where the source wiring intersects via the insulating film can be reduced.

According to a fifth aspect of the present invention, in the TFT array, the overlap width between the auxiliary capacitance electrode and the a-Si film is not less than the gate insulating film thickness.
This is preferable because light leakage in the oblique direction from the overlapping portion with the i film can be reduced.

In the TFT array according to the sixth aspect of the present invention, it is preferable that the a-Si film thickness be 120 nm or more and 300 nm or less, since good TFT characteristics can be obtained and light leakage can be prevented.

According to a seventh aspect of the present invention, in the TFT array, the distance between the pixel electrode and the a-Si film superposed on the auxiliary capacitance electrode with the gate insulating film interposed therebetween is such that
Is preferable because the capacitance formed between the pixel electrode and the source wiring or the gate wiring through the a-Si film portion can be reduced.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a TFT array according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First Embodiment FIGS. 1, 2 and 3 are a plan view and a cross-sectional view, respectively, of a TFT array according to a first embodiment of the present invention. FIG. FIG. 3 is a sectional view, and FIG. 3 is a sectional view taken along line BB of FIG.

1, 2 and 3, reference numeral 1 denotes a gate electrode and a gate wiring (hereinafter, referred to as a gate electrode and a wiring), and 2 denotes an auxiliary capacitance electrode and an auxiliary capacitance wiring (hereinafter, referred to as an auxiliary capacitance electrode and a wiring). 3) a semiconductor active film and an ohmic contact film;
Is a source electrode and a source wiring (hereinafter, referred to as a source electrode and a wiring), 5 is a drain electrode, 6 is a pixel contact, 7 is a pixel electrode, 8 is a semiconductor active film, and 9 is ohmic. A contact film,
Reference numeral 10 denotes a gate insulating film, 11 denotes a passivation film, 12 denotes a color filter color material layer, 13 denotes a transparent electrode on the color filter substrate (hereinafter simply referred to as a transparent electrode), and 14 denotes a color filter substrate. An upper black matrix (hereinafter simply referred to as a black matrix), 15 is oblique light, 16 is a gate electrode, 17 is a source electrode, and 18 is a pixel contact.

Next, the TFT according to the first embodiment will be described.
The production method is described in detail below.

First, a glass substrate as an insulating substrate is washed to clean the surface. The thickness of the insulating substrate may be arbitrary,
In order to reduce the thickness of the electro-optical element, it is preferable that the thickness is about 0.7 mm or 0.5 mm. If the insulating substrate is too thin, the substrate will be distorted due to the thermal history of various film formations and processes, causing problems such as poor patterning accuracy.Therefore, the thickness of the insulating substrate depends on the process used. The choice must be made with consideration. Further, when the insulating substrate is made of a brittle fracture material such as glass, it is preferable to perform chamfering on the end face of the substrate in order to prevent entry of foreign matter due to chipping from the end face. Further, it is preferable to provide a notch in a part of the insulating substrate so that the direction of the substrate can be specified, because the direction of the substrate processing in each process can be specified, thereby facilitating the process management.

Next, a first metal thin film is formed by a method such as sputtering. As the first metal thin film, for example, a thin film having a thickness of about 100 nm to 500 nm made of, for example, Cr, Mo, Ta, Ti, Al, Cu, or an alloy in which a small amount of another substance is added thereto can be used. A contact hole is formed on the first metal thin film by dry etching in a step described later, and a conductive thin film is formed, so that a metal thin film that is unlikely to have surface oxidation or a metal thin film that has conductivity even when oxidized is used. It is preferably used for one metal thin film, and at least the surface is preferably made of Cr, Ti, Ta, or Mo. Further, as the first metal thin film, a metal thin film in which different types of metal thin films are stacked, or a metal thin film having a different composition in the thickness direction can be used.

Next, in a first photolithography step, the first metal thin film is patterned into the shapes of the gate electrode and wiring 1, gate electrode 16, auxiliary capacitance electrode and wiring 2. In the photolithography process, after washing the TFT array substrate, applying and drying a photosensitive resist, exposing through a mask pattern in which a predetermined pattern is formed, and developing it, the mask pattern is transferred to the TFT array substrate in a photolithographic manner. After the resist is formed, the photosensitive resist is cured by heating and then etched, and the photosensitive resist is peeled off. The etching of the first metal thin film is performed by wet etching using a known etchant (for example, when the first metal thin film is made of chromium, an etching solution in which cerium ammonium nitrate and nitric acid are mixed). . Further, it is preferable to etch the first metal thin film so that the pattern edge has a tapered shape in order to prevent a short circuit at a step with another wiring. Although the gate electrode and the wiring 1, the gate electrode 16, the auxiliary capacitance electrode and the wiring 2 are shown to be formed in this step, various marks and wirings necessary for manufacturing the TFT array substrate are also formed. Let it.

Next, a first insulating film, a semiconductor active film, and an ohmic contact film are successively formed by plasma CVD. The SiN _x film as the first insulating film to be a gate insulating film 10, SiO _y layer, S _i O _z N _w film (Note, x, y,
z and w are each a positive number) or a laminated film of these. The thickness of the first insulating film is from 300 nm to 600 n
m. When the film thickness is small, a short circuit is likely to occur at the intersection of the gate wiring and the source wiring, and it is preferable that the thickness is about the thickness of the first metal thin film or more. When the film thickness is large, T
Since the ON current of the FT decreases and the display characteristics deteriorate, it is preferable to reduce the thickness as much as possible. As the semiconductor active film, an amorphous silicon (a-Si) film and a polysilicon (p-Si) film are used. The thickness of the semiconductor active film is 1
The thickness is set to be about 00 nm to 300 nm. If the film thickness is small, the ohmic contact film described later disappears during dry etching, and if the film thickness is large, the ON current of the TFT becomes small. The film thickness is selected based on the required ON current of the TFT. When an a-Si film is used as the semiconductor active film, the interface between the gate insulating film and the a-Si film should be a SiN _x film or a SiO _w N _z film.
This is preferable in terms of controllability and reliability of th. When a p-Si film is used as the semiconductor active film, p-S of the gate insulating film is used.
It is preferable that the interface with the i film be a SiO _x film or a SiO _z N _w film in terms of controllability and reliability of Vth of the TFT.
When an a-Si film is used as the semiconductor active film, it is short to form a film near the interface with the gate insulating film at a low film forming rate and form an upper layer under a high film forming rate. It is more preferable that TFT characteristics with high mobility can be obtained during the film formation time and that the leakage current when the TFT is off can be reduced. As the ohmic contact film,
n ⁺ a in which a-Si or p-Si is slightly doped with phosphorus
-Si film and n ⁺ p-Si film are used. The thickness of the ohmic contact film can be about 20 to 70 nm. These SiN _x film, SiO _y film, SiO _z
N _w film, a-Si film, p-Si film, n ⁺ a-Si film, n ⁺
The p-Si film is formed of a known gas (for example, SiH ₄ , NH ₃ ,
H ₂ , NO ₂ , PH ₃ , and N ₂ and a mixed gas thereof can be used to form a film.

Next, in the second photolithography step, the semiconductor active film and the ohmic contact film are replaced with the TF of the display pixel.
A semiconductor active film and an ohmic contact film are formed in a portion where a T is formed (hereinafter referred to as a TFT portion) and a portion where a source wiring is formed in a pattern which is larger than the source electrode and the wiring 4 and overlaps with the auxiliary capacitance electrode and the wiring 2. 3 is patterned. The semiconductor active film and the ohmic contact film are etched by dry etching with a known gas (for example, a mixed gas of SF ₆ and O ₂ or a mixed gas of CF ₄ and O ₂ ).

Next, a second metal thin film is formed by a method such as sputtering. As the second metal thin film, for example, 100 nm to 5 nm made of Cr, Mo, Ta, Ti, Al, Cu, or an alloy containing a small amount of another substance added thereto.
A thin film having a thickness of about 00 nm can be used. On the second metal thin film, a contact hole is formed by dry etching in a step described later, and a conductive thin film is formed, so that a metal thin film that is unlikely to have surface oxidation or a metal thin film that has conductivity even if oxidized is used. It is preferably used for one metal thin film, and at least the surface is preferably made of Cr, Ti, Ta, or Mo. Further, since the second metal thin film can obtain good contact characteristics with the ohmic contact film, at least the interface with the ohmic contact film is C
Preferably, they are r, Ti, Ta, and Mo. Further, as the second metal thin film, a metal thin film in which different types of metal thin films are stacked or a metal thin film having a different composition in the thickness direction can be used.

Next, in the third photolithography step, the second metal thin film is patterned into the shapes of the source electrode and wirings 4 and 17 and the drain electrode 5, and the portion of the ohmic contact film that protrudes from the source wiring is removed by etching. Thus, a channel of the TFT in the pixel portion is formed. The etching of the second metal film is performed by wet etching using a known etchant (for example, when the second metal thin film is made of chromium, an etching solution in which cerium ammonium nitrate and nitric acid are mixed). . In addition, it is preferable to etch the second metal film so that the pattern edge is tapered in order to prevent disconnection of the electrode pattern formed of the upper conductive thin film. The etching of the ohmic contact film is performed by a known gas (for example, a mixed gas of SF ₆ and O ₂ or a mixed gas of CF ₄ and O _2).
And dry etching with a mixed gas of In the etching of the ohmic contact film, at least the ohmic contact film is removed, and the etching is suppressed to such a depth that the underlying semiconductor active film does not disappear. TFT with high mobility should leave the lower semiconductor active film as thick as possible
Is preferred from the viewpoint of obtaining

Next, a second insulating film is formed by plasma CVD or the like. As the second insulating film, a SiN _x film,
An SiO _y film and a SiO _z N _w film are used. The thickness of the second insulating film may be about 200 nm or more. If the thickness is too large, a problem occurs in that the photosensitive resist disappears during dry etching of the contact hole described later. The film thickness is selected based on the selectivity between the resist and the second insulating film. If the thickness is too large, the electrode formed by the conductive thin film formed on the contact hole will break the step, so the upper limit of the film thickness is determined by the step coverage of the conductive thin film. The thickness is preferably about 200 nm to 600 nm in view of productivity, step coverage of the conductive thin film, and selectivity in dry etching of the contact hole between the resist and the second insulating film.

Next, in the fourth photolithography step, the second insulating film and the first insulating film are patterned into the shapes of the pixel contacts 6 and 18. The etching of the second insulating film and the first insulating film is performed by using a known gas (for example, SF ₆ and O _2).
Or a mixed gas of CF ₄ and O ₂ ) by dry etching. Although the pixel contacts 6 and 18 are formed in this step, the transfer terminals for electrically connecting the opposing substrate and the TFT array substrate using a resin containing conductive particles are also described. Various contact holes, such as contact holes, necessary for manufacturing a TFT array substrate are formed.

Next, a conductive thin film is formed by a method such as sputtering. When the electro-optical element is configured as a transmission type thin film, a transparent conductive film such as ITO or S
nO ₂ or the like can be used, and ITO is particularly preferable from the viewpoint of chemical stability. When the electro-optical element is configured as a reflection type, if the conductive thin film has a sheet resistance of about 500Ω / □ or less and does not react with the liquid crystal material and does not cause deterioration of the liquid crystal material, Anything can be used. The thickness of the conductive thin film can be about 50 nm to 200 nm for a transmission type electro-optical element, and 50 nm for a reflection type electro-optical element.
nm to about 500 nm. The thickness of the transparent conductive thin film in the transmission type electro-optical element is selected from about 50 nm to about 200 nm so that coloring due to interference when light is transmitted including the opposing substrate does not occur.

Next, the conductive thin film is patterned into the shape of the pixel electrode 7 in a fifth photolithography step. The conductive thin film is etched by known wet etching or the like depending on the material to be used. When the conductive thin film is ITO,
Etching can be performed by known wet etching or dry etching with a known gas composition.

Through the above steps, the TFT array substrate shown in FIG. 1 is manufactured by five photolithography steps.

Next, a liquid crystal panel in which liquid crystal is sealed between the TFT array substrate and the opposing substrate is formed by a known technique. The following briefly describes a method for manufacturing a liquid crystal panel.

First, a liquid crystal alignment control film on the surface of the TFT array substrate and the counter substrate is formed by a known technique. For example, a film whose surface is rubbed with a cloth after coating and drying a polyimide film can be used as the orientation control film. The thickness of the alignment control film is from an extremely thin film of about one molecule to 100
nm. When the thickness of the orientation control film is large, T
Among the effective voltages applied between the pixel electrode of the FT array substrate and the common electrode of the counter substrate, the effective voltage applied to the liquid crystal becomes small. Further, the alignment control film is formed not only to align the director of the liquid crystal in the in-plane direction of the substrate by rubbing or the like, but also to be oriented with a so-called pretilt angle of about 3 ° to 15 ° with respect to the substrate. You.
If the pretilt angle is too small, the electric field generated between the periphery of the pixel electrode on the TFT array substrate and the source wiring, the gate wiring, and the auxiliary capacitance wiring causes a so-called domain with a disclination in which the orientation of the liquid crystal becomes discontinuous. When this domain occurs in a light transmitting portion, deterioration of display characteristics such as reduction of contrast occurs.
The angle is controlled at an appropriate angle according to the tendency of the liquid crystal domain to be used. The control of the pretilt angle can be controlled by the alignment control film material to be used and the conditions such as the strength of the alignment treatment such as rubbing. Also, when the pretilt angle is large, it tends to be difficult to control the orientation stably, and it is preferable to control the orientation in the above range. In addition, the alignment control film should be made of a material that is unlikely to cause poling by a DC potential generated between the common electrode of the TFT array substrate and the common electrode of the counter substrate and adsorption of impurities in the liquid crystal due to a difference in dVgd due to a display signal. This is preferable in that the occurrence of odor is less likely to occur. It is known that these can be obtained by a known technique, for example, by reducing the thickness of the orientation control film or reducing the surface resistance of the orientation control film. The application of the alignment control film material to the substrate can be performed by transfer, spinner, or the like.

Next, spacers are scattered on at least one of the TFT array substrate and the opposing substrate to bond the TFT array substrate and the opposing substrate at a predetermined gap. For the spacer, for example, polystyrene particles, SiO ₂ particles, or the like can be used. The material of the spacer should be taken into consideration when bonding the TFT array substrate and the opposing substrate at a predetermined gap, if the hardness is high or the shape is sharp, it will damage the TFT and wiring on the TFT array substrate. Selected. Also,
If the scatter density of the spacer is too high, the alignment state of the liquid crystal around the spacer may be disturbed, so that the contrast may be lowered, or bubbles may be generated in the display unit when the liquid crystal volume is reduced at a low temperature. On the other hand, if the density of the spacers is too small, the gap between the TFT array substrate and the opposing substrate is distributed in a plane in the display unit, causing uneven brightness. From these, the spray density of the spacer is selected according to the hardness of the spacer to be used. The spacer can be sprayed by spraying and applying a solution in which the spacer is sprayed in a volatile solvent.

Next, a sealing material made of, for example, epoxy resin is formed in a seal shape around the display portion on one of the TFT array substrate and the counter substrate.
The gap between the TFT array substrate and the opposing substrate is precisely controlled by uniformly dispersing and including the spacers in the sealing material. Note that it is possible to use a material and a particle size different from those of the spacer included in the sealing material and the sealing material dispersed in the substrate surface. Further, in the seal shape, at least one notch serving as a liquid crystal injection port needs to be provided in order to introduce liquid crystal into a gap between the TFT array substrate and the counter substrate by vacuum injection described later. When the liquid crystal is introduced by a method other than vacuum injection by a known technique, the cutout of the seal shape is not required. Screen printing, drawing with a syringe, or the like can be used to form the seal shape.

Next, on at least one of the TFT array substrate and the counter substrate, a transfer electrode position which is an electrode terminal for introducing a common electrode potential to a common electrode of the counter substrate formed on the TFT array substrate is provided. A conductive transfer material is applied. As the transfer material, for example, a material in which conductive particles are dispersed in an epoxy resin can be used. Screen printing, drawing with a syringe, or the like can be used for applying the transfer material. Also, at least one transfer electrode is required, but in a large electro-optical element, it is preferable to reduce the impedance from the signal source of the common electrode potential to the common electrode of the opposite substrate in order to obtain a uniform display. Formed at the four corners of the display unit, avoiding the gate-side lead wiring and the source-side lead wiring,
It is preferable to form a plurality of them around the display section.

Next, the TFT array substrate and the counter substrate are bonded together. At this time, before the sealing material and the transfer material are hardened by pressing and heating, the TFT material is provided with predetermined accuracy.
After the array substrate and the opposing substrate are superimposed, UV curable resin is applied to the end surfaces of both superimposed substrates, or is applied using a syringe or the like to other than the display unit, and then the TFT is applied with predetermined accuracy.
After the array substrate and the opposing substrate are overlaid, it is preferable that the UV curing material is cured by UV irradiation so that predetermined accuracy is maintained. After the treatment as described above, the sealing material and the transfer material are cured by heating while the space between the TFT array substrate and the opposing base plate is pressed.

Next, the unnecessary portion of the superposed TFT array substrate and the opposing substrate as an electro-optical element is cut to expose a connection terminal portion of the TCP to the surface, or to form an injection port for liquid crystal to form an empty space. Cell.

Next, the empty cell is introduced into a vacuum, the inside of the empty cell is evacuated, and then the liquid crystal is injected into the empty cell by opening the injection port to the atmosphere with the liquid crystal immersed therein. At this time, if the speed of vacuuming the atmosphere in which the empty cells are placed is too fast, the empty cells may expand due to the air remaining in the empty cells and a seal puncture may occur. Is preferred. In addition, when the atmosphere in which empty cells are placed is rapidly opened to the atmosphere after the liquid crystal is immersed in the injection port, atmospheric pressure is applied to the empty cells, and the spacers may be deformed or the substrate surface may be damaged by the spacers. Therefore, it is preferable to open to the atmosphere at an appropriate speed.

Next, a liquid crystal panel is formed by applying a sealing material such as an epoxy resin or a UV curable resin to the injection port and curing the same. At this time, the cell in which the liquid crystal has been injected may be pressurized before applying the sealing material so that the gap between the TFT array substrate and the opposing substrate becomes constant.

Next, a polarizing plate is attached to the sealed cell with a polarizing axis defined at a predetermined angle above and below the cell. In addition, a known film capable of improving the viewing angle dependency of the electro-optical element can be laminated on a polarizing plate, or a polarizing plate on which such a film is laminated can be used. T as electro-optical element
When an N-type liquid crystal is used, the liquid crystal directors are aligned so that the directors of the liquid crystal are orthogonal to each other on the upper and lower substrates, but the polarization axis of the polarizing plate is parallel or orthogonal to the director direction of the adjacent substrate surface. . In order to obtain a display with high contrast, it is preferable that the upper and lower polarization axes are orthogonal to each other so that light does not pass through when a voltage is applied to the liquid crystal.

Next, the TCP is bonded to the output terminal connection of the TCP of the liquid crystal panel using an anisotropic conductive film (ACF). ACF in which conductive particles are dispersed in a thermosetting or thermophobic resin is used.

Next, the TCP is connected to the drive circuit board by, for example, ACF or solder by a known technique, and further, a necessary control circuit board, a connector for external signals, a backlight system, and a housing are attached to the electro-optical device. The device is manufactured.

In the first embodiment, a-a is provided in the gap between the source wiring and the Cs electrode laid out around the pixel electrode.
Since the Si film was left, the oblique light 15 shown in FIG.
Since light is absorbed and attenuated by the Si film, light leakage when viewed from an oblique direction can be reduced, so that display quality as viewed from an oblique direction can be improved. FIG. 8 shows the wavelength dependence of the light absorption coefficient of the a-Si film.

In the first embodiment, the source wiring, the pixel electrode, and the a-Si film are separated from each other by the insulating film because they are manufactured in the above-described steps, so that the a-Si film is formed between the source wiring and the pixel electrode. Even if it is left in the gap between the Cs electrodes laid out therearound, there is no electrical short between the source wiring and the pixel electrode or between the source wiring and the Cs electrode.

The overlap width between the auxiliary capacitance electrode and the a-Si film is preferably not less than the gate insulating film thickness.
This is preferable because light leakage in the oblique direction from the overlapping portion of the i film can be reduced.

A-Si film thickness is not less than 120 nm and not more than 300 nm
The following is preferable because good TFT characteristics can be obtained and light leakage can be prevented.

The distance between the pixel electrode and the a-Si film overlaid on the auxiliary capacitance electrode with the gate insulating film interposed therebetween should be equal to or greater than the insulating film used for passivation of the thin film transistor. This is preferable because the capacitance formed between the source wiring and the gate wiring can be reduced.

Embodiment 2 FIGS. 4 and 5 are a plan view and a sectional view, respectively, of a thin film transistor array according to a second embodiment of the present invention. FIG. 5 is a sectional view taken along line DD of FIG. 4, and a cross-sectional view taken along line CC of FIG. 4 is the same as FIG. 4 and 5, reference numeral 19 denotes a pixel contact, and other reference numerals are common to FIGS.

In the first embodiment, as shown in FIG. 3, the a-Si film which is the semiconductor active film 8 is not left in the gap between the gate electrode 16 and the auxiliary capacitance electrode and the wiring 2. In the second embodiment, as shown in FIG. 5, the a-Si film, which is the semiconductor active film 8, is left above the region between the gate electrode 16 and the auxiliary capacitance electrode and the gap between the wiring 2, so Oblique light is a-Si
Since the light is absorbed by the film and attenuated, the display quality can be improved.

Third Embodiment FIGS. 6 and 7 are a plan view and a sectional view, respectively, of a thin film transistor array according to a third embodiment of the present invention. FIG. 7 is a sectional view taken along line FF of FIG. , FIG.
2 is the same as FIG. 6 and 7
1 are common to those in FIGS.

In the first and second embodiments, the auxiliary capacitance electrode is formed electrically independent of the gate electrode and the wiring, whereas in the third embodiment, the auxiliary electrode is formed by the auxiliary electrode extending the gate electrode and the wiring 16. Since the capacitor electrode is used, the aperture ratio of the pixel can be increased, so that a brighter display can be obtained.

[0053]

The TFT according to claim 1 or 2 of the present invention.
According to the array, the signal distortion can be reduced,
An electro-optical element with high display quality can be obtained.

The TFT according to claim 3 of the present invention
According to the array, light leakage from between the gate wiring and the auxiliary capacitance electrode can be reduced.

The TFT according to claim 4 of the present invention
According to the array, the number of wirings where the source wirings intersect via the insulating film can be reduced.

The TFT according to claim 5 of the present invention
According to the array, light leakage in the oblique direction from the overlapping portion between the auxiliary capacitance electrode and the a-Si film can be reduced.

A TFT according to claim 6 of the present invention
According to the array, good TFT characteristics can be obtained and light leakage can be prevented.

The TFT according to claim 7 of the present invention
According to the array, the capacitance formed between the pixel electrode and the source wiring or the gate wiring via the a-Si film portion can be reduced.

[Brief description of the drawings]

FIG. 1 is a surface view of a display pixel of a TFT array according to a first embodiment of the present invention.

FIG. 2 is an explanatory cross-sectional view taken along line aa of a display pixel of the TFT array of FIG. 1;

FIG. 3 is a cross-sectional view of a display pixel of the TFT array of FIG. 1 taken along line bb.

FIG. 4 is an explanatory plan view of a display pixel of a TFT array according to Embodiment 2 of the present invention;

FIG. 5 is an explanatory sectional view of a main part of a display pixel of the TFT array of FIG. 4;

FIG. 6 is an explanatory plan view of a display pixel of a TFT array according to Embodiment 3 of the present invention.

FIG. 7 is an explanatory sectional view of a main part of a display pixel of the TFT array of FIG. 6;

FIG. 8 is an explanatory diagram showing the wavelength dependence of the absorption coefficient of the a-Si film.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Gate electrode and wiring 2 Auxiliary capacity electrode and wiring 3 Semiconductor active film and ohmic contact film 4 Source electrode and wiring 5 Drain electrode 6, 18, 19 Pixel contact 7 Pixel electrode 8 Semiconductor active film 9 Ohmic contact film 10 Gate insulating film 11 Passivation film 12 Color filter coloring material 13 Transparent electrode 14 Black matrix 15 Oblique light 16 Gate electrode 17 Source electrode

Claims (7)

(57) [Claims] A display pixel having a pixel electrode to which a TFT is electrically connected is formed in an array on a first insulating substrate, and a gate line and a pixel electrode for scanning each TFT in a line-sequential manner. In a TFT array substrate in which a source wiring for applying a signal potential to be written to the pixel array is formed in a matrix in an orthogonal state, a light-shielding property provided with an insulating film interposed between the pixel electrode and the pixel electrode is provided around the pixel electrode. An auxiliary capacitance electrode extending from the periphery of the pixel electrode and a portion of the auxiliary capacitance electrode extending outside the periphery of the pixel electrode and a- The Si film has an overlap, and the a-Si film is separated by a transparent electrode layer forming the pixel electrode and an insulating film layer used as a passivation film of the TFT, and the a-Si film is shielded. A TFT array, wherein a storage capacitor electrode film having optical properties and a gate insulating film of the TFT are separated by an extended film. 2. The storage capacitor electrode is formed electrically independent of a gate wiring, and the storage capacitor electrode is connected to a pixel electrode different from a pixel electrode forming a storage capacitor with an insulating film interposed therebetween. 2. The TFT array according to claim 1, wherein the TFT array is formed near a gate line for scanning and selecting a TFT line-sequentially. 3. The method according to claim 1, wherein the gate electrode is provided between a portion of the auxiliary capacitance electrode extending outside the periphery of the pixel electrode and the gate line.
3. The TFT array according to claim 2, wherein the a-Si films extending from the region where the FT is formed have an overlap. 4. A part of the gate line, in which the auxiliary capacitance electrode is selected by scanning one scanning period before or after one scanning period of a gate line for scanning and selecting a TFT connected to a pixel electrode among the gate lines. The TF according to claim 1, which is
T array. 5. The TFT array according to claim 2, wherein an overlap width between the auxiliary capacitance electrode and the a-Si film is equal to or greater than the gate insulating film thickness. 6. The film thickness of the a-Si is 120 nm or more and 30
6. The TFT array according to claim 5, which has a thickness of 0 nm or less. 7. The insulating film according to claim 5, wherein a distance between the pixel electrode and the a-Si film superposed on the auxiliary capacitance electrode via the gate insulating film is equal to or larger than an insulating film thickness used for passivation of the TFT. TFT array.