JP3301173B2 - Automatic performance device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic performance device,
More specifically, the present invention relates to an automatic performance device that realizes accompaniment of a rhythm pattern with a specific time signature or less without a sense of incongruity.

[0002]

2. Description of the Related Art In a conventional automatic performance apparatus, a rhythm pattern composed of a series of musical sound information constituting a song for automatic accompaniment is stored in a storage unit, and a series of musical sound information is read from the storage unit to perform automatic accompaniment. .

[0003] However, when performing automatic accompaniment, the rhythm pattern may be 4 beats, 3 beats or 2 beats.

Therefore, conventionally, when the musical tone information composed of the quadruple rhythm pattern is stored in the storage unit and the accompaniment of the quadruple is performed, the automatic accompaniment is performed using the musical tone information read from the storage unit as it is. However, when performing accompaniment in three or two beats, the tone information corresponding to the first beat or the last beat, which is uniquely set in advance, is skipped and read from the storage unit in accordance with the beat. are doing. Conventionally, a storage unit stores tone information composed of a rhythm pattern of three or two beats, centering on a rhythm pattern of four beats, and matches the tone of the corresponding rhythm pattern in accordance with the rhythm pattern for automatic accompaniment. The information is read and automatic accompaniment is performed.

[0005]

However, in such a conventional automatic performance device, when only musical tone information composed of a quadruple rhythm pattern is stored and an accompaniment of a rhythm pattern other than the quadruple is performed. Was handled by skipping and reading out the music information at a certain position.
Since the tone information at a certain position of the tone information composed of four beats is skipped, there is a problem that the generated accompaniment sound becomes musically uncomfortable.

In order to solve this problem, conventionally, musical tone information composed of a rhythm pattern of three or two beats centered on a rhythm pattern of four beats is stored, and is appropriately switched in accordance with the selected beat. Although there is an automatic performance device to be used, in this automatic performance device, it is necessary to store musical tone information of rhythm patterns of many time signatures in addition to the quadruple in order to perform automatic accompaniment of each rhythm pattern without discomfort. (4) A large-capacity storage means is required to store musical sound information of rhythm patterns other than quadruple, and there is a problem that an automatic performance apparatus becomes large and expensive.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a small and inexpensive automatic performance device which can automatically perform a rhythm pattern other than a specific time signature without discomfort.

[0008]

According to the present invention, there is provided a performance information storage means for storing a series of musical tone information comprising a plurality of beats, and an omitted beat for storing an omitted beat among the tone information stored in the performance information storage means. A storage means, a timing signal generation means for generating a timing signal, a time signature selection means for selecting a time signature, and reading the musical tone information from the performance information storage means in accordance with the timing signal output from the timing signal generation means; The presence / absence of an omitted beat is determined based on the time signature of the time signature selection means, and when there is an omitted beat, reading means for skipping musical tone information corresponding to the omitted beat data stored in the omitted beat storage means, and reading means for the reading means. The above object is achieved by providing a tone generation instruction means for instructing generation of a tone based on the read tone information.

In this case, the skipped beat storage means may store the skipped beat for each bar, for example, as described in claim 2.

Further, for example, as described in claim 3, the performance information storage means stores a series of musical tone information composed of a plurality of parts, and the omitted beat storage means stores an omitted beat for each part. You may do it.

[0011]

According to the present invention, the tone information is read out in synchronism with the timing signal from the performance information storage means for storing a series of tone information for automatic accompaniment consisting of a plurality of beats, and a tone is generated. At this time, if the selected time signature is a time signature equal to or smaller than the specific time signature and there is an omitted beat, the musical tone is generated by skipping the tone information of the beat corresponding to the omitted beat stored in the omitted beat storage means.

Therefore, for beats below a specific time signature, the skipped beats suitable for the beats are stored in the skipped beat storage means, and no musically uncomfortable feeling is obtained without using a large-capacity storage means. An automatic performance device capable of performing natural accompaniment and capable of performing natural automatic accompaniment can be reduced in size and cost.

Further, by storing the omitted beat for each bar or part of the music for automatic accompaniment, more musically natural accompaniment can be performed.

[0014]

The present invention will be specifically described below with reference to examples.

FIG. 1 to FIG. 10 are views showing an embodiment of the automatic performance apparatus of the present invention.

FIG. 1 is a block diagram of an automatic performance apparatus 1. The automatic performance apparatus 1 includes an operation display unit 2, a CPU (Centra
l Processing Unit) 3, ROM (Read Only Memory)
4, a RAM (Random Access Memory) 5, a keyboard 6, a musical sound generator 7, a D / A converter 8, an amplifier 9, and the like.

The ROM 4 stores various programs and data necessary for controlling the automatic performance device 1, particularly programs and data for changing the beat rhythm pattern.

The ROM 4 stores tone information for initial setting of automatic accompaniment as shown in FIG. 2, and the initial setting data is, as shown in FIG. 2, as initial setting data for bossa nova. It is composed of 14 bytes. The first byte of the initial setting data is the tone number of the chord part, the second byte is the tone number of the base part, the third to fifth bytes are the reference volume of each part, and the sixth to eighth bytes. Up to the byte, the omitted beat number of each part is stored, and the 10th byte, the 12th byte, and the 14th byte store the head address of the accompaniment sound data of each part.

The omitted beat number of each part of the above initial setting data indicates the number of beats of the first measure whose lower 4 bits indicate which beat of the first measure, and the upper 4 bits indicates the number of beats of the second measure. Indicates whether to omit. That is, in the present embodiment, as will be described later, the accompaniment is performed by repeating two measures,
The beats omitted in the measures and the second measure are made different, and the omitted beats in the first measure and the second measure are set separately for the lower 4 bits and the upper 4 bits.

Further, in the ROM 4, for example, as shown in FIG.
It is stored as a series of musical information for automatic accompaniment consisting of three parts of a rhythm, a chord and a bass in quadruple, and the ROM 4 stores such musical information for a plurality of music pieces. Although FIG. 4 shows the rhythm data, the chord data and the base data have the same data structure.

In this musical tone information, one note data is composed of 4 bytes each having an 8-bit length, and is arranged in chronological order. In each note data, the first byte is time data,
It is a numerical value counted from the beginning of the bar in eighth note units, which is the accompaniment sound resolution, and has data from 0 to 7. Therefore, when sounding at the same timing, this time data becomes the same time data. And the second measure is
By setting "1" to the most significant bit MSB of this time data, it is distinguished from the first measure. The second byte of note data is event data, and the third byte is note name data for chord data and base data, and instrument name data assigned to each note for rhythm data. The fourth byte of the note data is a velocity value for the note name in the third byte.

The CPU 3 controls each part of the automatic performance device 1 in accordance with the program in the ROM 4, and executes the processing as the automatic performance device 1, particularly, the beat elimination process when the number of beats is four or less.

The keyboard section 6 has a plurality of keys for inputting note information of a musical piece to be played. The keyboard section 6 includes a split key (S) for a keyboard area (accompaniment area) for inputting a chord name of an automatic accompaniment and a keyboard area for performing a manual performance.
(PLIT KEY), and the CPU 3
It is detected which of the keyboard areas is depressed, and when a key in the automatic accompaniment area is depressed, the chord name at the time of automatic accompaniment is determined.

The operation display unit 2 is provided with various keys and a display unit necessary for operating the automatic performance device 1. The keys of the operation display unit 2 include, for example, a rhythm variation of automatic accompaniment. A key for selecting a rhythm pattern (for example, bossa nova) for performing automatic accompaniment, a mode selection key for selecting an automatic accompaniment mode, and a beat mode key for switching between three beats and four beats are provided. . As a display unit of the operation display unit 2, for example, a liquid crystal display device is used, and information necessary for operating the automatic performance device 1 is displayed and output.

The tone generator 7 has a plurality of tone generation channels, generates tone signals based on tone data transferred from the CPU 3, and outputs the tone signals to the D / A converter 8.

The D / A converter 8 converts an input digital tone signal into an analog tone signal and outputs the analog tone signal to the amplifier 9.

The amplifier 9 amplifies an analog tone signal input from the D / A converter 8 and outputs the amplified tone signal to a speaker (not shown), and the speaker emits a tone based on the input tone signal. .

Next, the operation will be described.

The automatic performance device 1 is set to an automatic accompaniment mode by a key operation of the operation display unit 2, and when a rhythm pattern or a beat mode is selected, the selected rhythm pattern is automatically accompanied with the selected time signature. .

Hereinafter, this automatic accompaniment process will be described with reference to FIGS.
A description will be given based on FIG.

When the power is turned on, the automatic performance device 1
As shown in FIG. 5, an initialization process is performed, the key setting of the operation display unit 2 is scanned, and an initial value setting process corresponding to the key setting of the operation display unit 2 is performed (step S1).

For example, it is now set to the automatic accompaniment mode on the operation display unit 2, and bossa nova is used as a rhythm pattern.
If four beats are selected as the beat mode, the CPU 3
Distributes 4 ch for the chord part, 1 ch for the bass part, 4 ch for the rhythm part, and the remaining ch for the manual part with respect to the sound channel (ch) of the tone generator 7, and the boss nova rhythm shown in FIG. Is read from the ROM 4 and set in the initial setting area of each part of the RAM 5.

In particular, in this initial value setting process, among the initial setting data shown in FIG. 2, the code omitted beat number data is stored in the code omit register C_OMIT, the base omitted beat number data is stored in the base omit register B_OMIT, and the rhythm omitted beat number data is stored. To the rhythm omit register R_OM
Set to IT.

When the setting of the initial setting data is completed, C
The PU 3 takes in the key number (KNo.) Of the depressed key from the keyboard 6, compares the key number (KNo.) With the key number (KNo.) Of the split key (SPLIT KEY), and performs splitting. Key (SPLIT
KEY) is checked (step S2). That is, it is checked whether the key of the accompaniment area is depressed.

If NO in step S2, it is determined that the accompaniment key has not been depressed, and it is checked whether or not a flag START indicating whether automatic accompaniment has already been started is "1" (step S3).

If the flag START is not "1" in step S3, it is determined that the automatic accompaniment has not been started, and the process returns to step S2.

If YES in step S3, the process shifts to step S5 to check whether the sound generation flag EV is set (step S5).

The tone generation flag EV is set by a timer interrupt generation process shown in FIG. 6, and the timer interrupt generation process controls an address counter that determines the data address of the accompaniment sound corresponding to the generation timing and the beat mode.

<Timer Interrupt Generation Process> That is, as shown in FIG. 6, in this embodiment, the timer interrupt generation process is performed in synchronization with the timer interrupt at every eighth note timing. First, the sound generation flag EV is set and the address counter A
Increment D_COUNT (step T
1).

Then, the address counter AD_COUN
The value of T is compared with a time signature control value OV_COUNT for managing the bar set by the time signature, and it is checked whether the address counter AD_COUNT is larger than the time signature control value OV_COUNT (step T2).

Here, the time signature control value OV_COUN
As described later, T is set to “8” for quadruple, and “6” for triplet.

That is, in the present embodiment, the note resolution of the automatic accompaniment is an octet note. Therefore, in the case of four beats, when the timer interrupt occurs eight times, that is, when the value of the address counter AD_COUNT is 8, 1 Bar becomes 3
At the time of the beat, when the timer interrupt occurs six times, that is, when the value of the address counter AD_COUNT becomes 6
Is one bar.

When the answer to the determination of step T2 is NO, it is determined that the measure is in the middle of a measure, and the processing is terminated as it is.
, The rhythm offset register Rofs, the chord offset register Cofs, and the base offset register Bofs are each set to “0”, and the address counter AD_COUNT is set to “0”. The bar counter BR_COUNT is incremented by "1" (step T3).

Note that the bar counter BR_COUNT is
This is a counter that counts measures by incrementing the address counter AD_COUNT.

Next, the operation display section 2 is scanned to check whether the beat mode has been switched (step T).
4) If the beat mode has not been switched, the timer interrupt generation processing ends.

At step T4, if the beat mode is switched, it is checked whether the beat has been switched from triple to quadruple (step T5). If YES, the beat control value OV_COUNT is set to "8" and Then, the beat mode is set to 4 beats, and the timer interrupt generation processing ends (step T6).

If NO in step T5, it is determined that the time has been switched from four to three, and the time control value O
V_COUNT is set to "6", the beat mode is set to three beats, and the timer interrupt generation processing ends (step T7).

Returning to FIG. 5, whether or not the sound generation flag EV set by the timer interrupt generation processing is set in step S5, that is,
It is checked whether or not a timer interrupt has occurred (step S5). If the sound generation flag EV is not set, the process returns to step S2, and the key number (KNo.) Of the depressed key is changed to the key number of the split key (SPLIT KEY). Check whether it is smaller than KNo.).

If the determination in step S2 is YES, the chord name is determined from the key number (KNo.) Being pressed which has a smaller key number than the split key (SPLIT KEY) (step S4), and the tone generation flag EV is set. Check whether it is set (step S
5).

If the sound generation flag EV is set in step S5, it is determined that the timer interrupt has occurred and that the timer interrupt generation processing has been performed, the sound generation flag EV is cleared, and the measures formed in the RAM 5 are executed. Measure counter BR_COUN in register BAR
The logical product of the value of T and “01H” is set (step S
6) Check whether the bar register BAR is "0" (step S7).

That is, in this embodiment, the automatic accompaniment
This is a repetition of a bar. The least significant bit LSB of the value of the bar counter BR_COUNT is taken out by taking the logical product of the bar counter BR_COUNT and “01H” in the bar register BAR and set in the bar register BAR. Then, as shown in FIG. 4, the performance data is
In the first measure, the most significant bit MSB is “0” and 2
In the measure, since the most significant bit MSB is “1”, when the measure register BAR is “0”, it means the first measure. When the measure register BAR is “1”, the measure is the second measure. means.

Next, it is checked whether the beat mode is triple time (step S7).

Now, as described above, it is assumed that the time is set to 4 beats by the key operation of the operation display unit 2, so that the determination in step S7 is NO, and the rhythm time data comparison value register R_RDAD, code A mode 1 determination process of setting the values of the time data comparison value register C_RDAD and the base time data comparison value register B_RDAD for four beats is performed (step S8).

<Mode 1 determination process> Since the mode 1 determination process has four beats, it is not necessary to perform the process of omitting the beat, and the first byte and the time data in the accompaniment sound data as shown in FIG. Can be set as a comparison value.

That is, in the mode 1 determination processing, as shown in FIG. 7, first, the value of the bar register BAR is shifted to the left by 7 bits, and the result is stored in the A register in the RAM 5 (step M1).

The value of the A register and the address counter A
The logical sum with the value of D_COUNT is stored in the rhythm time data comparison value register R_RDAD, the code time data comparison value register C_RDAD, and the base time data comparison value register B_RDAD (steps M2 to M).
4).

Referring again to FIG. 5, when the rhythm time data comparison value register R_RDAD, the code time data comparison value register C_RDAD and the base time data comparison value register B_RDAD are set as described above, the rhythm time data comparison value register RO based on the values of R_RDAD, code time data comparison value register C_RDAD and base time data comparison value register B_RDAD
A data reading process for reading out the accompaniment sound data (sound generation data) of each part from M4 is performed (step S12), and the basic chord and the base part data are converted into the sound generation data based on the chord name determined in step S4 (step S4). Step S
13). The converted chord, base data and rhythm part data are transferred to each channel (c
h) (step S14) to generate an accompaniment sound.

<Data reading process> The data reading process for reading out the sound data in the above step S12 is shown in FIG.
Is performed as shown in FIG.

That is, in the data reading process, as described above, the rhythm time data comparison value register R_RDAD,
When the address data is stored in the code time data comparison value register C_RDAD and the base time data comparison value register B_RDAD, first, the first address of the rhythm data (the address set by the initial value setting process in step S1 of FIG. 5). Yes, the data shown in FIG. 2) is set in the rhythm address register R_AD (step D1),
"0" is set to the rhythm address counter R_CNT (step D2).

Then, the rhythm address register R_AD
The time data stored at the address obtained by adding the rhythm address counter R_CNT to the
It is stored in a register (step D3), and it is checked whether the read time data is "FF" which is data (final data) indicating a rhythm pattern end mark stored at the last address of the second measure (step D4). .

If it is not the last data in step D4, the added value of the rhythm address register R_AD and the rhythm address counter R_CNT is always the first byte of the accompaniment sound data as shown in FIG. Rhythm address counter R_CN
It is checked whether or not the value of the B register storing the added value of T matches the value of the rhythm time data comparison value register R_RDAD (step D5). If the value matches, the result of addition of the rhythm address register R_AD and the rhythm address counter R_CNT is obtained. Then, the data at the address obtained by adding "1", "2" and "3", that is, the second to fourth bytes of the accompaniment sound data at the address are read (step D6).

That is, if it is the readout timing of the data of the first beat of the first bar, steps D1 to D6
In the process (1), data corresponding to the time data of the first beat in the first bar is sequentially searched from the data of the head address and read out.

When the data reading is completed, the rhythm address counter R_CNT is incremented by "4" and the process returns to step D3. Similarly, the address obtained by adding the incremented rhythm address counter R_CNT and the value of the rhythm address register R_AD is obtained. Is read out and stored in the B register (step D3).

That is, as can be seen from FIG. 4, since the accompaniment data is stored as a set of 4 bytes, at step D7, the rhythm address counter R_CNT is incremented by "4" to thereby obtain the next accompaniment data. Is being read.

If the read time data is not the final data (FF) at step D4, it is checked whether the value of the B register matches the rhythm time data comparison value register R_RDAD (step D5). Then, the process proceeds to step D7 without reading the accompaniment data, increments the rhythm address counter R_CNT, and returns to step D3.

The above processing is sequentially repeated, and when the time data matches the final data (FF), the process proceeds to step D8, and the same data reading processing is performed on the code data in steps D8 to D14.

That is, the first address of the code data is set in the code address register C_AD (step D).
8), "0" is set to the code address counter C_CNT (step D9).

Then, the code address register C_AD
, The time data stored at the address obtained by adding the code address counter C_CNT to the B register (step D10), and the read time data indicates data indicating the code pattern end mark (final data).
Is checked (step D11).

If it is not the last data in step D11, it is checked whether the value of the B register matches the value of the code time data comparison value register C_RDAD (step D12), and if they match, the code address register C_AD and the code address counter C_CNT are checked. The data at the address obtained by adding "1", "2" and "3" to the result of the addition is read out (step D13).

When the reading of the data is completed, the code address counter C_CNT is incremented by "4" and the process returns to step D10, where the code address counter C_CNT and the value of the code address register C_AD are added and stored at the address. The read time data is read and stored in the B register (step D10).

At step D11, if the read time data is not the final data (FF), it is checked whether the value of the B register matches the code time data comparison value register C_RDAD (step D12). Without reading the
Proceeding to step D14, the code address counter C
After incrementing _CNT, step D10
Return to

The above processing is sequentially repeated, and when the time data coincides with the final data (FF), step D15
Then, the same data reading process is performed on the base data in steps D15 to D21.

That is, the first address of the base data is set in the base address register B_AD (step D).
15), “0” is set to the base address counter B_CNT (step D16).

Then, the base address register B_AD
Then, the time data stored at the address obtained by adding the base address counter B_CNT to the address is read and stored in the B register (step D17), and it is checked whether the read time data is the final data "FF" (step D17). D18).

If it is not the last data in step D18, it is checked whether the value of the B register matches the value of the base time data comparison value register B_RDAD (step D19), and if they match, the base address register B_AD and the base address counter B_CNT are checked. The data at the address obtained by adding "1", "2" and "3" to the result of the addition is read out (step D20).

When the data reading is completed, the base address counter B_CNT is incremented by "4", and the process returns to step D17. The data is stored at the address obtained by adding the incremented base address counter B_CNT and the value of the base address register B_AD. The read time data is stored in the B register (step D17).

In step D18, if the read time data is not the final data (FF), it is checked whether the value of the B register matches the base time data comparison value register B_RDAD (step D19). Without reading the
Proceeding to step D21, the base address counter B
After incrementing _CNT, step D17
Return to

The above processing is sequentially repeated, and when the time data matches the final data (FF), it is determined that reading of all data has been completed, and the data reading processing ends.

When the rhythm data, the chord data and the base data are sequentially read in this way, as shown in FIG. 5, the basic chord and the base part data of the read data are converted into the sound data based on the chord names. (Step S13), and the converted chord, base data and rhythm part data are transferred to each tone generation channel of the tone generator 7 and sounded (step S14).

When the tone generation process is performed in this way, the process returns to step S2, where the keyboard 6 is scanned, and when the key is depressed,
In the same manner as described above, it is checked whether the depressed key is a key in the accompaniment area (step S2). If it is a key in the accompaniment area, the split key (SPLIT KEY) is determined as described above.
The chord name is determined from the key number (KNo.) During key depression (step S4), and it is checked whether the sound generation flag EV is set (step S5). If the sound generation flag EV is not set, the process returns to step S2. If the sound generation flag EV is set, the sound generation flag EV is cleared, and the logical product of the bar counter BR_COUNT and “01H” is set in the bar register BAR. (Step S6).

Then, it is checked whether the beat mode is triple time (step S7). If the beat mode is quadruple, there is no need to omit the beat, so that the rhythm time data comparison value, code time data A mode 1 determination process for setting the comparison value and the base time data comparison value for four beats is performed (step S8).

Then, by operating the keys on the operation display unit 2,
The time signature is switched from quadruple to triple time, and step S7
If the judgment in step S1 is YES, it is checked whether or not the bar register BAR is "0", that is, whether or not the current accompaniment is the first bar (step S9).

That is, in this embodiment, as described above,
Since the beats omitted in the first measure and the second measure are different, it is checked in step S9 how many measures the current accompaniment is.

Since the time signature is switched from the beginning of the measure, if the time signature is switched in the middle of the measure, the time signature switching signal is held but the key of the operation display unit 2 When the operation is performed, the beat mode switching process is not immediately performed. As shown in FIG. 6, in the timer interrupt process of the CPU 3, the beat control value OV_COUNT is incremented and the beat mode is switched. (Steps T3 to T7).

In step S9, if the bar register BAR is "0", it is determined that the bar is the first bar, and the rhythm time data comparison value register R_RDAD, the code time data comparison value register C_RDAD, and the base time data comparison value register B_RDAD. Is set for the first measure of the triple time (step S10).

<Mode 2 deciding process> This mode 2 deciding process is a mode deciding process that involves omitting the beat of the first measure.
The processing is performed as shown in FIG.

That is, in the mode 2 decision processing, the logical sum of the value of the rhythm omit register R_OMIT set in the initial value setting processing in step S1 of FIG. 5 and “0FH” is obtained, and this logical sum is multiplied by “2”. It is checked whether or not the result obtained matches the value of the address counter AD_COUNT (step P1).

In step P1, if they do not match, it is determined that the beat is not the skipped beat, and the routine goes to step P3. If they match, it is determined that the beat is the skipped beat, and "2" is set in the rhythm offset Rofs (step P1). P2).

At step P3, the value obtained by multiplying the logical sum of the value of the rhythm omit register R_OMIT and "0FH" by "2" and further adding "1" matches the value of the address counter AD_COUNT. It is checked whether it is (Step P3).

In step P3, if they do not match, it is determined that the beat is not the skipped beat, and the routine goes to step P5. If they match, it is determined that the beat is the skipped beat, and "2" is set in the rhythm offset Rofs (step P3). P4).

Then, the address counter AD_COUN
The addition result obtained by adding the value of the rhythm offset Rofs to the value of T is stored in a rhythm time data comparison value register R_RDAD.
(Step P5).

That is, in the first measure, the lower 4 bits of the rhythm omitted beat number data stored in the rhythm omit register R_OMIT are the omitted beat data of the first measure, as described in FIG. Since the resolution is an eighth note, the lower 4 bits of the value of the rhythm omit register R_OMIT are extracted by taking the logical sum of the value of the rhythm omit register R_OMIT and “0FH”, and the lower 4 bits of the value of the rhythm omit register R_OMIT are obtained.
The beat corresponding to the value obtained by multiplying the bit by “2” and the beat corresponding to the value obtained by adding “1” to the multiplication result are the omitted beats.

Therefore, in step P1 and step P3, the above calculation result is stored in the address counter AD_COU.
It is checked whether or not the beat is an abbreviated beat according to whether the beat matches NT. At the time of the abbreviated beat, "2" is set to the rhythm offset Rofs set to "0" as an initial value (steps P2 and P4). The rhythm time data comparison value register R_R
It can be set to DAD.

Next, in steps P6 to P10, the same processing is performed on the code data.

That is, in the initial value set in step S1 of FIG. 5, the value obtained by multiplying the logical sum of the value of the code omit register C_OMIT in which the code omitted beat number data is set and “0FH” by “2” is the address. Counter AD
It is checked whether it matches _COUNT (step P6).

In step P6, when they match, it is determined that the beat is an omitted beat, the code offset Cofs is set to "2", and the routine goes to step P8 (step P7). And the process directly shifts to Step P8.

In step P8, it is checked whether the value obtained by multiplying the logical sum of the value of the code omit register C_OMIT and “0FH” by “2” and further adding “1” matches the value of the address counter AD_COUNT. (Step P8).

Then, in step P8, when they match, it is determined that the beat is omitted, and the code offset Cof is determined.
After "2" is set to s, the process shifts to step P10 (step P9). If the values do not match, it is determined that the beat is not an omitted beat, and the process directly shifts to step P10.

At step P10, the address counter AD
_COUNT is added to the value of the code offset Cofs, and the code time data comparison value register C_RDAD
(Step P10).

Further, from step P11 to step P1
In step 5, the same process is performed for the base data.

That is, in the initial value set in step S1 of FIG. 5, the value obtained by multiplying the logical sum of the value of the base omit register B_OMIT in which the base omitted beat number data is set and “0FH” by “2” is the address. Counter AD
It is checked whether or not it matches _COUNT (step P11).

In step P11, when they match, it is determined that the beat is the skipped beat, the base offset Bofs is set to "2", and the routine goes to step P13 (step P12). And the process directly proceeds to Step P13.

In step P13, it is checked whether or not the value obtained by multiplying the logical sum of the value of the base omit register B_OMIT and “0FH” by “2” and further adding “1” matches the value of the address counter AD_COUNT. (Step P13).

Then, in step P13, when they match, it is determined that the beat is omitted, and the base offset Bo is determined.
After "2" is set to fs, the flow shifts to step P15 (step P14). If they do not match, it is determined that the beat is not an omitted beat, and the flow directly shifts to step P15.

At step P15, the address counter AD
_COUNT and the value of base offset Bofs are added to the value of base time data comparison value register B_RDAD
(Step P15).

Returning to FIG. 5 again, when the mode 2 determination processing is completed in this manner, the rhythm time data comparison value register R_RDAD, the code time data comparison value register C_RDAD, and the base time data comparison set in the mode 2 determination processing are set. The tone data of each part is read from the ROM 4 based on the value of the value register B_RDAD (step S12).

However, the rhythm time data comparison value register R_RDAD, the code time data comparison value register C_RDAD, and the base time data comparison value register B_
As described in the mode 2 determination processing in FIG. 9, the address data set in the RDAD is omitted when the corresponding beat is omitted because the data is omitted and the next address data is set. It will be.

Based on the data read out while performing the beat elimination as described above, the data is converted into a code in steps S13 and S14 as described above, and is transferred to each channel of the tone generator 7, and is converted into a three-beat signal. The accompaniment of the first measure is performed.

If the value of the bar register BAR is not "0" in step S9, that is, if it is the second bar, the rhythm time data comparison value register R_
RDAD, code time data comparison value register C_RDA
A mode 3 determination process for setting the values of D and the base time data comparison value register B_RDAD for the second bar of the triple time is performed (step S11).

<Mode 3 deciding process> This mode 3 deciding process is a mode deciding process involving the omission of the beat in the second bar.
The processing is performed as shown in FIG.

That is, in the mode 3 determination processing, first,
The value obtained by shifting the value of the rhythm omit register R_OMIT set in the initial value setting process in step S1 of FIG. 5 to the right by 4 bits is set in the A register (step Q1).
1) It is checked whether the result of multiplying the value of the A register by "2" matches the value of the address counter AD_COUNT (step Q2).

In step Q2, if they do not match, it is determined that the beat is not the skipped beat, and the process proceeds to step Q4. If they match, it is determined that the beat is the skipped beat, and "2" is set in the rhythm offset Rofs (step 2). Q3).

Then, in step Q4, it is checked whether the operation result obtained by multiplying the A register by "2" and further adding "1" matches the value of the address counter AD_COUNT (step Q4).

In step Q4, if they do not match, it is determined that the beat is not the skipped beat, and the process proceeds to step Q6. If they match, it is determined that the beat is the skipped beat, and "2" is set in the rhythm offset Rofs (step S4). Q5).

Then, in step Q6, the logical sum of "80H" and the address counter AD_COUNT is calculated, the rhythm offset Rofs is added to the logical sum, and the result of the addition is stored in the rhythm time data comparison value register R_RDA.
D is set (step Q6).

That is, in the second measure, as described with reference to FIG. 2, of the rhythm omitted beat number data stored in the rhythm omit register R_OMIT, the upper four bits are the omitted beat data of the second measure, and Since the resolution is an eighth note, a value corresponding to a result obtained by multiplying the value of the rhythm omit register R_OMIT by 4 bits to the right by “2” and a value obtained by adding “1” to the result of multiplication by “2” Is the omitted beat.

Therefore, in step Q1, the value of the rhythm omit register R_OMIT is shifted to the right by 4 bits.
In step Q2 and step Q4, it is checked whether or not the result of multiplying the shifted rhythm omit register R_OMIT by "2" and the result of further adding "1" match the address counter AD_COUNT to determine whether or not the beat is omitted. Rhythm offset Rofs set to “0” as the initial value at the time of the beat
Is set to "2" (steps Q3 and Q5), so that the address of the next data can be set in the rhythm time data comparison value register R_RDAD by omitting the skipped beat.

Next, the code data is similarly processed in steps Q7 to Q12.

That is, in the initial value set in step S1 of FIG. 5, the value of the code omit register C_OMIT in which the chord omitted beat number data is set is shifted right by 4 bits and set in the A register (step Q1).
7) It is checked whether the value obtained by multiplying the value of the A register by "2" matches the value of the address counter AD_COUNT (step Q8).

At step Q8, when they match, it is determined that the beat is the skipped beat, and the code offset Cofs is set to "2". Then, the process goes to step Q10 (step Q9). And the process proceeds to Step Q10.

At step Q10, "1" is added to the result of multiplying the value of the A register by "2", and it is checked whether or not the addition result matches the value of the address counter AD_COUNT.

At step Q10, when they match, it is determined that the beat is omitted, and the code offset Co is determined.
After setting fs to “2”, the process proceeds to step Q12 (step Q11). If the values do not match, it is determined that the beat is not an omitted beat, and the process directly proceeds to step Q12.

In step Q12, the logical sum of "80H" and the value of the address counter AD_COUNT is obtained, the value of the code offset Cofs is added to the logical sum, and the addition result is stored in the code time data comparison value register C_RD.
Set to AD.

Further, from step Q13 to step Q1
In step 8, the same process is performed on the base data.

That is, in the initial value set in step S1 of FIG. 5, the value of the base omit register B_OMIT in which the base omitted beat number data is set is shifted right by 4 bits and stored in the A register (step Q13). ,
It is checked whether the value obtained by multiplying the value of the A register by “2” matches the address counter AD_COUNT (step Q14).

In step Q14, when they match, it is determined that the beat is the skipped beat, and the base offset Bofs is set to "2". Then, the process proceeds to step Q16 (step Q15). Is determined, and the process directly proceeds to step Q16.

At step Q16, it is checked whether or not the value obtained by multiplying the value of the A register by "2" and further adding "1" matches the value of the address counter AD_COUNT.

In step Q16, when they coincide with each other, it is determined that the beat is omitted, and the base offset Bo is determined.
After setting “2” to fs, the process proceeds to step Q18 (step Q17). If the values do not match, it is determined that the beat is not an omitted beat, and the process directly proceeds to step Q18.

In step Q18, the logical sum of "80H" and the value of the address counter AD_COUNT is obtained, the value of the base offset Bofs is added to the logical sum, and the result is set in the base time data comparison value register B_RDAD.

Returning to FIG. 5 again, when the mode 3 determination processing is completed in this way, the rhythm time data comparison value register R_RDAD, the code time data comparison value register C_RDAD, and the base time data comparison set in the mode 3 determination processing are set. The tone data of each part is read from the ROM 4 based on the value of the value register B_RDAD (step S12).

However, the rhythm time data comparison value register R_RDAD, the code time data comparison value register C_RDAD, and the base time data comparison value register B_
When the address data set in the RDAD corresponds to the skipped beat as described in the mode 3 determination processing in FIG. 10, the beat is omitted because the data is omitted and the next address data is set. It will be.

Based on the data read out with the beat omitted, the code is converted into a code in steps S13 and S14 as described above, and transferred to each channel of the tone generator 7, and is converted into a triple beat. The accompaniment of the first measure is performed.

As described above, only the accompaniment data of four beats is stored in the ROM 4 as the accompaniment data, and the abbreviated beats suitable for the time signature rhythm pattern are stored. The beat can be omitted based on the omitted beat suitable for the beat rhythm pattern stored in advance. Therefore, it is possible to reduce the size of the automatic performance device capable of performing a natural accompaniment without a sense of incongruity in music without using a large-capacity storage device, and to reduce the size of the automatic performance device at a low cost. it can.

Further, since the skipped beats are stored in the ROM 4 for each bar and each part of the music for automatic accompaniment, beats suitable for each bar and each part can be omitted, so that the music is more natural. Accompaniment can be performed.

[0135] In the above embodiment, the omitted beat is
Although it is assumed that the skipped beat is stored in the ROM 4 in advance, the skipped beat may be appropriately set by a key operation of the operation display unit 2. In this case, the skipped beat is stored in the RAM 5.

[0136]

According to the present invention, the musical tone information of a specific beat is stored and an abbreviated beat suitable for a rhythm pattern of a specific time or less is stored, without using a large-capacity storage means. An automatic performance device capable of performing a natural accompaniment without musical discomfort even in a time signature rhythm pattern of a specific time signature or less can be provided in a small size and at low cost.

Further, by storing the omitted beat for each bar or each part, a more natural musical accompaniment can be performed.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram of an embodiment of an automatic performance device according to the present invention.

FIG. 2 is a view showing an example of initial setting data stored in a ROM of FIG. 1;

FIG. 3 is a view showing musical notes corresponding to accompaniment data stored in the ROM of FIG. 1;

FIG. 4 is a view showing an example of accompaniment data stored in a ROM of FIG. 1;

FIG. 5 is a flowchart showing automatic accompaniment processing by the automatic performance device of FIG. 1;

FIG. 6 is a flowchart showing a timer interrupt generation process by the automatic performance device of FIG. 1;

FIG. 7 is a flowchart showing a detailed process of a mode 1 determination process of FIG. 5;

FIG. 8 is a flowchart showing a detailed process of a data reading process of FIG. 5;

FIG. 9 is a flowchart showing a detailed process of a mode 2 determination process in FIG. 5;

FIG. 10 is a flowchart showing a detailed process of a mode 3 determination process in FIG. 5;

[Explanation of symbols]

 Reference Signs List 1 automatic performance device 2 operation display unit 3 CPU 4 ROM 5 RAM 6 keyboard unit 7 tone generation unit 8 D / A converter 9 amplifier

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G10H 1/36 G10H 1/38 G10H 1/40 G10H 1/00 102

Claims (3)

(57) [Claims] 1. A musical performance information storage means for storing a series of musical tone information comprising a plurality of beats; an abbreviated beat memory means for storing an abbreviated beat of the musical tone information stored in the musical performance information storing means; A timing signal generating means, a time signature selecting means for selecting a time signature, reading the musical tone information from the performance information storage means in accordance with the timing signal output from the timing signal generating means, and a time signature of the selection result of the time signature selecting means. Determining whether there is an abbreviated beat, and when there is an abbreviated beat, reading means for skipping tone information corresponding to the abbreviated beat data stored in the abbreviated beat storage means, and a tone based on the tone information read by the reading means. And a musical sound generation instructing means for instructing the generation of a musical tone. 2. The automatic performance apparatus according to claim 1, wherein said omitted beat storage means stores an omitted beat for each bar. 3. The performance information storage means stores a series of musical tone information comprising a plurality of parts, and the skipped beat storage means stores skipped beats for each of the parts. Item 2. The automatic performance device according to Item 2.