JP3265720B2 - Spin coating apparatus and semiconductor device manufacturing method - Google Patents

Spin coating apparatus and semiconductor device manufacturing method

Info

Publication number
JP3265720B2
JP3265720B2 JP15655593A JP15655593A JP3265720B2 JP 3265720 B2 JP3265720 B2 JP 3265720B2 JP 15655593 A JP15655593 A JP 15655593A JP 15655593 A JP15655593 A JP 15655593A JP 3265720 B2 JP3265720 B2 JP 3265720B2
Authority
JP
Japan
Prior art keywords
semiconductor device
film
spin
insulating film
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP15655593A
Other languages
Japanese (ja)
Other versions
JPH0737880A (en
Inventor
守雄 塩原
利幸 石田
光彦 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15655593A priority Critical patent/JP3265720B2/en
Publication of JPH0737880A publication Critical patent/JPH0737880A/en
Application granted granted Critical
Publication of JP3265720B2 publication Critical patent/JP3265720B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、層間絶縁膜の平坦化に
係り、特にスピン塗布装置及び半導体装置の製造方法の
改良に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to flattening of an interlayer insulating film, and more particularly to improvement of a spin coating apparatus and a method of manufacturing a semiconductor device.

【0002】近年の半導体装置は微細化が急速に進行し
ているために、露光装置の焦点深度が急速に浅くなって
おり、特に多層配線を有する半導体装置における基板全
体の段差、即ちグローバル段差を小さくすることが必要
になっている。
2. Description of the Related Art Recent semiconductor devices have been rapidly miniaturized, and the depth of focus of an exposure apparatus has been rapidly reduced. Particularly, in a semiconductor device having a multi-layer wiring, a step of the entire substrate, that is, a global step has been reduced. It needs to be smaller.

【0003】以上のような状況から、グローバル段差を
小さくすることが可能なスピン塗布装置及び半導体装置
の製造方法が要望されている。
In view of the above circumstances, there is a need for a spin coating apparatus and a semiconductor device manufacturing method capable of reducing the global step.

【0004】[0004]

【従来の技術】従来のスピン塗布装置について図3によ
り、従来の半導体装置の製造方法について図4により詳
細に説明する。
2. Description of the Related Art A conventional spin coating apparatus will be described in detail with reference to FIG. 3, and a conventional method of manufacturing a semiconductor device will be described in detail with reference to FIG.

【0005】図3は従来のスピン塗布装置を示す図、図
4は従来の半導体装置の製造方法を工程順に示す側断面
図である。従来のスピン塗布装置は図3に示すように、
被塗布物、例えば半導体基板5を載置して固定するスピ
ンチャック11をカップ12の中心に設け、このスピンチャ
ック11の上方に塗布液を滴下するノズル13を設けたもの
である。
FIG. 3 is a view showing a conventional spin coating apparatus, and FIG. 4 is a side sectional view showing a conventional semiconductor device manufacturing method in the order of steps. As shown in FIG.
A spin chuck 11 for mounting and fixing an object to be coated, for example, a semiconductor substrate 5, is provided at the center of a cup 12, and a nozzle 13 for dropping a coating liquid is provided above the spin chuck 11.

【0006】このようなスピン塗布装置を用いて塗布液
を半導体基板5の表面に塗布するには、まず半導体基板
5をスピンチャック11に載置して真空で吸着して固定
し、所定量の塗布液をノズル13から半導体基板5の表面
に滴下した後、スピンチャック11を低速回転させて塗布
液を半導体基板5の全表面にゆきわたらせた後、スピン
チャック11を高速回転させて所定の膜厚の塗布液を半導
体基板5の表面に形成する装置である。
In order to apply a coating solution to the surface of the semiconductor substrate 5 by using such a spin coating apparatus, first, the semiconductor substrate 5 is placed on a spin chuck 11 and fixed by suction in a vacuum, and a predetermined amount is fixed. After the coating liquid is dropped from the nozzle 13 onto the surface of the semiconductor substrate 5, the spin chuck 11 is rotated at a low speed to spread the coating liquid over the entire surface of the semiconductor substrate 5. This is an apparatus for forming a thick coating liquid on the surface of the semiconductor substrate 5.

【0007】このようなスピン塗布装置を用いて塗布液
の薄膜を半導体基板5の表面に形成すると、周辺部の膜
厚が中央部の膜厚よりも薄くなる。従来の半導体装置の
製造方法においては、まず図4(a) に示すように半導体
基板5の表面に形成した配線層17を被覆する絶縁膜16a
を形成した後、スピンオングラス膜(以下、SOG膜と
略称する)16bを塗布して形成する。
When a thin film of a coating solution is formed on the surface of the semiconductor substrate 5 by using such a spin coating apparatus, the peripheral portion has a smaller thickness than the central portion. In the conventional method of manufacturing a semiconductor device, first, as shown in FIG. 4A, an insulating film 16a covering a wiring layer 17 formed on the surface of a semiconductor substrate 5 is formed.
Is formed, and a spin-on-glass film (hereinafter abbreviated as SOG film) 16b is applied to form a film.

【0008】つぎに図4(b) に示すように四弗化炭素
(CF4)を用いるドライエッチング、或いは弗化水素系
のエッチング液を用いるウエットエッチングにより全面
のバックエッチを行うと、配線層17の表面のSOG膜16
b もそれ以外の領域のSOG膜16b も同じエッチングレ
ートを有しているので、配線層17の表面の絶縁膜16a と
それ以外の領域のSOG膜16b との間に段差Hが生じ
る。
Next, as shown in FIG. 4B, when the entire surface is back-etched by dry etching using carbon tetrafluoride (CF 4 ) or wet etching using a hydrogen fluoride-based etching solution, the wiring layer is formed. SOG film 16 on the surface of 17
Since b and the SOG film 16b in the other region have the same etching rate, a step H occurs between the insulating film 16a on the surface of the wiring layer 17 and the SOG film 16b in the other region.

【0009】ついで、図4(c) に示すようにSOG膜16
b の表面にCVD膜18を形成した後図5(a) に示すよう
に第2の配線層27の表面に第2の絶縁膜26a を形成し、
第2のSOG膜26b を形成した後、同様にエッチバック
を行うと、第2の絶縁膜26aとそれ以外の第2のSOG
膜26b との間に段差2Hが生じるようになる。
Next, as shown in FIG.
After the CVD film 18 is formed on the surface of b, a second insulating film 26a is formed on the surface of the second wiring layer 27 as shown in FIG.
After the second SOG film 26b is formed, if the etch back is performed in the same manner, the second insulating film 26a and the other second SOG film
A step 2H is formed between the film 26b.

【0010】[0010]

【発明が解決しようとする課題】以上説明した従来のス
ピン塗布装置においては、スピンチャックに半導体基板
を真空で吸着して固定し、スピンチャックを高速で回転
させて塗布液の薄い膜を形成するから、周辺部の塗布液
が飛散して塗布液の膜厚分布が中央部の膜厚が周辺部の
膜厚よりも厚くなるという問題点がある。また、層間絶
縁膜をバックエッチする場合にSOG膜のエッチングレ
ートが全面で同一のために、配線層の表面の絶縁膜とそ
れ以外の領域の層間絶縁膜のSOG膜の表面との段差が
多層配線になると累積され、図6に示すように上層の配
線層のパターニングに用いる段差の低い部分のレジスト
が未感光のまま残留するという問題点があった。
In the conventional spin coating apparatus described above, the semiconductor substrate is suction-fixed to the spin chuck by vacuum, and the spin chuck is rotated at a high speed to form a thin film of the coating solution. Therefore, there is a problem that the coating liquid in the peripheral portion is scattered and the film thickness distribution of the coating liquid becomes thicker in the central portion than in the peripheral portion. Further, since the etching rate of the SOG film is the same over the entire surface when the interlayer insulating film is back-etched, the step between the surface of the insulating film on the surface of the wiring layer and the surface of the SOG film of the interlayer insulating film in the other region is multi-layered. As shown in FIG. 6, there is a problem that the resist is accumulated in the wiring, and the resist in the low step portion used for patterning the upper wiring layer remains unexposed as shown in FIG.

【0011】本発明は以上のような状況から、塗布液の
膜厚分布を均一にすることが可能となるスピン塗布装置
及び層間絶縁膜の大きな段差が生じるのを簡単且つ容易
に防止することが可能となる半導体装置の製造方法の提
供を目的としたものである。
In view of the above situation, the present invention makes it possible to easily and easily prevent a spin coating apparatus capable of making the film thickness distribution of a coating solution uniform and a large step of an interlayer insulating film from being generated. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can be used.

【0012】[0012]

【課題を解決するための手段】本発明のスピン塗布装置
は、被塗布物を載置して吸着する吸着部と、この被塗布
物の外形と略等しい内法を有し且つ前記吸着部に吸着さ
れた被塗布物の表面より高さの高い枠と、この枠の中心
に設けたこの吸着部とこの枠とを結合する支持部とから
なるスピンチャックを具備するように構成する。
Spin coating apparatus of the present invention SUMMARY OF THE INVENTION comprises a suction unit for sucking and mounting the object to be coated, in and the suction portion has a substantially equal inner size as the outer shape of the object to be coated Adsorbed
A spin chuck including a frame having a height higher than the surface of the object to be coated and a supporting portion provided at the center of the frame and connecting the suction portion and the frame is provided.

【0013】本発明の半導体装置の製造方法は、絶縁膜
とスピンオングラス膜とを積層した層間絶縁膜を備えた
多層配線を有する半導体装置の前記層間絶縁膜の前記
ピンオングラス膜をエッチングによりエッチバックする
半導体装置の製造方法において、前記配線層が形成され
ている領域以外の領域の前記スピンオングラス膜にエネ
ルギー線を照射した後、前記エッチバックを行うように
構成する。
[0013] The method of manufacturing a semiconductor device of the present invention, the scan <br/> pin-on-glass of the interlayer insulating film of a semiconductor device having a multilayer wiring with an interlayer insulating film formed by laminating an insulating film and the spin-on-glass film In a method of manufacturing a semiconductor device in which a film is etched back by etching, the wiring layer is formed.
Energy in the spin-on-glass film in the region other than the region
After the irradiation with the energy beam, the etch back is performed .

【0014】[0014]

【作用】即ち本発明においては、半導体基板(被塗布
物)を載置して吸着する吸着部と、前記半導体基板の外
形と略等しい内法を有し且つ前記吸着部に吸着された半
導体基板の表面より高さの高い枠と、この枠の中心に設
けた前記吸着部と前記枠とを結合する支持部とからなる
スピンチャックを具備することを特徴とするスピン塗布
装置を用いて塗布液を半導体装置の表面に形成するの
で、従来半導体基板の周囲から飛散していた塗布液を枠
の内周面によって反射させることによって、前記塗布液
半導体基板の周辺部に残留させることが可能となるの
で、半導体基板の中央部と周辺部の塗布液の膜厚のばら
つきを減少させることが可能となる。また、絶縁膜とS
OG膜とを積層した層間絶縁膜を備えた多層配線を有す
る半導体装置の前記層間絶縁膜の前記SOG膜をエッチ
ングによりエッチバックする半導体装置の製造方法にお
いて、前記配線層が形成されている領域以外の領域の前
記SOG膜にエネルギー線を照射した後、エッチバック
を行うから、このエネルギー線が照射されている領域の
エッチングレートが著しく低下し、配線層の表面の絶縁
膜上のSOG膜がエッチングされても、前記エッチング
レートが低下したSOG膜は殆どエッチングされないの
で、照射されない配線層領域のSOG膜と領域のSOG
膜との高さの差が小さくなって基板全体からみた層間絶
縁膜の表面を平坦にすることが可能となる。
According to the present invention, a semiconductor substrate (coated
A suction unit for sucking by placing an object), the has a substantially equal inner size as the outer shape of the semiconductor substrate and the sucked by the suction unit half
Using a tall than the surface of the conductive substrate of the frame, a spin coating apparatus characterized by comprising a spin chuck comprising a supporting portion for coupling the frame to the suction portion provided at the center of the frame Since the coating liquid is formed on the surface of the semiconductor device, the coating liquid that has been scattered from around the
The coating liquid is reflected by the inner peripheral surface of the coating liquid.
Since the it is possible to remain on the periphery of the semiconductor substrate, it is possible to reduce the film thickness variation of the coating solution of the central portion and the peripheral portion of the semiconductor substrate. In addition, the insulating film and S
Etching the SOG film of the interlayer insulating film of a semiconductor device having a multilayer wiring with an interlayer insulating film formed by laminating and OG film
In the method of manufacturing a semiconductor device which is etched back by etching , a region before the region other than the region where the wiring layer is formed is formed.
Etch back after irradiating the SOG film with energy rays
Since performing this energy rays is remarkably decreased etching rate of the region irradiated, also SOG film on the insulating film on the surface of the wiring layer is etched, the SOG film that the etching rate is lowered is hardly etched Therefore, the SOG film in the wiring layer region not irradiated and the SOG film in the region are not irradiated.
The difference in height from the film is reduced , and the surface of the interlayer insulating film as viewed from the entire substrate can be made flat.

【0015】[0015]

【実施例】以下図1〜図2により本発明の一実施例につ
いて詳細に説明する。図1は本発明による一実施例のス
ピン塗布装置を示す図、図2は本発明による一実施例の
半導体装置の製造方法を工程順に示す側断面図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to FIGS. FIG. 1 is a view showing a spin coating apparatus according to one embodiment of the present invention, and FIG. 2 is a side sectional view showing a method of manufacturing a semiconductor device according to one embodiment of the present invention in the order of steps.

【0016】本発明の一実施例のスピン塗布装置は図1
に示すように、被塗布物、例えば半導体基板5を載置し
吸着し固定する吸着部1aと、半導体基板5の外形と略
等しい内法を有し且つこの吸着部1aに吸着された半導体
基板5の表面より高さの高い枠1bと、この枠1bの中心に
設けたこの吸着部1aとこの枠1bとを結合する支持部1cと
からなるスピンチャック1をカップ2の中心に設け、こ
のスピンチャック1の上方に塗布液を滴下するノズル3
を設けたものである。塗布液の反射による半導体基板5
の裏面の汚染を洗浄するために洗浄用ノズル4を設けて
いる。
FIG. 1 shows a spin coating apparatus according to an embodiment of the present invention.
As shown in FIG. 1, an adsorbing portion 1a on which an object to be coated, for example, a semiconductor substrate 5 is placed and adsorbed and fixed, and a semiconductor having an inner method substantially equal to the outer shape of the semiconductor substrate 5 and adsorbed by the adsorbing portion 1a
A spin chuck 1 including a frame 1b higher than the surface of the substrate 5 and a supporting portion 1c for connecting the suction portion 1a provided at the center of the frame 1b and the frame 1b is provided at the center of the cup 2. A nozzle 3 for dropping a coating liquid above the spin chuck 1
Is provided. Semiconductor substrate 5 due to reflection of coating liquid
Is provided with a cleaning nozzle 4 for cleaning contamination on the back surface of the substrate.

【0017】このようなスピン塗布装置を用いて塗布液
を半導体基板5の表面に塗布するには、まず半導体基板
5をスピンチャック1に載置して真空で吸着して固定
し、所定量の塗布液をノズル3から半導体基板5の表面
に滴下した後、スピンチャック1を低速回転させて塗布
液を半導体基板5の全表面にゆきわたらせた後、スピン
チャック1を高速回転させて所定の膜厚の塗布液を半導
体基板5の表面に形成し、半導体基板5の裏面の汚染を
洗浄用ノズルから噴出するレジスト除去液により洗浄す
る。
In order to apply a coating solution onto the surface of the semiconductor substrate 5 using such a spin coating apparatus, first, the semiconductor substrate 5 is placed on the spin chuck 1 and fixed by suction and fixed in a vacuum. After the coating liquid is dropped from the nozzle 3 onto the surface of the semiconductor substrate 5, the spin chuck 1 is rotated at a low speed to spread the coating liquid over the entire surface of the semiconductor substrate 5. A thick coating liquid is formed on the front surface of the semiconductor substrate 5, and the back surface of the semiconductor substrate 5 is cleaned with a resist removing liquid jetted from a cleaning nozzle.

【0018】このようなスピン塗布装置により塗布液を
半導体基板5の表面に塗布すると、従来半導体基板5の
周囲から飛散していた塗布液を枠1bの内周面によって反
射させることによって半導体基板5の周辺部に残留させ
ることが可能となるので、半導体基板5の中央部と周辺
部の膜厚のばらつきを減少させることが可能となる。
When the coating liquid is applied to the surface of the semiconductor substrate 5 by such a spin coating apparatus, the coating liquid, which has been scattered from the periphery of the semiconductor substrate 5 in the related art, is reflected by the inner peripheral surface of the frame 1b , whereby the semiconductor substrate 5 Can be left at the peripheral portion of the semiconductor substrate 5, so that the variation in the film thickness between the central portion and the peripheral portion of the semiconductor substrate 5 can be reduced.

【0019】本発明による一実施例の半導体装置の製造
方法においては、まず図2(a) に示すように半導体基板
5の表面に形成した配線層7を被覆する絶縁膜6aを形成
した後、SOG膜6bを塗布して形成する。
In the method of manufacturing a semiconductor device according to one embodiment of the present invention, first, as shown in FIG. 2A, an insulating film 6a covering the wiring layer 7 formed on the surface of the semiconductor substrate 5 is formed. The SOG film 6b is formed by coating.

【0020】つぎに図2(b) に示すように配線用のマス
クのパターンと同じパターンのマスク8を用いてエネル
ギー線、例えば紫外線を照射する。ついで図2(c) に示
すように四弗化炭素(CF4 )を用いるドライエッチン
グ、或いは四弗化水素系のエッチング液を用いるウエッ
トエッチングにより全面のバックエッチを行うと、紫外
線が照射された領域のSOG膜6bのエッチングレートが
極端に低下するので、配線層7の表面の絶縁膜6aの表面
のSOG膜6bのみが除去される。
Next, as shown in FIG. 2B, energy rays, for example, ultraviolet rays are irradiated using a mask 8 having the same pattern as that of the wiring mask. Then, as shown in FIG. 2C, when the entire surface was back-etched by dry etching using carbon tetrafluoride (CF 4 ) or wet etching using a hydrogen tetrafluoride-based etching solution, ultraviolet rays were irradiated. Since the etching rate of the SOG film 6b in the region is extremely reduced, only the SOG film 6b on the surface of the insulating film 6a on the surface of the wiring layer 7 is removed.

【0021】このように配線層7の表面のSOG膜6b以
外の領域のSOG膜6bに紫外線を照射してエッチングレ
ートを著しく低下させているので、SOG膜6bのエッチ
バックを行う場合に、紫外線が照射されていない領域の
SOG膜6bのみがエッチバックされて表面を平坦にする
ことが可能となる。
As described above, since the etching rate is significantly reduced by irradiating the SOG film 6b in the region other than the SOG film 6b on the surface of the wiring layer 7 with the ultraviolet light, when the SOG film 6b is etched back, Only the SOG film 6b in the region not irradiated with is etched back, and the surface can be made flat.

【0022】本実施例においては、エネルギー線として
紫外線を用いたが、紫外線以外の電子線を用いてSOG
膜6bのエッチングレートを低下させることも可能であ
る。
In this embodiment, ultraviolet rays are used as energy rays, but SOG is performed using an electron beam other than ultraviolet rays.
It is also possible to reduce the etching rate of the film 6b.

【0023】[0023]

【発明の効果】以上の説明から明らかなように、本発明
によれば極めて簡単なスピン塗布装置の改良と、半導体
装置の製造方法の改良により層間絶縁膜の平坦化を行う
ことが可能となる利点があり、著しい信頼性向上の効果
が期待できるスピン塗布装置及び半導体装置の製造方法
の提供が可能である。
As is apparent from the above description, according to the present invention, it is possible to flatten an interlayer insulating film by improving a very simple spin coating apparatus and improving a method of manufacturing a semiconductor device. It is possible to provide a spin coating apparatus and a method for manufacturing a semiconductor device, which have advantages and can be expected to significantly improve the reliability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明による一実施例のスピン塗布装置を示
す図
FIG. 1 is a diagram showing a spin coating apparatus according to an embodiment of the present invention.

【図2】 本発明による一実施例の半導体装置の製造方
法を工程順に示す側断面図
FIG. 2 is a side sectional view showing a method of manufacturing a semiconductor device according to one embodiment of the present invention in the order of steps;

【図3】 従来のスピン塗布装置を示す図FIG. 3 shows a conventional spin coating apparatus.

【図4】 従来の半導体装置の製造方法を工程順に示す
側断面図(1)
FIG. 4 is a side sectional view showing a conventional method of manufacturing a semiconductor device in the order of steps (1).

【図5】 従来の半導体装置の製造方法を工程順に示す
側断面図(2)
FIG. 5 is a side sectional view showing a conventional method of manufacturing a semiconductor device in the order of steps (2).

【図6】 従来の半導体装置の製造方法の問題点を示す
側断面図
FIG. 6 is a side sectional view showing a problem of a conventional method of manufacturing a semiconductor device.

【符号の説明】[Explanation of symbols]

1 スピンチャック 1a 吸着部 1b 枠 1c 支持部 2 カップ 3 ノズル 4 洗浄用ノズル 5 半導体基板 6 層間絶縁膜 6a 絶縁膜 6b SOG膜 7 配線層 8 マスク DESCRIPTION OF SYMBOLS 1 Spin chuck 1a Suction part 1b Frame 1c Support part 2 Cup 3 Nozzle 4 Cleaning nozzle 5 Semiconductor substrate 6 Interlayer insulating film 6a Insulating film 6b SOG film 7 Wiring layer 8 Mask

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭52−155058(JP,A) 特開 昭60−50939(JP,A) 特開 昭61−1027(JP,A) 特開 平1−164034(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/316 H01L 21/3065 H01L 21/3205 H01L 21/768 ──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-52-155058 (JP, A) JP-A-60-50939 (JP, A) JP-A-61-1027 (JP, A) JP-A-1- 164034 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 21/316 H01L 21/3065 H01L 21/3205 H01L 21/768

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 被塗布物を載置して吸着する吸着部と、 前記被塗布物の外形と略等しい内法を有し且つ前記吸着
部に吸着された被塗布物の表面より高さの高い枠と、 前記枠の中心に設けた前記吸着部と前記枠とを結合する
支持部と、 からなるスピンチャックを具備することを特徴とするス
ピン塗布装置。
An adsorbing section for mounting and adsorbing an object to be coated, an adsorbing section having an inner method substantially equal to an outer shape of the object to be applied, and
A frame having a height higher than the surface of the object adsorbed to the portion, and a support portion provided at the center of the frame and coupling the attraction portion and the frame, comprising a spin chuck comprising: Spin coating equipment.
【請求項2】 絶縁膜とスピンオングラス膜とを積層し
た層間絶縁膜を備えた多層配線を有する半導体装置の前
記層間絶縁膜の前記スピンオングラス膜をエッチング
よりエッチバックする半導体装置の製造方法において、前記配線層が形成されている領域以外の領域の前記スピ
ンオングラス膜にエネルギー線を照射した後、前記エッ
チバックを行う ことを特徴とする半導体装置の製造方
法。
2. A semiconductor device having a multilayer wiring including an interlayer insulating film in which an insulating film and a spin-on-glass film are stacked, wherein the spin-on-glass film of the interlayer insulating film is etched back by etching. In the manufacturing method, the spin in a region other than the region where the wiring layer is formed is formed.
After irradiating the on-glass film with energy rays,
A method for manufacturing a semiconductor device, comprising: performing chipback .
JP15655593A 1993-06-28 1993-06-28 Spin coating apparatus and semiconductor device manufacturing method Expired - Fee Related JP3265720B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15655593A JP3265720B2 (en) 1993-06-28 1993-06-28 Spin coating apparatus and semiconductor device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15655593A JP3265720B2 (en) 1993-06-28 1993-06-28 Spin coating apparatus and semiconductor device manufacturing method

Publications (2)

Publication Number Publication Date
JPH0737880A JPH0737880A (en) 1995-02-07
JP3265720B2 true JP3265720B2 (en) 2002-03-18

Family

ID=15630360

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15655593A Expired - Fee Related JP3265720B2 (en) 1993-06-28 1993-06-28 Spin coating apparatus and semiconductor device manufacturing method

Country Status (1)

Country Link
JP (1) JP3265720B2 (en)

Also Published As

Publication number Publication date
JPH0737880A (en) 1995-02-07

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