JP3265297B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD [0001] The invention disclosed in the present specification is:
The present invention relates to a semiconductor device using a crystalline silicon film and a manufacturing method thereof. For example, the present invention relates to a thin film transistor using a crystalline silicon film formed over a glass substrate or a quartz substrate and a method for manufacturing the thin film transistor. Further, the present invention relates to a structure of a semiconductor device using a crystalline silicon film and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, a technique has been known in which a silicon film is formed on a glass substrate or a quartz substrate by a plasma CVD method or a low pressure thermal CV method, and a thin film transistor is manufactured using the silicon film. This technique is used not only when a glass substrate or a quartz substrate is used, but also when an integrated circuit using a single crystal silicon wafer is used to realize a multilayer structure.

In particular, research has been made on a technique using the thin film transistor in an active matrix type liquid crystal display device (LCD).

In general, it is difficult to obtain a single crystal silicon film by a method such as a vapor phase method or a vapor deposition method. (Some technologies can be implemented in small areas, but they are not common.)

Therefore, a plasma CVD method or a low pressure thermal CVD
A technique of forming an amorphous silicon film (amorphous silicon film) by a method and crystallizing the same by heating or irradiation with laser light is used.

A technique generally used to obtain a crystalline silicon film is a technique in which a quartz substrate is used as a substrate and an amorphous silicon film formed on the quartz substrate is crystallized by heating. In this method, the heating is 900
The amorphous silicon film is transformed into a crystalline silicon film by performing the process at a high temperature of 1 ° C. to 1100 ° C.

However, the quartz substrate is expensive, and there is a problem in using it for a liquid crystal display device which is required to be reduced in price. On the other hand, there is also a technique using a glass substrate as a substrate. However, since the glass substrate has low heat resistance, the high temperature treatment as described above cannot be performed, and the required crystallinity cannot be obtained at present.

The heat-resistant temperature of the glass substrate is about 600 to 750 ° C., depending on the type. Therefore, it is necessary to obtain a crystalline silicon film having the required characteristics by a process at or below this temperature.

By irradiating a laser beam,
There is known a technique for transforming an amorphous silicon film into a crystalline silicon film. According to this technique, the amorphous silicon film can be transformed into a crystalline silicon film with little thermal damage to the substrate. However, there is a problem in the stability of the laser oscillator and the uniformity on the irradiation surface, and there is a problem in industrial use.

As a method of solving this problem, there is a method of using both heat treatment and laser beam irradiation in order to increase a process margin. However, when the heat treatment is used together, the above-mentioned problem of the high processing temperature occurs, so that it is also difficult to use a glass substrate.

As a technique for solving such a problem, a technique described in Japanese Patent Application Laid-Open No. 07-074366 is known. This technique is a technique of crystallizing an amorphous silicon film at a process temperature of 600 ° C. or less using a metal element that promotes crystallization of silicon.

In this technique, there are two modes of crystal growth. One is vertical growth (which proceeds in a direction perpendicular to the substrate) occurring in a region to which a metal element is added. The second is lateral growth in which crystal growth proceeds from the region to the periphery (crystal growth proceeds in a direction parallel to the substrate).

The vertical growth is characterized in that a crystalline silicon film can be obtained at a lower temperature (the crystallization temperature can be lowered by about 50 ° C.) as compared with simple heating, and the process is relatively simple. However, there is a problem that the concentration of the metal element tends to increase and the segregation of the metal element.

[0014] The segregation of the metal element causes a large variation in the characteristics of the obtained semiconductor device. In addition, this also causes an increase in leakage current when a thin film transistor is manufactured.

On the other hand, the region due to the lateral growth has the significance that the film quality is good and the concentration of the metal element in the region is low (relatively relatively low).
However, when a plurality of the lateral growth regions are selectively formed,
They collide with each other to form a grain boundary or hinder the growth of other regions.

In particular, since a nickel silicide component is formed at the crystal grain boundary, if the region overlaps with the active layer of the thin film transistor, the characteristics of the thin film transistor will be greatly impaired. Further, it is clear that the lateral growth regions having different origins have different crystal growth forms, and for example, the signal intensity indicating each crystal orientation is different even in measurement by X-ray diffraction.

This causes problems such as the characteristics of each thin-film transistor being varied when a large number of thin-film transistors must be manufactured on a substrate, and malfunctioning when a circuit is formed.

Since the circuit structure will be more and more integrated in the future, collision and interference between the lateral growth regions will be a serious problem.

Further, if the growth direction is different, the characteristics of the obtained device are likely to be different, which causes a problem when a circuit having a predetermined function is constituted by a plurality of devices.

[0020]

SUMMARY OF THE INVENTION The invention disclosed in the present specification relates to a technique for obtaining a crystalline silicon film by using a metal element that promotes crystallization of silicon. The challenge is to obtain.

For example, it is an object to provide a technique for controlling a growth width of a lateral growth region. Another object of the present invention is to provide a technique capable of applying the crystal growth technique using the metal element to a structure requiring miniaturization.

[0022]

Means for Solving the Problems One of the inventions disclosed in this specification is to form at least a region formed on a substrate having an insulating surface and utilizing crystal growth in a direction parallel or substantially parallel to the substrate. An electronic circuit having one function is formed, and the regions have the same crystal growth form.

In the above structure, the region which has grown in a direction parallel or substantially parallel to the substrate contains a metal element which promotes crystallization of silicon at a concentration of 5 × 10 ¹⁵ to 1 × 10 ¹⁹ cm ^-3. Is preferred. Still more preferably, the metal element that promotes crystallization of silicon is 1 × 10 ^{17 to} 5
^Preferably , it is contained at a concentration of × 10 ¹⁸ cm ^-3 .

The metal elements that promote crystallization of silicon include Fe, Co, Ni, Ru, Rh, Pd, Os, and I.
One or a plurality of elements selected from r, Pt, Cu, and Au can be used.

In particular, it is useful to use Ni (nickel) because of its effect and reproducibility.

Examples of the electronic circuit having at least one function include an inverter circuit, a buffer circuit, a switch circuit, a decoder circuit, a shift register circuit, a sampling circuit, a sampling and holding circuit, a flip-flop circuit, and other various arithmetic circuits and memory circuits. be able to. Further, a circuit in which these functions are combined can be given. In addition, various logic circuits such as a NAND circuit and a NOR circuit can be given.

Another aspect of the invention is a display device having an active matrix circuit and a peripheral drive circuit formed on the same substrate having an insulating surface, wherein at least one circuit function constituting the peripheral drive circuit is provided. Is characterized by being formed using a crystalline silicon film crystal-grown in a direction parallel or substantially parallel to a substrate having the same crystal growth mode.

In the above structure, a crystalline silicon film grown in a direction parallel or substantially parallel to a substrate having the same crystal growth form has a metal element that promotes silicon crystallization.
Preferably, it is contained at a concentration of × 10 ¹⁵ to 1 × 10 ¹⁹ cm ⁻³ .

Still more preferably, they have the same crystal form.
Crystal grown in a direction parallel or approximately parallel to the substrate
The crystalline silicon film has a metal element that promotes silicon crystallization of 1 ×.
10 ¹⁷~ 5 × 10¹⁸cm^-3May be contained at a concentration of
Good.

At least one circuit function includes an inverter circuit, a buffer circuit, a switch circuit, a decoder circuit, a shift register circuit, a flip-flop circuit, a sampling circuit, a sampling and holding circuit, various other arithmetic circuits and a memory circuit. it can. Further, a circuit in which these functions are combined can be given. In addition, various logic circuits such as a NAND circuit and a NOR circuit can be given.

According to another aspect of the present invention, there is provided a process of selectively contacting and holding a metal element for promoting crystallization of silicon in a plurality of regions in contact with a front surface or a back surface of an amorphous silicon film;
At the same time as performing a heat treatment to cause crystal growth in a direction perpendicular or substantially perpendicular to the film of the silicon film in the plurality of regions, at least one of the plurality of regions is parallel or substantially parallel to the surface of the silicon film. Crystal growth, and removing the plurality of regions, wherein at least another of the plurality of regions is performed in a direction parallel or substantially parallel to a surface of the silicon film. And limiting the growth of crystal growth performed in a direction parallel or substantially parallel to the surface of the silicon film.

According to another aspect of the present invention, there is provided a process of selectively contacting and holding a metal element for promoting crystallization of silicon in a plurality of regions in contact with a front surface or a back surface of an amorphous silicon film;
At the same time as performing a heat treatment to cause crystal growth in a direction perpendicular or substantially perpendicular to the film of the silicon film in the plurality of regions, at least one of the plurality of regions is parallel or substantially parallel to the surface of the silicon film. A step of performing crystal growth, a step of removing the plurality of regions, and a heat treatment again, and the silicon growth is again performed from a region where crystal growth is performed in a direction parallel or substantially parallel to the surface of the silicon film. Performing a crystal growth in a direction parallel or substantially parallel to the surface of the film.

[0033]

The position and the growth width of the lateral growth region can be controlled by utilizing the fact that the lateral growth does not grow from there when it hits the vertical growth region.

FIG. 1A and FIG.
In regions 01 and 102, nickel is held in contact with the surface of the amorphous silicon film 103, and
This is an example in which crystal growth (lateral growth) in a direction parallel to the substrate 11 is performed by a heat treatment as shown in FIG.
Note that a cross section taken along line AA ′ in FIG.
Is equivalent to

Crystal growth indicated by 104 to 107 in FIG. 1 is performed in a direction parallel to the substrate 11 from regions 101 and 102 where nickel is held in contact with the surface of the amorphous silicon film. In the regions 101 and 102, vertical growth is performed.

Here, the width of each of the areas 101 and 102 is 20.
It has an elongated slit shape with an arbitrary length of not less than μm.

The reference numerals 108 to 110 indicate that the width formed by the mask 14 made of a silicon oxide film is 5 μm.
It is a slit-shaped area of m or less. That is, the amorphous silicon film 103 is an elongated region having a width of 5 μm or less and in which the amorphous silicon film 103 is exposed (nickel is held in contact with the surface). Vertical growth is also performed in this region.

In such a configuration, 108 to 110
In the area indicated by, only vertical growth is performed.
This is because if the area held in contact with nickel is small,
Because lateral growth does not occur.

Further, vertical growth is performed at 108 to 110.
When the lateral growth collides with the region indicated by, the lateral growth stops there. Therefore, by appropriately setting and arranging the regions indicated by 108 to 110, the lateral growth regions formed by the lateral growth indicated by 104 to 107 can be limited to the predetermined regions.

That is, by using the regions indicated by 108 to 110 as stopper regions for lateral growth, the lateral growth region can be obtained with high controllability.

When the crystal is grown in the state as shown in FIG. 1, the problem that the lateral growth regions collide with each other can be avoided, and a large number of thin film transistors having high characteristics can be formed.

In general, the tip portion of the lateral growth has a larger area than the other region where the metal element for promoting the crystallization of silicon is laterally grown.
It has been observed that the concentration of the metal element is about one order of magnitude higher. It has also been confirmed that the metal element is present at a high concentration in the vertical growth region.

Therefore, the lateral growth collides with the vertical growth 108.
The metal element (in this case, the nickel element) is present in the region indicated by -110 at a much higher concentration than the other regions.

Here, after completion of the crystal growth, dry etching or wet etching is performed using the silicon oxide film 14 of the mask, whereby the region containing the metal element at a high concentration can be removed. .

This step can be said to be a step of concentrating the metal elements used for crystal growth in the vertical growth regions 108 to 110 and subsequently removing the metal elements collectively. Even if the metal element is useful at the time of crystallization of the silicon film, it is not preferable thereafter. Therefore, it can be said that the above configuration is useful.

[0046]

[Embodiment 1] This embodiment relates to a process of manufacturing a thin film transistor using a laterally grown region of a crystalline silicon film formed on a glass substrate.

First, a step of obtaining a crystalline silicon film having a lateral growth region on a glass substrate will be described with reference to FIGS.
This will be described with reference to FIG. Note that AA ′ in FIG.
FIG. 1 (B) shows a cross section cut by.

First, a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed as a base film 12 on a glass substrate (Corning 1737 glass substrate) 11 by a plasma CVD method. This base film has a thickness of 3000 °.

Next, an amorphous silicon film 103 to be a crystalline silicon film later is formed by a plasma CVD method or a low pressure thermal CVD method.

Then, a mask 13 is formed by forming a silicon oxide film having a thickness of 1500 ° by a plasma CVD method and performing patterning. With this mask 13, thin slits indicated by 108 to 110 and 101
Regions indicated by 102 and 102 are formed. That is, 108-
The area of the narrow slit shown at 110 and 101 and 10
In a region indicated by reference numeral 2 (this region is also elongated as shown in FIG. 1A), a state where the amorphous silicon film is exposed is obtained.

Here, the width of the region indicated by 108 to 110 is 5 μm. The width of the region indicated by 101 and 102 is 30 μm.

The width of the region indicated by 108 to 110 is 5 μm.
m or less. The lower limit is limited by the patterning accuracy. Generally, the lower limit is about 0.5 μm.

The width of the regions 101 and 102 is preferably 20 μm or more. However, it should be noted that making the width too large is disadvantageous for miniaturization. Further, even if the width dimension is set to 50 μm or more, the lateral growth distance is saturated, and thus has no relation to the growth distance. Therefore, it is not particularly useful to set the width of the regions indicated by 101 and 102 to 50 μm or more.
(Of course, you can increase the width)

Table 1 below shows the relationship between the width of the region into which the nickel element is introduced and the lateral growth amount (μm).

[0055]

[Table 1]

Table 1 shows the width of the region where the nickel element is held in contact (the width of the elongated region, for example, the width of the region indicated by 101 in FIG. 1), and the lateral growth distance performed from the region. This shows the relationship.

That is, a mask made of silicon oxide is provided so that the surface of the amorphous silicon film is exposed in the form of a slit, and the nickel element is held in contact with the slit-shaped region. By performing the heat treatment, the width of the slit-shaped region and the lateral growth distance when the lateral growth is performed in the direction parallel to the substrate (plane direction) from the region where the amorphous silicon film is exposed in the slit shape. It shows the relationship.

As is clear from Table 1, when the width of the nickel-added region is 5 μm or less, no lateral growth is performed. When the width of the nickel-added region is 20 μm or more, a lateral growth distance of 100 μm or more can be obtained. When the width of the nickel-added region is 50 μm or more, the obtained lateral growth distance is substantially saturated.

The silicon oxide film 14 serving as a mask allows
After obtaining the state where the amorphous silicon film 103 in the regions indicated by 8 to 110 and 101 and 102 is exposed, UV ozone treatment is performed. By this UV ozone treatment, a dense silicon oxide film is formed on the surface of the exposed amorphous silicon film 103.

Next, a nickel acetate solution containing 10 ppm (by weight) of nickel element is applied to the entire surface by spin coating.

By applying this nickel acetate solution, 1
In the regions indicated by 08 to 110 and 101 and 102, a state where the nickel element is in contact with and held on the surface of the amorphous silicon film 103 is realized. At this time, the solution is not repelled due to the hydrophilic property of the dense silicon oxide film, and the nickel element is kept in contact with the surface of the amorphous silicon film 103.

The method of introducing a metal element using this solution is excellent in controllability and reproducibility. Note that a metal element that promotes crystallization of silicon may be introduced by a sputtering method, a plasma treatment, a CVD method, or an adsorption method instead of the method using the above solution.

Then, by performing a heat treatment, the amorphous silicon film 103 is crystallized to obtain a crystalline silicon film. Here, heat treatment is performed at 600 ° C. for 4 hours in a nitrogen atmosphere. In this crystal growth, in the regions 108, 109, and 110, only the vertical growth is performed as shown by 111 because the width is as small as 5 μm.

In the areas 101 and 102,
While vertical growth is performed, horizontal growth is performed from the region in a direction parallel to the substrate. Lateral growth is indicated by arrows 104-
It is performed in the direction indicated by 107.

Here, in regions 108 to 110, vertical growth is performed.
The lateral growth indicated by 4 and 105 stops growing.

The vertical growth region contains nickel at a relatively high concentration, and the tip of the lateral growth also contains nickel at a high concentration. Therefore, the nickel element exists at a very high concentration in the vertical growth regions 108 to 110 where the horizontal growth has collided.

Specifically, the nickel concentration in the region indicated by 108 to 110 shows a higher value by one or two digits as compared with the lateral growth region indicated by 105 or 106. (S
(Based on measurement by IMS (secondary ion analysis method))

Further, a crystal grain boundary containing nickel silicide is formed at a portion where vertical growth and horizontal growth meet.

After completion of the crystallization, an etchant for selectively etching silicon (for example, HF: HNO ₃ =
Wet etching using 1: 200 hydrofluoric nitric acid). Then, using the mask 14 made of the silicon oxide film as a mask, only the vertically grown region is selectively removed.
This region is a region containing nickel at a high concentration as described above.

Then, etching is performed with a hydrofluoric acid-based etchant (for example, buffered hydrofluoric acid). In this step, the mask 14 made of the silicon oxide film is removed.

Then, the crystalline silicon film having the lateral growth region or only the lateral growth region is patterned to form an active layer of the thin film transistor.

When lateral growth is performed from an elongated region as shown in FIG. 1A, a crystal state in a region to be used for a device can be obtained as a crystal growth direction aligned. This is very important when a large number of devices are formed and have the same characteristics.

[Embodiment 2] This embodiment shows an example in which a large number of thin film transistors are manufactured using the lateral growth region manufactured in Embodiment 1. FIG. 2 shows an example of positioning the active layer of the thin film transistor.

In FIG. 2, reference numeral 201 denotes an active layer of the thin film transistor. By arranging the thin film transistors as shown in FIG. 2, a large number of thin film transistors can be formed by the crystalline silicon film laterally grown in a predetermined direction. And the characteristics can be made uniform.

Further, the vertical growth region is used as a horizontal growth stopper, and is further arranged as shown in FIG.
The influence of the crystal grain boundary formed in the region where the lateral growth regions meet each other can be eliminated.

Further, by determining the position of the active layer of the thin film transistor such that carriers move in the direction of lateral growth, a thin film transistor having high mobility can be manufactured. This is because the influence of the crystal grain boundaries is small in the direction of the lateral growth, and the carrier is easily moved.

The configuration shown in this embodiment is suitable for a peripheral driving circuit in an active matrix type liquid crystal display device or an active matrix type EL display device.

That is, it is very effective when the same circuit configuration such as a shift register circuit and an analog buffer circuit is repeated in a horizontal line.

For example, the width of the shift register circuit is 80 μm
The shift register circuit can be formed using one lateral growth region by using the configuration shown in this embodiment, which can achieve a lateral growth distance of about 100 μm or more.
That is, a circuit having a predetermined function can be formed using regions having the same crystal growth mode.

As described above, by using the structure shown in this embodiment, a circuit having a predetermined function can be provided in a single lateral growth region in an integrated manner. The predetermined function includes, in addition to the shift resist function described above, an amplification function, a switching function, an impedance conversion function, a flip-flop circuit, a sampling circuit, a sampling and holding circuit, a memory function, and an arithmetic function. One or a plurality thereof, or a function obtained by combining these functions can be given.

In an integrated configuration having such a predetermined function, it is important that the characteristics of the constituent elements are uniform. Therefore, as shown in this embodiment, it is useful to form such an integrated circuit in a region having the same crystal growth state.

[Embodiment 3] This embodiment shows a manufacturing process of a thin film transistor in the case where the structure as shown in FIG. 2 is employed.

This embodiment shows a process of manufacturing one thin film transistor in each of two different lateral growth regions adjacent to each other. Here, an example in which an N-channel thin film transistor is manufactured will be described.

First, a silicon oxide film 302 is formed as a base film on a glass substrate 301 to a thickness of 2,000 .ANG., And an amorphous silicon film 303 is formed to a thickness of 500 .ANG. As a method for forming the amorphous silicon film 303, it is desirable to use a low pressure thermal CVD method.

Next, the thickness 1 formed by the plasma CVD method
A mask 304 is formed using a 500 ° silicon oxide film. The silicon oxide film forming the mask 304 has a higher film etching rate than the silicon oxide film 302 forming the base film.

The mask 304 may have a laminated structure such as a thin silicon oxide film on the lower side and a silicon nitride film on the upper side in order to obtain a difference in etching rate from the base film.

Thus, the slits 306 and 307 having a width of 5 μm and the slit 305 having a width of 30 μm are obtained.
In this state, the amorphous silicon film 303 is exposed in these slits.

The state of each slit viewed from the top is the same as that shown in FIG. That is, 306 and 307
1 correspond to 108 and 109 in FIG. 1, and 305 corresponds to 10 and 109 in FIG.
Equivalent to 1.

Thus, the state shown in FIG. 3A is obtained. Then, a nickel acetate solution containing 10 ppm of nickel is applied by spin coating, and 306, 305, 307
It is assumed that the nickel element is in contact with and held on the surface of the amorphous silicon film 303 in the region indicated by.

Then, by performing a heat treatment at 550 ° C. for 4 hours in a nitrogen atmosphere, crystal growth as shown in FIG. 3B is performed. By this heat treatment, 308, 31
Regions indicated by 0 and 312 grow vertically. Also, 30
The regions indicated by 9 and 311 grow laterally. (FIG. 3
(B))

Then, the vertically grown regions 308, 310,
312 is removed by wet etching using hydrofluoric nitric acid. This step may be based on dry etching.

Thus, the state shown in FIG. 3C is obtained. Further, the remaining mask 304 is removed. When the mask 304 is formed of a silicon oxide film, the mask 304 is removed using buffered hydrofluoric acid.

Thus, the state shown in FIG. 3D is obtained. Then, patterning for forming an active layer of the thin film transistor is performed to obtain a state shown in FIG. FIG.
In (E), 313 and 314 are patterns made of a laterally grown crystalline silicon film constituting an active layer of a thin film transistor.

FIG. 3E (same as FIG. 4A)
Is obtained, a silicon oxide film 401 functioning as a gate insulating film is formed. This silicon oxide film 401 is formed, for example, by 1000 by a plasma CVD method or a sputtering method.
The film is formed to a thickness of Å.

Next, an aluminum film (not shown) constituting the gate electrode is formed later. The aluminum film contains scandium at 0.2% by weight. Further, a dense anodic oxide film (not shown) is formed to a thickness of 100 °.

This anodized film is formed by performing anodizing using an aluminum film as an anode in an ethylene glycol solution containing 3% tartaric acid neutralized with aqueous ammonia. The thickness of the dense anodic oxide film can be controlled by the applied voltage.

Further, the aluminum film is patterned to obtain a state shown in FIG.

In the state shown in FIG. 4B, patterns 402 and 403 are patterns for forming a gate electrode later.

After the state shown in FIG. 4B is obtained, anodic oxidation is performed again to form porous anodic oxide films 404 and 405. This porous anodic oxide film is formed by forming aluminum patterns 402 and 4 in an aqueous solution containing 3% oxalic acid.
It is formed by anodic oxidation using 03 as an anode. The thickness of the anodic oxide film can be controlled by the anodic oxidation time.

Further, dense anodic oxide films 406 and 407 are formed under the conditions described above. The thickness of this dense anodic oxide film is 800 °. In this anodic oxidation, since the electrolytic solution enters the inside of the porous anodic oxide films 404 and 405, the anodic oxide films 406 and 407 are formed in a state as shown in FIG.

The thickness of each of the anodic oxide films 406 and 407 is set to 2
When the thickness is 000 ° or more, an offset gate region can be formed later with the film thickness.

Thus, the state shown in FIG. 4C can be obtained. Here, 408 and 409 are gate electrodes.

Then, impurity ions are implanted to form source / drain regions. Here, P ions are implanted in order to manufacture an N-channel thin film transistor. Thus, the source region 4 of one of the thin film transistors
10 and a drain region 411 are formed. In addition, the source region 412 and the drain region 413 of the other thin film transistor
To form

Next, the porous anodic oxide films 404 and 405
Is selectively etched using a mixed acid obtained by mixing phosphoric acid, acetic acid and nitric acid. Thus, the state shown in FIG. 4D is obtained.

At this point, impurity ions are implanted again.
Here, P ions are implanted at a dose lower than the initial dose. Thus, lightly doped regions 414 and 416 are formed in one of the thin film transistors. In the other thin film transistor, lightly doped regions 417 and 419 are formed.

Here, the lightly doped regions 416 and 419 adjacent to the drain region are regions called LDD (lightly doped drain).

Thus, the state shown in FIG. 4D is obtained. Further, an interlayer insulating film 420 is formed using a silicon oxide film or the like. Further, contact holes are formed to form source electrodes 421 and 423 and drain electrodes 422 and 424. (FIG. 4E)

Here, an example in which a pair of N-channel thin film transistors is manufactured has been described. However, actually, a large number of thin film transistors are arranged and formed in the depth direction or the front direction of the drawing as shown in FIG.

Here, the structure is shown in which a metal element for promoting crystallization of silicon is in contact with and held on the amorphous silicon film. However, the metal element may be held in contact with a predetermined pattern on the base film before the formation of the amorphous silicon film.

[Embodiment 4] This embodiment relates to a technique for reducing the concentration of a metal element which promotes crystallization of silicon finally remaining. Of course, the present embodiment has the significance described in the first embodiment.

In the configuration shown in this embodiment, first, FIG.
As shown in (A), a glass substrate (for example, Corning 17)
Silicon oxide film 5 as a base film on (glass substrate 37) 501
02 is formed to a thickness of 3000 °.

Next, an amorphous silicon film 503 is formed to a thickness of 500 ° by a plasma CVD method or a low pressure thermal CVD method.

Further, a silicon oxide film (not shown) having a thickness of 1500 ° is formed. This silicon oxide film functions as a mask when the nickel element is introduced later.

Here, an example in which a silicon oxide film is used will be described. However, a silicon nitride film, a silicon oxynitride film, various metal films, metal silicide, or the like may be used. As the film that functions as the mask, a film that does not react with silicon during heating during crystallization and has a diffusion coefficient of a metal element that promotes crystallization of silicon as small as possible with respect to the silicon film is used. It is desirable.

This silicon oxide film is patterned to form a mask 504. It is preferable that the silicon oxide film has a film quality with a higher etching rate than that of the underlying silicon oxide film 502.

The mask 504 made of the silicon oxide film has a long slit 50 having a longitudinal direction in the depth direction of the drawing.
5 to 507. Here, the width of the slits 505 and 507 is 3 μm. Also, the width of the slit in the area indicated by 506 is 20 μm.

Thus, the state shown in FIG. 5A is obtained. In this state, UV ozone oxidation is performed to form a dense oxide film on the surface of the exposed amorphous silicon film. This oxide film functions to improve the wettability of the nickel acetate solution to be applied later.

Then, by spin coating, 10 ppm
A nickel acetate solution having a nickel concentration (in terms of weight) is applied.

In this state, heat treatment is performed at 580 ° C. for one hour. This heat treatment is performed under the condition that lateral growth of about 20 to 30 μm is performed. By performing this heat treatment, vertical growth occurs downward from the surface of the silicon film in the regions 505, 506, and 507 as shown in FIG. Further, lateral growth of about 20 to 30 μm occurs in the direction parallel to the substrate from the region 506.

In the above heat treatment, heating at 500 to 600 ° C. may be performed for 10 minutes to 240 minutes (2 hours). If the heating temperature is higher and the heating time is longer than the above conditions, the crystal growth proceeds, and the second-stage crystal growth described later becomes difficult.

As a result of this crystal growth, the regions 505 to 507 where the vertical growth has been performed are regions having a vertically grown crystallinity containing a high concentration of nickel element. Also 506
The region laterally grown from the region described above also contains the nickel element at a relatively high concentration. (FIG. 5 (B))

According to the measurement by SIMS (secondary ion analysis method), the nickel concentration in the vertically grown regions indicated by 505 to 507 is 5 × 10 ¹⁹ cm in average.
It is about ^-3 . The nickel concentration in the region laterally grown from 507 is on the order of 10 ¹⁸ cm ^{-3 on} average.

Next, the vertically grown region is removed using hydrofluoric nitric acid. Further, the mask 504 made of silicon oxide is removed by etching using a hydrofluoric acid-based etchant (for example, buffered hydrofluoric acid).

Thus, the state shown in FIG. 5C is obtained.
Here, regions 508 and 509 are regions containing nickel at a high concentration grown laterally in the previous step. Here, 509
And 510 are laterally grown and have crystallinity. The other regions remain in the amorphous state. This is because a normal amorphous silicon film is not crystallized by heat treatment at 580 ° C. for one hour.

After the state shown in FIG. 5C is obtained, another heat treatment is performed. This heat treatment is for performing the second-stage crystal growth. This heat treatment is 600
C. for 4 hours at a temperature of .degree.

As a result of this step, another crystal growth (lateral growth) proceeds from the regions indicated by 508 and 509 . This state of crystal growth is shown in FIG. This crystal growth
Stop at the previously removed areas 505 and 507. Thus, an elongated crystalline silicon film region having the same crystal growth form is obtained. (See FIG. 1A)

The crystalline silicon film thus obtained is
Include nickel concentration of 10¹⁷cm ^-3And the order of
be able to. This value corresponds to the one-stage crystal shown in Example 1.
This is about one digit lower than that of the growth method. this
This is extremely difficult when considering device stability and reproducibility.
It is useful for

Thereafter, the obtained crystalline silicon film is patterned as indicated by 510 and 511 to form an active layer of the thin film transistor.

It should be noted that, in fabricating the device, 50
It is better to avoid the areas indicated by 8 and 509. That is, 5
It is preferable to remove the region 08 or 509 and manufacture a device using another region. This is 508 or 509
This is because, although relatively high, the nickel element is contained in a high concentration.

By using the structure shown in this embodiment, the lateral growth region where high characteristics can be obtained is used, and the nickel concentration (metal element concentration) in the region is 1 ×.
The concentration can be suppressed to 10 ^{17 to} 5 × 10 ¹⁸ cm ⁻³ .

In particular, by optimizing the conditions, the nickel concentration (metal element concentration) in the active layer of the thin film transistor can be easily suppressed to the order of 1 × 10 ¹⁷ cm ⁻³ .

This means that while having high characteristics,
This is useful in obtaining a device having high reliability.

[Embodiment 5] The present embodiment relates to an active matrix type liquid crystal display device in which the peripheral driving circuit is also integrated on the same substrate as the active matrix circuit.

In such a configuration, since the peripheral driver circuit is required to operate at a high speed, a thin film transistor utilizing lateral growth is suitable. On the other hand, a thin film transistor arranged in an active matrix circuit does not require much mobility and requires low leakage current characteristics, so that it has low mobility (about 10 cm ² / Vs). Is desirable. (Generally, the higher the mobility, the higher the leakage current)

Therefore, in the present embodiment, the peripheral drive circuit is formed in a lateral growth region using the technique shown in FIGS. 1, 2 and 5. That is, the active layer of the thin film transistor constituting the peripheral drive circuit is formed by a laterally grown crystalline silicon film. In this manner, the peripheral driver circuit can be formed using a thin film transistor having high mobility.

Since the peripheral driver circuit has a high degree of integration, it is very useful to use the techniques shown in FIGS. 1, 2 and 5.

A thin film transistor arranged in an active matrix circuit is manufactured using a crystalline silicon film obtained without using nickel. This is because the active matrix circuit first requires low leakage current characteristics.

According to an experiment, a thin film transistor manufactured using a crystalline silicon film obtained by using a nickel element can be obtained by heating only without using a nickel element and by irradiating a laser beam only. It has been observed that the value of the leak current is higher than that of a thin film transistor manufactured using a conductive silicon film. This is considered to be due to nickel becoming a trap level.

Therefore, here, even if the crystallinity is somewhat poor and a high mobility cannot be obtained, a thin film transistor which suppresses an increase in leak current (OFF current) by not using a nickel element is employed in the active matrix circuit. I do. The active matrix circuit (pixel circuit)
Is manufactured using a crystalline silicon film obtained by laser light irradiation.

By employing the structure shown in this embodiment, an active matrix type liquid crystal display device in which the peripheral circuit is constituted by a thin film transistor which can operate at high speed and the pixel matrix region is constituted by a thin film transistor having a low leakage current characteristic. Obtainable.

The structure shown in this embodiment can be used for other active matrix type flat panel displays. For example, plasma display and EL
It can be used for type display.

In order to realize the structure as shown in this embodiment, an annealing step by irradiating a laser beam may be performed after a heating step for performing lateral growth.

The step of performing lateral growth is performed, for example, at 600 ° C.
It takes about 4 hours, and this step alone does not crystallize an amorphous silicon film to which nickel (or other metal elements that promote crystallization of silicon) is not added.

However, the combined use of laser beam irradiation promotes the crystallization of the laterally grown region and stabilizes the obtained film quality, and at the same time, the amorphous region not crystallized by the heat treatment (this region). Is a region where nickel is not added).

At this time, the laser irradiation conditions are optimized so that the mobility of a thin film transistor obtained by using a region to which nickel is not added is about 10 cm ² / Vs of an N-channel type.

Crystallization of an amorphous silicon film by laser light irradiation generally has a problem in reproducibility of its effect. However, under the conditions of relatively light annealing as described above, high reproducibility cannot be obtained. it can.

As described above, the pixel matrix region is mainly composed of thin film transistors having low leakage current characteristics obtained by laser annealing, and the peripheral circuit region is composed of high mobility using lateral growth (on average, 100 cm ² / cm ² as will be described later). V
s can be obtained).

[Embodiment 6] The present embodiment relates to a technique for forming a marker for positioning without adding a special step. In manufacturing a thin film transistor, a gate electrode is formed, a contact hole is formed, and a source /
It is necessary to perform mask alignment when forming the drain electrode. At this time, a marker for some kind of alignment is required.

It is desirable that the alignment marker is formed in a step where initial alignment is required.

Therefore, in the configuration shown in this embodiment,
The formation of this marker is performed simultaneously with the formation of the mask 14 in FIG.

Here, when introducing the nickel element, the nickel element (or a metal element that promotes appropriate crystallization of silicon) is introduced into the pattern of the mark. That is, a mark pattern for alignment is formed on a part of the mask 14 made of a silicon oxide film.

Further, by the heat treatment, the mark pattern is vertically grown. Then, at the same time as the removal of the mask 14, this pattern portion is also etched away.
Thus, a region removed in a predetermined pattern is obtained. This pattern has particular significance that can be obtained without adding new steps.

[Embodiment 6] In this embodiment, the result of examining the relationship between the growth distance of lateral growth and the heating conditions will be described. First, the preparation conditions of the sample will be described.

First, the Corning 1737 glass substrate is subjected to a heat treatment at 640 ° C. for 2 hours in a nitrogen atmosphere. This is to suppress shrinkage of the glass substrate in a later step.

Next, plasma CVD using TEOS gas
In this case, a silicon oxide film is formed to a thickness of 2000 mm as a base film. Further, an amorphous silicon film is formed to a thickness of 500 ° by a plasma CVD method. Further, a silicon oxide film for a mask used for introducing a nickel element is formed by a plasma CVD method using a TEOS gas.

Then, this silicon oxide film is patterned,
A nickel element addition pattern is formed. The width of this pattern is 20 μm, and an elongated slit-like opening is formed.

Then, a very thin oxide film is formed on the surface of the exposed amorphous silicon film by UV ozone oxidation. Then, heat treatment is performed in a nitrogen atmosphere. As a result of this heat treatment, crystal growth (lateral growth) occurs in a direction parallel to the substrate from the region to which the nickel element is added. The results obtained are shown in Table 2 below.

[0158]

[Table 2]

As shown in Table 2 above, the heating temperature was increased,
Further, by increasing the heating time, the distance of lateral growth can be increased. However, when the heating temperature is 600 ° C., crystallization that does not depend on nickel progresses by heating for 8 hours or more.

The crystallization not due to the action of nickel is as follows.
It has the function of stopping the growth of lateral growth as well as vertical growth. Therefore, when the heating temperature is set to 600 ° C. or more,
It is preferable to shorten the heating time.

In any case, a lateral growth distance of about 200 μm can be obtained. Therefore, by making the nickel element-added region elongated (for example, a region indicated by 101 in FIG. 1), an elongated lateral growth region having an arbitrary length and a width of 200 μm can be obtained.

This lateral growth region has a uniform crystal growth state. For example, in the measurement by X-ray diffraction, signals having substantially the same signal intensity ratio in each crystal orientation can be obtained. Such a state means that a device with uniform characteristics can be formed within this region, and it can be said that this is a very preferable state.

[Embodiment 7] This embodiment relates to a structure in which the length of lateral growth is selectively changed. As can be seen from Table 1 above, the lateral growth distance differs depending on the width of the region to which nickel is added. By utilizing this fact, different lateral growth amounts (lateral growth lengths) are obtained here.

For example, by changing the width of the addition region having an elongated slit shape, the growth distance of the lateral growth region growing from this addition region can be controlled.

[Embodiment 8] This embodiment shows an example in which a thin film transistor arranged in each pixel is formed in a lateral growth region in an active matrix type structure. In an active matrix type liquid crystal display device or EL display device, when the pixel pitch is reduced to 50 μm or less, adjacent lateral growth regions collide with each other and hinder each other's crystal growth. In such a case, a crystal grain boundary may be formed in the formation portion of the film.

In order to avoid this state and to form a lateral growth region in a predetermined region of each pixel, a lateral growth stopper utilizing the above-described vertical growth region is used here.

That is, the vertical growth region is formed in a slit shape of 5 μm or less (for example, 3 μm) so that the horizontal growth region is formed only in a predetermined region. By doing so, a lateral growth region can be formed in a predetermined region, and occurrence of the above-described failure can be suppressed. That is, it can be formed by controlling the lateral growth region.

[Embodiment 9] This embodiment relates to a configuration in which a crystalline silicon film obtained by a heat treatment is further irradiated with a laser beam in order to increase a process margin.

In the case where a crystalline silicon film is obtained by heating using the invention disclosed in this specification, there is a considerable variation in film quality.

In this embodiment, in order to correct this variation, annealing by laser light irradiation is performed repeatedly. It is desirable to use an excimer laser having a wavelength in the ultraviolet region as the laser beam.

As shown in this embodiment, the combined use of laser light irradiation can make the quality of the obtained crystalline silicon film uniform. Further, instead of laser light irradiation, light annealing may be performed by irradiating strong light such as infrared light or ultraviolet light.

[Embodiment 10] This embodiment shows an example in which characteristics of a thin film transistor obtained by using a laterally grown region and characteristics of a thin film transistor obtained by using a vertically grown region are compared.

Table 3 below shows the mobility values of 18 samples randomly selected from the obtained N-channel type thin film transistors.

[0174]

[Table 3]

As is clear from Table 3, the mobility of the thin film transistor using the vertical growth indicated by A is 75.
It varies within the range of １101 cm ² / Vs. However, in the thin film transistor using lateral growth indicated by B, the value itself is high and the variation is very small.

That is, when lateral growth is used, the characteristics of the device itself are high, and variations in the characteristics can be reduced.

The crystalline silicon film from which the above data was obtained was crystallized by heat treatment at 600 ° C. for 4 hours using nickel as a metal element for promoting crystallization of silicon, and further 250 mJ / cm ^2. A KrF excimer laser was irradiated at an irradiation energy density of

For comparison, an example in which a sample that does not use nickel in the same lot as the above process is flowed is shown. In this case, the heat treatment does not cause crystallization. However, a crystalline silicon film can be formed by laser light irradiation.

An N-channel thin film transistor manufactured using this sample has a mobility of 10 cm ² / Vs or less. Such a low mobility thin film transistor
Since nickel is not used, it is optimal for an active matrix region of a liquid crystal display device.

For comparison, a similar N-channel thin film transistor was manufactured using a crystalline silicon film obtained only by heat treatment at 640 ° C. for 48 hours (without using nickel). In this case, the mobility is 20 to 30 cm ² /
Vs was obtained. This also indicates the significance of using lateral growth.

In the case of the P-channel type as well, the value becomes smaller by about 30%, but the overall tendency is similar to that shown in Table 3.

[Embodiment 11] This embodiment shows an example in which an N-channel thin film transistor and a P-channel thin film transistor are simultaneously manufactured. This configuration is a CMO
It can be used when configuring an S circuit.

First, crystalline active layers 603 and 604 formed by lateral growth are formed on a glass substrate 601 on which a base film 602 is formed. The step of forming these two active layers may follow the step shown in FIG. 3 or the step shown in FIG.

According to the steps shown in FIGS. 4A to 4C, the state shown in FIG. 6B is obtained. Here, the left thin film transistor is an N-channel type, and the right thin film transistor is a P-channel type.

FIG. 6B shows N-type high-concentration impurity regions 605 and 608, 609 and 612, N-type low-concentration impurity regions 607 and 611, and 606 and 610 serving as channel formation regions. Is formed.

In this state, a resist mask 613 is formed, and B ions are implanted this time. Then 614 and 6
The conductivity type of the region 15 is inverted to P-type. Thus,
A source region 615 and a drain region 614 of a P-channel thin film transistor are obtained.

Then, the resist mask is removed and laser light irradiation is performed to anneal the region into which the impurity ions have been implanted.

Next, an interlayer insulating film 616 is formed, and a contact hole is formed. Then, the source electrodes 617 and 62
0 is formed. In addition, drain electrodes 618 and 919 are formed. Here, if the drain electrodes 618 and 619 are connected, a CMOS structure can be obtained.

Thus, the left N-channel thin film transistor and the right N-channel thin film transistor can be formed simultaneously.

In the configuration as shown in FIG. 6, an LDD region is arranged only in the N-channel type, and the imbalance in characteristics between the N-channel type and the P-channel type can be corrected.

[Embodiment 12] This embodiment is an example in which a circuit having a predetermined function is constituted by using regions having the same crystal growth form as shown in FIG.

What is shown here is a part of the decoder circuit. FIG. 6 shows an actual circuit pattern. FIG. 7 shows an electric circuit block diagram.

6 and 7, regions 601 and 603 are regions where nickel is added and lateral growth is performed therefrom. That is, it is an area corresponding to the areas 101 and 102 in FIG.

Reference numeral 602 denotes a region having a width of 5 μm or less and functioning as a growth stopper for stopping lateral growth.

As can be seen from FIGS. 6 and 7, two NAND circuits are formed using regions having the same crystal growth form laterally grown from 601. Also, 60
One NOR circuit is formed using regions having the same crystal growth form grown from Step 3.

In this configuration, the two lateral growth regions are:
It is cut off in the area indicated by 602 and does not affect each other.

Thus, the characteristics of the individual circuits can be improved, and the overall reliability can be improved.

[0198]

By using the invention disclosed in this specification, a lateral growth region can be obtained with high controllability.

For example, the growth width of the lateral growth region can be controlled. Further, it is possible to easily use a crystal growth technique using a metal element that promotes crystallization of silicon in a configuration that requires miniaturization.

In a structure in which lateral growth is performed from a predetermined region of the amorphous silicon film, the vertical growth region is used as a lateral growth stopper, so that the lateral growth region having the same crystal growth form is used. Thus, a circuit having a predetermined function can be configured.

In this region, the characteristics of the device to be formed can be made uniform, so that the characteristics and reliability of the circuit to be formed can be improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a state of crystal growth of a crystalline silicon film.

FIG. 2 is a diagram showing a state of crystal growth of a crystalline silicon film and positioning of an active layer of a thin film transistor.

FIG. 3 illustrates a manufacturing process of a thin film transistor.

FIG. 4 illustrates a manufacturing process of a thin film transistor.

FIG. 5 illustrates a manufacturing process of a thin film transistor.

FIG. 6 is a diagram showing a circuit pattern.

FIG. 7 is a circuit block diagram of FIG. 6;

[Explanation of symbols]

101, 102 A region to which nickel is added to become a source of lateral growth 103 Amorphous silicon film 104, 105 Lateral growth direction 106, 107 Lateral growth direction 108, 109, 110 Region 111 functioning as a lateral growth stopper 111 Vertical growth Direction 201 Active layer

Claims (2)

(57) [Claims] A metal element for forming a silicon oxide film on an amorphous silicon film, patterning the silicon oxide film to selectively expose the amorphous silicon film, and promoting crystallization of silicon. was held on the amorphous silicon film said selectively to expose, from said region to hold the metal element by a first heat treatment
The metal element is diffused into the amorphous silicon film, after the amorphous silicon film is crystallized into a parallel or a direction substantially parallel to the surface or the back surface of the amorphous silicon film, is the patterning
The silicon film selectively exposed by the removed silicon oxide film
Then, the patterned silicon oxide film is removed,
The method for manufacturing a semiconductor device by heat treatment, characterized in that crystallizes parallel or in a direction substantially parallel to the amorphous silicon film on the surface or back surface of the amorphous silicon film from a region which is the crystallization. 2. The method according to claim 1 , wherein the metal element for promoting crystallization of silicon is Fe, Co, Ni, Ru, Rh, P
A method for manufacturing a semiconductor device, which is d, Os, Ir, Pt, Cu, or Au.