JP3262190B2 - Method of manufacturing SOI substrate and SOI substrate manufactured by this method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an SOI (Silicon-Ion) in which a silicon layer (hereinafter referred to as an SOI layer) is formed on an insulating layer.
The present invention relates to a method of manufacturing an On-Insulator substrate and an SOI substrate manufactured by the method. More specifically, the present invention relates to a method for manufacturing an SOI substrate in which two silicon wafers are bonded via an insulating layer.

[0002]

2. Description of the Related Art In recent years, highly integrated CMOS (Complementary CMOS) has been developed.
Metal oxide semiconductors (ICs), ICs, high-voltage elements, and the like have been manufactured using SOI substrates. An SOI substrate in which a single-crystal silicon layer used as a device fabrication region is formed on an insulating layer is a highly integrated CMO.
In the case of S, it is effective for preventing latch-up (abnormal oscillation phenomenon due to a parasitic circuit), and in the case of a high breakdown voltage element, it is effective for insulation separation from the base substrate. This SOI substrate manufacturing method includes a method in which silicon wafers are bonded to each other via a silicon dioxide layer (hereinafter, referred to as a silicon oxide layer), that is, an insulating layer, on an insulating substrate or a substrate having an insulating thin film on its surface. First, a polycrystalline silicon thin film is deposited by CVD (Ch
ZMR, which is deposited by an emical vapor deposition method and then single-crystallized by laser annealing. After implanting high-concentration oxygen ions inside the silicon substrate, it is annealed at a high temperature and a predetermined depth from the silicon substrate surface. Forming a buried silicon oxide layer (insulating layer) in the region,
There is a SIMOX method using the silicon layer on the surface side as an active region. Among these methods, an SOI substrate manufactured by a bonding method is promising because the SOI layer has extremely good crystallinity.

[0003] The bonding method of this silicon wafer is as follows.
Specifically, two silicon wafers of about 600 μm each are bonded via an insulating layer made of a silicon oxide layer,
After the heat treatment, the surface of one of the two silicon wafers is ground with a grindstone and further polished with a polishing cloth so that the thickness of the silicon wafer is in a range of about 1 to 10 μm. A silicon layer having a thickness of about 1 to 10 μm is used as an SOI layer for device formation. In addition, this kind of silicon wafer is obtained by the Czochralski method (hereinafter referred to as C
When produced from a silicon single crystal rod pulled up by the Z method), the oxygen concentration of this silicon wafer is usually 1.0 to 1.5 × 10 ¹⁸ / cm ³ (former ASTM value: the same applies hereinafter). . On the other hand, in order to reduce crystal defects caused by oxygen, the oxygen concentration required for the SOI layer for device formation is 1.0 × 10 ¹⁷ / cm ³ or less. However, the S
In the OI layer, the oxygen concentration is still 1.0 × 10 ¹⁷ / c
It exceeds m ³ , and further reduction in the oxygen concentration of this SOI layer has been demanded.

A semiconductor substrate which solves this problem is disclosed in Japanese Unexamined Patent Publication No. Hei.
No. 46770 has been proposed. The semiconductor substrate has an SOI structure in which an SiO ₂ film (insulating layer) is formed on a silicon support substrate, and a silicon thin film of about 0.1 to 10 μm is formed on the SiO ₂ film. The oxygen concentration of the substrate is in the range of 10 ¹⁷ to 10 ¹⁹ / cm ³ , and the oxygen concentration of the upper silicon thin film forming the device is 10 ¹⁷ / cm ³ or less. This semiconductor substrate is composed of a CZ-grown silicon substrate having an oxygen concentration of 10 ¹⁸ / cm ^{3, and} a FZ having an oxygen concentration of 10 ¹⁸ / cm ³ or less formed by oxidizing the surface to form a SiO ₂ film (insulating layer).
After bonding with a Z-grown silicon substrate, heat-treating and bonding, the FZ-grown silicon substrate is polished to obtain a 0.1 mm thickness.
A silicon thin film having a thickness of about 1 to 10 μm and an oxygen concentration of 10 ¹⁷ / cm ³ or less is obtained. Since a silicon crystal rod made by the FZ method (floating zone method) does not use a quartz crucible at the time of growing a crystal and can minimize the incorporation of oxygen into a single crystal, the FZ-grown silicon substrate is
There is a feature that the amount of dissolved oxygen is small as compared with the Z silicon substrate.

[0005]

However, Japanese Patent Laid-Open No. 2-4 / 1990
In the semiconductor substrate disclosed in Japanese Patent No. 6770, crystal defects peculiar to the FZ-grown silicon substrate, for example, so-called A and B swirls formed by excessive interstitial silicon atoms, or formed by frozen atomic vacancies, So-called D
Many defects were observed, and slip was likely to occur due to a small amount of dissolved oxygen when bonded to a CZ-grown silicon substrate, and the mechanical strength was still not sufficiently high. At present, silicon crystal rods having a large diameter of about 12 inches are being developed by the CZ method, whereas silicon crystal rods having a diameter of at most about 8 inches can be produced by the FZ method. A diameter of the semiconductor substrate cannot be obtained, and there is a problem that the mass productivity of a semiconductor substrate having a large diameter with a high degree of integration of a DRAM or the like is inferior.

An object of the present invention is to provide an SOI layer in which the entire area of an SOI layer on an insulating layer formed by bonding two CZ-grown silicon wafers has an oxygen concentration of 1.0 × 10 ¹⁷ / cm ³ or less.
Method of manufacturing I substrate and SOI manufactured by this method
It is to provide a substrate . Another object of the present invention is to manufacture an SOI substrate which is sufficiently high in mechanical strength because no slip occurs at the time of bonding two silicon wafers, and which is excellent in mass production.
A method and an SOI substrate manufactured by the method .

[0007]

Means for Solving the Problems The present inventors examined the oxygen concentration that changes from the surface of two bonded silicon wafers after the conventional heat treatment toward the silicon oxide layer (insulating layer). Paying attention to the fact that the solid solubility limit of oxygen is shown at the interface between the SOI layer and the insulating layer on the front surface side, the solid solubility limit is made smaller, and the S in a predetermined region facing the insulating layer is reduced.
By finding conditions for reducing the oxygen concentration in the OI layer,
The present invention has been reached.

As shown in FIGS. 1 (a) to 1 (e), the invention according to claim 1 of the present invention is manufactured from silicon crystal rods pulled up by the CZ method and has an oxygen concentration of 1.0%.
The first silicon wafer 11 and the second silicon wafer 12 in the range of about 1.5 × 10 ¹⁸ / cm ³
After bonding the first and second silicon wafers 11 and 12 by heat treatment and bonding, the first silicon wafer 11 or the second silicon wafer 12 is ground and polished to a predetermined thickness to form a device. This is an improvement in the method for manufacturing an SOI substrate that is to be used as the SOI layer 12a. The characteristic structure is that the bonded first and second silicon wafers 1
1,12 at 1100 to 1200 ° C, preferably 1100
After heat-treating and bonding at a temperature range of 1 to 1150 ° C for 1 to 10 hours, the first and second silicon wafers 11 and 12 bonded before grinding are subjected to a temperature range of 700 to 900 ° C, preferably 800 to 900 ° C. Heat treatment again for 2 hours to reduce the oxygen concentration of the SOI layer 12a to 0.5 to 1.0 ×.
It is to be in the range of 10 ¹⁷ / cm ³ .

Further, as shown in FIG. 1E, the invention according to claim 2 of the present application is manufactured by the manufacturing method according to claim 1.
Was a S OI board.

The first and second silicon wafers of the present invention are both manufactured from a silicon single crystal rod pulled by the CZ method. The oxygen concentration of the silicon wafer finished by cutting this silicon single crystal rod is 1.0 to 1.5 × 10 ¹⁸ / c.
m ³ . The insulating layer is formed on one surface of one or both of the first silicon wafer and the second silicon wafer. In order to improve the bonding, the insulating layer is preferably formed on one side of one of the silicon wafers. As shown in FIG. 1A, an insulating layer 13 is formed on one surface of a second silicon wafer 12 in the figure. As an interface between the insulating layer and the SOI layer after bonding, a bonding interface between two silicon wafers (in FIG.
1) and an interface with a silicon wafer on which an insulating layer is formed before bonding (an interface with the silicon wafer 12 in FIG. 1). The interface between the SOI layer 12a and the insulating layer 13 of the present invention is preferably the interface with the wafer on which the insulating layer is formed, rather than the former bonding interface, because the continuity of the interface is excellent. That is, the silicon wafer 12 on which the SOI layer 12a is formed as shown in FIG.
Another silicon wafer 1 is used as a silicon substrate for the OI layer.
Preferably, 1 is the supporting substrate.

The thickness of the insulating layer is in the range of about 0.5 to 1.0 μm, and the insulating layer is a silicon oxide layer (SiO ₂ layer), which is obtained by thermally oxidizing a silicon wafer or by a CVD method. Formed on one side of the wafer. FIG.
Before bonding the two silicon wafers via the insulating layer as shown in FIG. 2B, it is preferable to clean the silicon wafers with a predetermined cleaning liquid in order to activate the surface to be bonded. As shown in FIG. 1C, the heat treatment after the bonding is performed in a nitrogen (N ₂ ) atmosphere or an oxygen (O ₂ ) atmosphere in a state where the two silicon wafers 11 and 12 are bonded.
100-1200 ° C, preferably 1100-1150 ° C
For 1 to 10 hours, preferably 2 to 5 hours. This creates a covalent bond of silicon at the junction interface,
The two silicon wafers 11 and 12 are bonded together, and the two crystal lattices are integrated. As shown in FIG.
After the two integrated silicon wafers 11 and 12 are allowed to cool to room temperature, they are heat-treated again in the same heat treatment atmosphere at a temperature in the range of 700 to 900 ° C., preferably 800 to 900 ° C. This heat treatment time may be obtained from the relationship between the target thickness of the SOI layer and the oxygen diffusion distance, but is usually preferably about 2 hours. As shown in FIG. 1E, after the reheat treatment, the second silicon wafer 12 serving as the silicon substrate is ground with a grindstone, and then polished with a polishing cloth to be processed into a thin film having a thickness of about 1 to 10 μm. Thereby, the SOI layer 12 for forming a device having a thickness of about 1 to 10 μm is formed.
a is obtained on the insulating layer 13.

[0012]

[Function] The two bonded silicon wafers are put into a 1100-
When heat treatment is performed at 1200 ° C. for 1 to 10 hours, interstitial oxygen atoms in the two silicon wafers are diffused outward to reduce the oxygen concentration in the two silicon wafers. When the two silicon wafers in this state are heat-treated again in a temperature range of 400 to 900 ° C., the interface with the silicon oxide layer as the insulating layer 13 or the SOI layer 12a functions as a gettering site (source), and the SOI layer Oxygen in the SOI layer 12a diffuses toward the junction interface with the insulating layer 13 and
The solid solubility limit of oxygen at the interface between the silicon and the insulating layer 13 is further reduced. When the temperature of the second heat treatment is lower than 400 ° C., the solid solubility limit is reduced, but the diffusion distance of interstitial oxygen atoms becomes shorter from the relations of the following formulas (1) and (2), and the extremely close proximity of the insulating layer 13 Only oxygen in the SOI layer 12a in a minute range only reaches the insulating layer 13, and its concentration does not decrease. L = (D · t) ^1/2 (1) D = B · exp (−E / k · T) (2) where L is a diffusion distance, D is a diffusion coefficient, t is time, B is a constant, E is activation energy, and k is Boltzmann's constant. As typical values, B = 0.13 [cm ² / s],
E = 2.53 [eV] is known. Also 900
When the temperature exceeds ℃, the solid solubility limit of oxygen increases to about 10 ¹⁷ / cm ^3, so that the oxygen concentration of the SOI layer 12a does not decrease again, and the temperature range of the re-heat treatment is determined. What
In addition, the temperature of the heat treatment is preferably 700 to 900 ° C.
No.

[0013]

Next, an embodiment of the present invention will be described in detail with reference to the drawings. Example 1 As shown in FIG. 1A, a first silicon wafer 11 and a second silicon wafer 12 each having a diameter of 5 inches and a thickness of 625 μm were prepared. Second silicon wafer 12
This wafer was heat-treated at 1000 ° C. for 3 hours in a wet oxygen (wetO ₂ ) atmosphere to form an insulating layer 13 made of a silicon oxide layer on one side of the substrate. The two silicon wafers 11 and 12 were treated with H ₂ O and an aqueous solution of H ₂ O ₂ having a specific gravity of 1.1 and an aqueous solution of NH ₄ OH having a specific gravity of 0.9 with H ₂ O: H ₂ O ₂ : NH _4.
SC1 prepared by mixing at a volume ratio of OH = 7: 2: 1
The surfaces of the two silicon wafers were activated by washing with the cleaning solution of (Standard Cleaning 1).

As shown in FIG. 1B, two silicon wafers 11 and 12 were overlapped and joined via an insulating layer 13. Next, as shown in FIG.
Is inserted at a rate of 10 to 15 cm / min into a heat treatment furnace set at a temperature of 800 ° C. in a nitrogen atmosphere at a rate of 10 ° C./min. When the temperature reaches 1100 ° C., the temperature is maintained for 5 hours.
Next, the temperature was lowered at a rate of 4 ° C./min, cooled to 800 ° C., and then taken out of the furnace at room temperature at a rate of 10 to 15 cm / min. Subsequently, as shown in FIG. 1 (d), the temperature was raised in the same nitrogen atmosphere in the same manner. When the temperature reached 900 ° C., the temperature was maintained for 2 hours, and then the temperature was similarly lowered. Further, as shown in FIG. 1E, the surface of the silicon wafer 12 is ground with a grindstone,
Then, the surface is polished with a soft polishing cloth to a thickness of 1
An SOI layer 12a of 10 to 10 μm was formed.

Comparative Example 1 An insulating layer was formed in the same manner as in Example 1 except that the heat treatment shown in FIG. 1C was maintained at 1100 ° C. for 2 hours and the reheat treatment shown in FIG. 1D was omitted. 13 on the SOI layer 12
a was formed.

<Evaluation> Each of the ground and polished SOI substrate of Example 1 and the ground and polished SOI substrate of Comparative Example 1 was subjected to secondary ion mass spectrometry (Secondary Ion Mass Spectroscopy, S
Each of the SOI layers 12a and the insulating layers 1
The concentration of interstitial oxygen dissolved in a part of Sample No. 3 was measured. Table 1 shows the results of these SIMS measurements.

[0017]

[Table 1]

From the SIMS measurement results and Table 1,
While the solid solubility limit at the bonding interface of Comparative Example 1 exceeds 10 ¹⁷ / cm ³ , the solid solubility limit at the bonding interface of Example 1 is 10 ¹⁷ / cm ³ or less, and the insulating layer 13
It has been found that the oxygen concentration of the SOI layer 12a in the entire area of 7.5 μm from the interface was in the range of 0.5 to 1.0 × 10 ¹⁷ / cm ³ .

[0019]

As described above, according to the method for manufacturing an SOI substrate of the present invention, two bonded silicon wafers are heat-treated in a temperature range of 1100 to 1200 ° C. for 1 to 10 hours, and then bonded. By performing the heat treatment again at 400 to 900 ° C., the oxygen concentration in the wafer is reduced, then the solid solubility limit of oxygen at the interface between the insulating layer and the SOI layer is reduced, and the SOI layer adjacent to the insulating layer is reduced. Oxygen concentration of 1
0 ¹⁷ / cm ³ or less, and as a result, a high-quality SOI layer for forming a device in which generation of crystal defects caused by oxygen is suppressed is obtained on the insulating layer.

Since the two silicon wafers are CZ-grown silicon wafers, the SOI substrate of the present invention does not cause a slip during bonding, unlike the semiconductor substrate of Japanese Patent Application Laid-Open No. 2-46770. Thus, the SOI substrate of the present invention also has features that the mechanical strength is sufficiently high and the mass productivity is excellent.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view illustrating a method for manufacturing an SOI substrate according to an embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 11 first silicon wafer 12 second silicon wafer 12a SOI layer 13 insulating layer (silicon oxide layer)

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-259539 (JP, A) JP-A-5-55230 (JP, A) JP-A-4-72931 (JP, A) JP-A-4-1993 124874 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 27/12 H01L 21/02 H01L 21/26-21/268 H01L 21/322-21/326

Claims (2)

(57) [Claims] 2. The method according to claim 1, wherein each of the silicon rods is prepared from a silicon crystal rod pulled by a CZ method and has an oxygen concentration of 1.0 to 1.5.
1st silicon wafer (1 × 10 ¹⁸ / cm ³ )
1) and a second silicon wafer (12) are bonded via an insulating layer (13), and the bonded first and second silicon wafers (1) are bonded together.
After heat-treating and bonding the first and second silicon wafers, the first silicon wafer (11) or the second silicon wafer (12) is ground and polished to a predetermined thickness to form an SOI layer (12a) for device formation. In the method for manufacturing an SOI substrate, the bonded first and second silicon wafers (11, 12) are heat-treated at a temperature range of 1100 to 1200 ° C. for 1 to 10 hours, and then bonded before grinding. The first and second silicon wafers (11, 12) are heat-treated again at a temperature in the range of 700 to 900 ° C. for 2 hours to obtain the SOI.
A method for manufacturing an SOI substrate, wherein the oxygen concentration of the layer (12a) is in the range of 0.5 to 1.0 × 10 ¹⁷ / cm ³ . 2. It is manufactured by the manufacturing method according to claim 1.
S OI substrate.