JP3260514B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AV (Audio Visual) device, an OA (Office Automation) device and the like, and more particularly to a simple matrix type liquid crystal display device having a large-capacity display surface.

[0002]

2. Description of the Related Art In recent years, with the progress of the advanced information society,
Large-screen, large-capacity liquid crystal display devices have been widely used. Among them, especially, the panel structure is simple,
A simple matrix type liquid crystal display device which is advantageous in cost is often used.

As shown in FIG. 5, a driving circuit in a conventional simple matrix type liquid crystal display device has a liquid crystal panel 21 as shown in FIG.
, A data driver 22 connected to the data electrodes X1 to X640, a scan driver 23 connected to the scan electrodes Y1 to Y400 of the liquid crystal panel 21, and a display for supplying display data and timing signals to the data driver 22 and the scan driver 23. It is constituted by a control circuit 24, and the bias voltage generating circuit 25 generates a bias voltage V ₀ ~V ₅ for driving the liquid crystal and the like.

[0004] The bias voltage generating circuit 25 based on the voltage averaging method, the resistive divider and the operational amplifier and the like are adapted to obtain each bias voltage V ₀ ~V _5, each of these bias voltages V ₀ ~V ₅ is supplied to the data driver 22 and the scan driver 23.
Further, the display control circuit 24 sends the display data signal XD and the data shift clock CL to the data driver 22.
2. The data latch signal CL1 and the AC conversion signal M are supplied, and the scan driver 23 supplies the scan start signal ST
The liquid crystal panel 21 is driven by supplying A, the scan shift clock CL1, and the AC conversion signal M.

In the above configuration, the serial display data signal XD shown in FIG. 6A is converted into one scan line by a data shift clock signal CL2 shown in FIG. When the data is accumulated, the display data shifted by the data latch signal CL1 shown in FIG. 3D is loaded into the output circuit of the data driver 22, and the AC signal M shown in FIG.
, The data voltages for one scanning line are applied to the data electrodes X1 to X640 of the liquid crystal panel 21 in parallel and all at once.

On the other hand, a scan start signal STA, a scan shift clock CL1, and an alternating signal M are applied to the scan driver 23, and the scan voltage is sequentially applied to the scan electrodes Y1 to Y400.
Is applied to

FIG. 7 shows an example of a screen display by the above driving. In the figure, a white part is a selected point (lighting state), and a black part is a non-selected point (light-off state). When such display is performed, a signal as shown in FIG. 8A is applied to the scanning electrode Y1, and the data electrodes X1, X2, X
Signals as shown in FIGS. 3B, 3C, and 3D are applied to 3, X4, and X5, respectively.

That is, FIG.
As shown in FIG.
In the frame of No. 4, the selection voltage V0 is applied, and in the frame of the non-selection voltage V1, the selection voltage V5 is sequentially applied. On the other hand, data electrodes X1, X2, X3, X4, and X5 are shown in FIG.
As shown, for example, in the two-frame period, the lighting voltage V5 is sequentially applied in the frame of the non-selection voltage V3, and the lighting voltage V0 is applied in the frame of the non-selection voltage V2 in accordance with the display data.

The liquid crystal driving applied voltage applied to each pixel is:
The difference between the scanning voltage and the data voltage, and the difference between each pixel (Y
The voltage waveforms applied to (1-X1), (Y1-X4), and (Y1-X5) are as shown in FIGS. 9A, 9B, and 9C, respectively.

[0010]

However, when the liquid crystal panel is actually driven as described above and a display on the screen is displayed, shadows are drawn in the vertical and horizontal directions in addition to the desired display. A non-uniform brightness phenomenon called so-called crosstalk occurs, for example, such that a rough display is projected thinly. This phenomenon is caused by the fact that the actual voltage waveform applied to the liquid crystal is
This is considered to be caused by distortion compared to the ideal voltage waveform (see FIG. 9).

The occurrence of the crosstalk depends on the display pattern, and in the example shown in FIG.
Although B and C should originally have the same brightness, the brightness is actually non-uniform due to a change in the effective voltage value due to waveform distortion.

FIG. 11 shows actual electrode voltage waveforms observed in the regions A, B, and C. The data voltage waveform is slightly blunt at the rise and fall of the pulse (see FIGS. 3B, 3C, and 3D), but in the case of the scan voltage waveform, a spike shape synchronized with the data voltage waveform is used. Many distortion voltages are generated (see FIG. 7A). The magnitude and polarity of such a distortion voltage depend on display data, and in particular,
As shown in FIG. 2B, the display data appears remarkably in the case of display data having many patterns that are inverted during one scanning period. It is presumed that this distortion voltage is induced from the data electrode waveform via the capacitance of the liquid crystal.

FIGS. 12 (a), 12 (b) and 12 (c) show liquid crystal applied voltage waveforms (difference between a scanning voltage waveform and a data voltage waveform) in the regions A, B and C, respectively. As is apparent from this figure, in each region, the effective voltage value is increased or decreased by the amount of the spike distortion voltage.

Generally, a liquid crystal panel is a capacitive element having a resistance component by a transparent electrode and a capacitance component of a liquid crystal layer. In a large liquid crystal panel having a large number of display pixels as shown in FIG. The capacitance value of the layer is large, and the length of the electrode wiring is also long. Furthermore, the capacity component tends to be further increased by reducing the cell thickness for the purpose of high-speed response, and there is a limit in lowering the resistance of the transparent electrode.

As a result, due to the large capacitive load of the liquid crystal panel, the capacity charging / discharging current flowing from the driver when a voltage is applied increases, and the voltage is applied to the actual liquid crystal by the long wiring resistance, particularly the scanning electrode resistance. The voltage waveform causes waveform distortion, causing a problem that crosstalk occurs.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and has as its object to provide a liquid crystal display device capable of obtaining uniform display pixels without display unevenness in practical use. .

[0017]

In order to solve the above-mentioned problems, the liquid crystal display device of the present invention has a single liquid crystal panel.
On the other hand, without dividing the liquid crystal panel, a liquid crystal display element having a plurality of data electrodes and scanning electrodes, and applying a data voltage according to display data to the data electrodes,
In a liquid crystal display device including a driving unit for applying a scanning voltage to the scanning electrodes, an inhibit signal is input to each of a group of data electrodes divided by a predetermined number, and within a range shorter than one scanning period cycle. Data voltage output control means for controlling the output timing and voltage of the data voltage in the driving means so as to shift the timing and to input a data voltage having a period in which the voltage becomes 0 volt in the one scanning period ; and ,
The output timing and voltage of the
Rise and fall timing within the period
Are different from each other and some of them overlap
It is characterized by having a period to be forced.

[0018]

According to the above arrangement, one liquid crystal panel can be used.
Without dividing the liquid crystal panel, the output timing of the data voltage supplied to the data electrodes by the data voltage output control means is controlled by an inhibit signal for each group in which the data electrodes are divided into a predetermined number by one scan. It is controlled so as to be shifted within a shorter range than the period cycle. As described above, the data voltage is output at a timing shifted for each of the groups, so that the charge and discharge currents to the liquid crystal can be prevented from being overlapped and concentrated. Further, the data voltage is controlled so as to have a period in which the voltage becomes 0 volt in one scanning period. In addition, data transmission for each group
Output timing and voltage within one scanning period cycle.
Rise and fall timing
Are different, and some of them are
Have a period of time .

Therefore, the distortion of the liquid crystal applied voltage waveform, which is the difference between the scanning voltage waveform and the data voltage waveform, can be suppressed, and the driving frequency components are averaged regardless of the display pattern. In the liquid crystal display device of the above, display unevenness such as crosstalk can be greatly reduced.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS.

As shown in FIG. 1, the simple matrix type liquid crystal display device of this embodiment has data electrodes X1 to X
640 and a liquid crystal panel (liquid crystal display element) 1 having scan electrodes Y1 to Y400, a data driver 2 connected to data electrodes X1 to X640, and scan electrodes Y1 to Y40
0, a display control circuit 4 for outputting display data and timing signals, and the like, and a bias voltage generating circuit 5 for outputting bias voltages V _{0 to} V ₅ for driving the liquid crystal. The data driver 2, the scanning driver 3, the display control circuit 4, and the bias voltage generating circuit 5 constitute driving means of the present liquid crystal display device. Further, the present liquid crystal display device includes an inhibit signal generating circuit (data voltage output control means) 6 having a monomultivibrator (not shown) and the like.

The data electrodes X1 to X640 are connected to 160
Each book is divided into four subgroups, and one data driver 2 is provided in each subgroup. The bias voltage generating circuit 5 supplies bias voltages V ₀ , V ₁ , V ₂ , V ₃ , V ₄ , V ₅ to the data driver 2, and supplies bias voltages V ₀ , V ₁ , V ₄ to the scan driver 3. ,
And supplies the V _5. The bias voltages V ₀ and V ₅ are lighting voltages for turning on each pixel in the liquid crystal panel 1, and the bias voltages V ₂ and V ₃ are data-side non-selection voltages. The bias voltages V ₁ and V ₄ are scanning-side non-selection voltages.

The display control circuit 4 supplies the data driver 2 with the display data signal XD, the data shift clock CL2, the data latch signal CL1, and the AC conversion signal M, and also supplies the scan driver 3 with the scan start signal STA, The scan shift clock CL1 and the AC signal M are supplied. The display control circuit 4
The inhibit signal generation circuit 6 supplies the latch signal CL1
Supply. The inhibit signal generation circuit 6 to which the latch signal CL1 is input includes the inhibit signals INH1 to INH
By supplying H4 to the data drivers 2 of each of the above subgroups, the output timing of display data in the data driver 2 is controlled.

In the above configuration, the serial display data signal XD shown in FIG. 2A is stored in the shift register inside the data driver for one scanning line by the data shift clock signal CL2 shown in FIG. 2B. Then, the display data shifted by the data clutch signal CL1 shown in FIG. 9D is loaded to the output circuit of the data driver.

In the inhibit signal generating circuit 6,
The internal mono multivibrator is triggered by the input latch signal CL1. Thus, the inhibit signal generation circuit 6 is configured to output the signals (e), (f), and (g) in FIG.
The output signal shown in FIG.
1 to INH4 are supplied to the respective data drivers 2. Each of the inhibit signals INH1 to INH4 has an “H” period having a width shorter than the cycle of the latch signal CL1 (in the figure,
TH) and an “L” period (denoted by TL in the figure), and each of the signals is shifted in phase by TD period.
When the input inhibit signal is in the “L” period, the data driver 2 outputs the V1 and V4 levels (scan-side non-selection voltage) according to the AC signal M, regardless of the state of the display data. In the "H" period, a data voltage waveform is output.

FIG. 2I shows the scanning voltage waveform Y1, and FIGS. 2J, 2K, 2L, and 2M show the data voltage waveform (X as an example) for each sub-group obtained by dividing the data electrodes.
1, X161, X321, and X481), and FIGS. 3A, 3B, 3C, and 3D show liquid crystal applied voltage waveforms (scanning voltage waveform and data voltage) based on the scanning voltage waveform and data voltage waveform. (Difference from voltage waveform). In addition, the display data example is the reverse display for one whole scanning period.

The scan voltage waveform is the same as the conventional one, but each data voltage waveform has the inhibit signals INH1 to INH1 to IH so that the output timing is shifted by a predetermined period for each subgroup.
It is controlled by NH4. Therefore, unlike the conventional case, the peak current value due to the overlap of the charge / discharge current to the liquid crystal panel is greatly reduced, the induction to the scanning voltage waveform is reduced, and the spike-like distortion causing the crosstalk described above is reduced. The voltage is also greatly reduced.

The inhibit signals INH1 to INH1 to IH
Due to NH4, a period in which the voltage becomes 0 volt in each scanning period (corresponding to the "L" period of the inhibit signal) is provided in the liquid crystal applied voltage waveform. 8) is averaged irrespective of the display pattern. Therefore, even when the optical response characteristic of the liquid crystal panel has a remarkable frequency dependency, a good display image can be obtained.

By actually using the driving waveform according to the present invention, a large-capacity liquid crystal panel (640 * 400) as shown in FIG.
When dots (1/400 DUTY, 10 inches) were driven under the following setting conditions, uniform and good display without crosstalk was obtained in any display pattern.

Frame frequency: ６０60 Hz Latch signal cycle: 40 μs Inhibit signal set value: TH 35.5 μs TL 4.5 μs TD 1.5 μs In this embodiment, in order to generate each inhibit signal, a mono-multi Although the vibrator is used, another configuration may be used. For example, the data shift clock CL2 may be digitally counted and created. In addition, although the number of divisions of the data electrode is 160, it is not limited to this.

The number of divisions of the data electrodes, the "H" and "L" periods (TH, TL) of the inhibit signal INH, and the period (TD) of shifting the phase for each subgroup are defined by the scanning period T.
(Period of the latch signal CL1), the output characteristics of the driver, and the waveform distortion caused by the charging / discharging current to the liquid crystal panel. However, the inhibit signal INH
If the "L" period is too long, the effective value of the voltage applied to the liquid crystal and the operation margin (on-off ratio) decrease, so that the "L" period is preferably about 10% or less of the scanning cycle T.

Further, in the above-described embodiment, the case where the scanning waveform is sequentially scanned one by one has been described. However, the present invention is not limited to this, and the scanning selection number is plural (or the total number of lines). And a driving method in which a voltage is simultaneously applied to the data electrodes at the time of scanning selection, for example, SID
Multi-line selection scanning (MLS) proposed in
Method: S.Ihara, et al., SID92Digest, p232-235 1992)
Or all line selection scanning (AA method: TJScheffer, et a
l., SID92Digest, p228-231 1992).

FIG. 4 is a voltage waveform diagram when the present invention is applied to the MLS system. Here, a case where the number of scanning selections is set to three will be described as an example. The same figure (a)
(B) As shown in (c), a voltage of Vr or -Vr is applied to sequentially scan. The voltage when not selected is 0 V
It is.

As in the above embodiment, the data electrode lines are 16
The sub-groups are divided into 0 subgroups, and the inhibit signals INH1 to INH4 with slightly shifted phases are supplied to each subgroup. FIGS. 9D and 9F show INH1 and INH4 as examples, respectively. The data driver outputs 0 V (scan-side non-selection voltage) when the inhibit signal is in the “L” period (TL), and outputs the data voltage corresponding to the display in the “H” period (TH) in the same manner as in the above embodiment. Is set to be output. As a result, the data voltage waveforms at the data electrode X1 and the data electrode X640 of each sub-group are as shown in FIGS. 9 (e) and 9 (g), and the output timing of the data voltage from each data driver is the same as in the previous embodiment. Since each subgroup slightly shifts, the charge / discharge current to the liquid crystal panel does not flow simultaneously and overlap, and the waveform distortion on the scanning side is greatly reduced. Therefore, even in this case, a display image with less display unevenness such as crosstalk can be obtained.

[0035]

As described above, the liquid crystal display device of the present invention divides the liquid crystal panel into one liquid crystal panel.
Without the above, the inhibit signal is input for each group of data electrodes divided by a predetermined number within a range shorter than the period of one scanning period , and the voltage becomes 0 volt in the one scanning period. Data voltage output control means for controlling the output timing and voltage of the data voltage in the driving means so as to input a data voltage having a period , and
The output timing and voltage are not
Rise and fall timings are different from each other.
Period when some of them are output overlapping each other.
This is a configuration having a space .

Therefore, the waveform distortion of the voltage waveform applied to the liquid crystal can be largely suppressed, and the driving frequency component is averaged regardless of the display pattern. There is an effect that a display image with less display unevenness such as a talk can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the operation of the liquid crystal display device.

FIG. 3 is a waveform diagram of a liquid crystal applied voltage based on the waveform of FIG.

FIG. 4 is a waveform diagram of a liquid crystal applied voltage in another embodiment of the present invention.

FIG. 5 is a block diagram illustrating a configuration of a conventional liquid crystal display device.

FIG. 6 is a waveform chart for explaining the operation of the liquid crystal display device.

FIG. 7 is an explanatory diagram showing a display pattern by the liquid crystal display device.

FIG. 8 is a waveform chart of voltages applied to respective electrodes for obtaining the display pattern.

FIG. 9 is a waveform diagram of a liquid crystal applied voltage based on the waveform of FIG.

FIG. 10 is an explanatory diagram illustrating a display screen when crosstalk occurs in the display pattern illustrated in FIG. 7;

FIG. 11 is a waveform diagram of the voltage applied to each electrode when the crosstalk occurs.

FIG. 12 is a waveform diagram of a liquid crystal applied voltage based on the waveform of FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Liquid crystal panel (liquid crystal display element) 2 Data driver (drive means) 3 Scan driver (drive means) 4 Display controller circuit (drive means) 5 Bias voltage generation circuit (drive means) 6 Inhibit signal generation circuit (data voltage output control means) )

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G09G 3/36 G02F 1/133 545 G09G 3/20

Claims (1)

(57) [Claims] 1. A liquid crystal panel for one liquid crystal panel.
A liquid crystal display comprising: a liquid crystal display element having a plurality of data electrodes and scanning electrodes without division; and a driving unit for applying a data voltage according to display data to the data electrodes and applying a scanning voltage to the scanning electrodes. In the apparatus, an inhibit signal is input for each group of data electrodes divided by a predetermined number, the timing is shifted within a range shorter than one scanning period cycle, and becomes 0 volt during the one scanning period. Data voltage output control means for controlling the output timing of the data voltage and the voltage in the driving means so as to input a data voltage having a period , and the output timing of the data voltage for each of the groups and
And voltage rise and rise within one scan period cycle.
Fall timings are different from each other.
A liquid crystal display device characterized in that the liquid crystal display device has a period in which the sections overlap each other and are output .