JP3260224B2 - Circuit board manufacturing method - Google Patents

Circuit board manufacturing method

Info

Publication number
JP3260224B2
JP3260224B2 JP30205593A JP30205593A JP3260224B2 JP 3260224 B2 JP3260224 B2 JP 3260224B2 JP 30205593 A JP30205593 A JP 30205593A JP 30205593 A JP30205593 A JP 30205593A JP 3260224 B2 JP3260224 B2 JP 3260224B2
Authority
JP
Japan
Prior art keywords
metal
circuit board
circuit
brazing
brazing material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP30205593A
Other languages
Japanese (ja)
Other versions
JPH07162105A (en
Inventor
好彦 辻村
美幸 中村
紘一 内野
明 宮井
俊之 蔭山
克典 寺野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP30205593A priority Critical patent/JP3260224B2/en
Publication of JPH07162105A publication Critical patent/JPH07162105A/en
Application granted granted Critical
Publication of JP3260224B2 publication Critical patent/JP3260224B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、セラミックス基板に金
属回路と金属放熱板が形成されてなる回路基板の製造方
法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit board in which a metal circuit and a metal radiator plate are formed on a ceramic substrate.
It relates to the law.

【0002】近年、ロボットやモーター等の産業機器の
高性能化に伴い、大電力・高能率インバーター等大電力
モジュールの変遷が進んでおり、半導体素子から発生す
る熱も増加の一途をたどっている。この熱を効率よく放
散するため、大電力モジュール基板では従来より様々な
方法が取られてきた。特に最近、良好な熱伝導性を有す
るセラミックス基板が利用できるようになったため、セ
ラミックス基板上に銅板等の金属板を接合し、金属回路
を形成後、そのままあるいはメッキ等の処理を施してか
ら半導体素子を実装し、回路の反対側には、放熱フィン
を取り付けるための金属放熱板を接合する構造も採用さ
れつつある。
[0002] In recent years, with the advancement of the performance of industrial equipment such as robots and motors, the transition of high-power modules such as high-power and high-efficiency inverters has been progressing, and the heat generated from semiconductor elements has been increasing steadily. . In order to efficiently dissipate this heat, various methods have conventionally been used for large power module substrates. In particular, since ceramic substrates having good thermal conductivity have become available recently, a metal plate such as a copper plate is bonded on the ceramic substrate, and after forming a metal circuit, the semiconductor substrate is subjected to a treatment such as plating or plating. A structure in which an element is mounted and a metal heat radiating plate for attaching a heat radiating fin to the opposite side of the circuit is being adopted.

【0003】金属とセラミックスの接合法には種々ある
が、回路基板の製造という点からは、Mo-Mn 法、活性金
属ろう付け法、硫化銅法、DBC法、銅メタライズ法等
をあげることができる。特に、大電力モジュール基板で
注目されている高熱伝導性の窒化アルミニウム基板と銅
板とを接合するには、両者間に活性金属を含むろう材
(以下、単に「ろう材」という)を介在させ、加熱処理
して接合体とする活性金属ろう付け法(例えば特開昭60
-177634 号公報)や、表面が酸化処理された窒化アルミ
ニウム基板と銅板を銅の融点以下でCu-Oの共晶温度以上
で加熱して接合するDBC法(例えば特開昭56-163093
号公報)等が採用されている。
[0003] There are various joining methods of metal and ceramics, but from the viewpoint of manufacturing circuit boards, Mo-Mn method, active metal brazing method, copper sulfide method, DBC method, copper metallizing method and the like can be mentioned. it can. In particular, in order to join a high thermal conductive aluminum nitride substrate and a copper plate, which are attracting attention in high power module substrates, a brazing material containing an active metal (hereinafter simply referred to as a “brazing material”) is interposed between the two. An active metal brazing method for forming a joined body by heat treatment (for example,
No. 177634), and a DBC method in which an aluminum nitride substrate and a copper plate whose surfaces are oxidized are heated and joined at a temperature lower than the melting point of copper and higher than the eutectic temperature of Cu-O (for example, JP-A-56-163093).
Publication No.) is adopted.

【0004】活性金属ろう付け法は、DBC法に比べて
以下の利点がある。 (1)上記接合体を得るための処理温度が低いので、窒
化アルミニウム基板と銅板の熱膨張差によって生じる残
留熱応力が小さい。 (2)ろう材が延性金属であるので、ヒートショックや
ヒートサイクルに対して耐久性が大である。
The active metal brazing method has the following advantages over the DBC method. (1) Since the processing temperature for obtaining the above joined body is low, the residual thermal stress caused by the difference in thermal expansion between the aluminum nitride substrate and the copper plate is small. (2) Since the brazing material is a ductile metal, it has high durability against heat shock and heat cycles.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、活性金
属ろう付け法を用いても、ヒートショックやヒートサイ
クル等の熱衝撃、熱履歴によって生じる損傷に対して充
分に満足された耐久性があるとはいえず新しい技術の提
案が待たれていた。そこで、金属回路(通常はセラミッ
クス基板の上面に設けられる)の体積を反対面に形成さ
れる金属放熱板の体積の50〜90%に調整する(特開
昭63-24815号公報)、金属放熱板の厚みを金属回路のそ
れの50%以下にする(特開平5-170564号公報)等によ
ってある程度は改善された。
However, even if the active metal brazing method is used, it does not have sufficient durability against damage caused by heat shock and heat history such as heat shock and heat cycle. Nevertheless, a proposal for a new technology was awaited. Therefore, the volume of the metal circuit (usually provided on the upper surface of the ceramic substrate) is adjusted to 50 to 90% of the volume of the metal radiator plate formed on the opposite surface (JP-A-63-24815). The improvement was made to some extent by reducing the thickness of the plate to 50% or less of that of the metal circuit (Japanese Patent Application Laid-Open No. H5-170564).

【0006】しかしながら、これらの技術においては、
金属回路と金属放熱板の材質は共に銅であるので、両者
の体積を変えるということは熱膨張による応力のバラン
スを異なったものにすることと同等であるので、回路基
板自体の耐熱衝撃性が向上して金属回路又は金属放熱板
が剥離することが少なくなったが、金属回路に半導体素
子と、金属放熱板にベース銅板を半田付けする際の急激
な温度上昇によって回路基板の反りが著しくなり、それ
によって金属放熱板とベース銅板との間に隙間ができ、
その部分が半田付け後にボイドとなる危険性があった。
However, in these techniques,
Since the material of the metal circuit and the metal radiator plate are both copper, changing the volume of both is equivalent to making the balance of stress due to thermal expansion different, so the thermal shock resistance of the circuit board itself is reduced. Although the metal circuit or the metal radiator plate is less likely to peel off due to the improvement, the warpage of the circuit board becomes remarkable due to the rapid temperature rise when soldering the semiconductor element to the metal circuit and the base copper plate to the metal radiator plate. , Thereby creating a gap between the metal heat sink and the base copper plate,
There was a risk that the part would become a void after soldering.

【0007】本発明者らは、以上のような問題点を解決
するために種々検討した結果、金属回路と金属放熱板を
形成させる金属板とセラミックス基板との接合層に着目
し、この接合層中に特定の空隙を設けることによって両
者の熱膨張係数の違いに起因する熱応力を吸収させるこ
とができることを見いだした。そこで、更に検討を進め
たところ、接合層中に特定量の空隙を設けるには、活性
金属ろう付け法で使用されるろう材ペースト中の有機結
合剤を通常の量よりも例えば3〜5倍量多くするか、特
定寸法の縞状又は格子状にろう材ペーストを印刷する
か、又はその両方によることが好ましく、それによって
容易に上記空隙を形成できると共に、驚くべきことに
は、製造された回路基板の反り量も小さくなることを見
いだし、本発明を完成させたものである。
As a result of various studies to solve the above problems, the present inventors have focused on a bonding layer between a metal plate and a ceramic substrate which form a metal circuit and a metal radiator plate. It has been found that the thermal stress caused by the difference in the thermal expansion coefficient between the two can be absorbed by providing a specific gap therein . Therefore, further study
However, to provide a specific amount of voids in the bonding layer,
Organic bonding in brazing material paste used in metal brazing
The amount of the mixture is, for example, 3 to 5 times larger than the usual amount, or
Print brazing material paste in stripes or grids of fixed size
Or preferably both, so that
The above-mentioned gap can be easily formed, and surprisingly
Shows that the amount of warpage of the manufactured circuit board is also reduced.
The present invention has been completed.

【0008】[0008]

【課題を解決するための手段】すなわち、本発明は、セ
ラミックス基板の一方の面に金属回路、他方の面には金
属放熱板が活性金属ろう付け法によって接合されてなる
回路基板において、接合層中に存在する直径1mm以上
の空隙の占有率が接合層全体の体積に対して0.3〜3
、反り量が−70μm以下(但し、回路基板の反り方
向は金属回路面に対し凹となる方向を「+」として表
示。)とするに際し、次の(イ)及び/又は(ロ)の手
段を施すことを特徴とする回路基板の製造方法である。 (イ)活性金属ろう付け法で使用されるろう材ペースト
は、金属成分と有機溶剤と有機結合剤とを含み、有機結
合剤の割合を金属成分と有機溶剤との合計120重量部
あたり、4.7〜7.3重量部とする。 (ロ)活性金属ろう付け法で使用されるろう材ペースト
を縞状又は格子状に塗布するが、その縞状又は格子状の
塗布パターンを、ろう材ペーストのない溝の幅(b)が
30〜100μmで、溝同士の間隔(a)を3〜5mm
とする。
That is, according to the present invention, a metal circuit is joined to one side of a ceramic substrate, and a metal heat sink is joined to the other side by an active metal brazing method.
In the circuit board, the occupancy of diameter 1mm or more voids present in the junction layer is the volume of the entire bonding layer 0.3-3
% , The amount of warpage is -70 μm or less (however, how to warp the circuit board)
In the direction, the direction that is concave with respect to the metal circuit surface is expressed as “+”.
Shown. ), The following (a) and / or (b) hands
A method of manufacturing a circuit board , comprising providing a step . (A) Brazing material paste used in active metal brazing
Contains a metal component, an organic solvent and an organic binder,
The ratio of the mixture is 120 parts by weight in total of the metal component and the organic solvent.
4.7 to 7.3 parts by weight. (B) Brazing material paste used in active metal brazing
Is applied in the form of stripes or grids.
When the width (b) of the groove without the brazing material paste is
30 to 100 μm, and the interval (a) between the grooves is 3 to 5 mm
And

【0009】以下、さらに詳しく本発明について説明す
ると、本発明で使用されるセラミックス基板としては、
窒化アルミニウム基板、ベリリア基板、アルミナ基板等
をあげることができるが、中でも窒化アルミニウム基板
が好ましく、その密度は機械的強度及び電気特性の点か
ら相対密度で95%以上であることが望ましい。セラミ
ックス基板の厚みとしては0.4〜0.7mm程度が適
切である。
Hereinafter, the present invention will be described in more detail. As the ceramic substrate used in the present invention,
Examples thereof include an aluminum nitride substrate, a beryllia substrate, and an alumina substrate. Among them, an aluminum nitride substrate is preferable, and its density is desirably 95% or more in terms of mechanical strength and electrical characteristics. A suitable thickness of the ceramic substrate is about 0.4 to 0.7 mm.

【0010】一方、金属回路及び/又は金属放熱板の材
質は、銅、アルミニウム、タングステン、モリブデン等
であるが、銅が一般的である。金属回路の厚みとして
は、近年、電流密度が向上していく傾向から0.3mm
よりも厚い方が好ましく、また金属放熱板の厚みは0.
2mm以下であることが望ましい。
On the other hand, the material of the metal circuit and / or metal radiator plate is copper, aluminum, tungsten, molybdenum or the like, but copper is generally used. As the thickness of the metal circuit, the current density has been increasing in recent years,
Thickness is more preferable, and the thickness of the metal radiating plate is 0.1 mm.
It is desirably 2 mm or less.

【0011】セラミックス基板の一方の面に金属回路
を、また他方の面には金属放熱板を形成する方法として
は、セラミック基板と金属板との接合体をエッチングす
る方法、金属板から打ち抜かれた金属回路及び/又は金
属放熱板のパターンをセラミックス基板に接合後不要の
金属部分を剥離する方法等によって行うことができ、こ
れらの際における金属板又はパターンとセラミックス基
板との接合には、活性金属ろう付け法が採用される。
As a method of forming a metal circuit on one surface of the ceramic substrate and a metal heat radiating plate on the other surface, a method of etching a joined body of the ceramic substrate and the metal plate, a method of punching from the metal plate. After joining the pattern of the metal circuit and / or the metal radiating plate to the ceramic substrate, it can be performed by a method of peeling off an unnecessary metal portion. In these cases, the joining of the metal plate or the pattern and the ceramic substrate is performed using an active metal. A brazing method is employed .

【0012】活性金属ろう付け法におけるろう材の金属
成分は、銀と銅を主成分とし、溶融時のセラミックス基
板との濡れ性を確保するために活性金属を副成分とす
る。この活性金属成分は、セラミックス基板と反応して
酸化物や窒化物を生成させ、それらの生成物がろう材と
セラミックス基板との結合を強固なものにする。活性金
属の具体例をあげれば、チタン、ジルコニウム、ハフニ
ウム、ニオブ、タンタル、バナジウムやこれらの化合物
である。これらの比率としては、銀69〜75重量部と
銅25〜31重量部の合計量100重量部あたり活性金
属3〜35重量部である。
The metal component of the brazing material in the active metal brazing method contains silver and copper as main components, and uses the active metal as a sub-component in order to ensure wettability with the ceramic substrate during melting. The active metal component reacts with the ceramic substrate to generate oxides and nitrides, and these products strengthen the bond between the brazing material and the ceramic substrate. Specific examples of the active metal include titanium, zirconium, hafnium, niobium, tantalum, vanadium, and compounds thereof. These ratios are 3 to 35 parts by weight of the active metal per 100 parts by weight of the total of 69 to 75 parts by weight of silver and 25 to 31 parts by weight of copper.

【0013】活性金属ろう付け法で使用されるろう材ペ
ーストは、上記ろう材の金属成分に有機溶剤と有機結合
剤を加え、ロール、ニーダ、バンバリミキサー、万能混
合機、らいかい機等で混合することによって調製するこ
とができる。有機溶剤としては、メチルセルソルブ、テ
ルピネオール、イソホロン、トルエン等、また有機結合
剤としてはエチルセルロース、メチルセルロース、ポリ
メタクリレート等が使用される。
[0013] brazing material paste used in the active metal brazing method, the organic solvent agent and an organic binder in addition to the metal component of the brazing material, a roll, kneader, Banbury mixer, universal mixer, a stone mill, etc. Can be prepared by mixing. Examples of the organic solvent include methylcellosolve, terpineol, isophorone, and toluene, and examples of the organic binder include ethylcellulose, methylcellulose, and polymethacrylate.

【0014】本発明において、接合層に直径1mm以上
の空隙を生じさせる手段としては、(イ)活性金属ろう
付け法で使用されるろう材ペースト中の有機結合剤を通
常の量よりも例えば3〜5倍量多く添加して有機結合剤
の微小な固形物を残存させ、ろう付けの加熱処理時に有
機結合剤を焼失させる方法、(ロ)ろう材ペーストをセ
ラミックス基板上に塗布する際に、あらかじめ数十μm
の間隔に縞状又は格子状に溝が生じるように塗布する
法、又は(イ)と(ロ)の両方である。縞状又は格子状
の塗布パターンは、図1、図2に示されるように、ろう
材ペーストのない溝同士の間隔(a)が3〜5mmで、
ろう材ペーストのない溝の幅(b)を30〜100μm
とする。これによって、容易に直径1mm以上の空隙の
特定量を形成させることができると共に、回路基板の反
り量も−70μm以下(但し、回路基板の反り方向は金
属回路面に対し凹となる方向を「+」として表示。)と
小さくなる。回路基板の反り量が小さくなると、上記半
田付け後のボイドの発生が激減する。
In the present invention, means for forming voids having a diameter of 1 mm or more in the bonding layer include the following: (a) The amount of the organic binder in the brazing material paste used in the active metal brazing method is, for example, three times less than the usual amount. A method in which a fine solid of the organic binder is left by adding about 5 times larger amount to burn out the organic binder at the time of heat treatment for brazing; (b) when applying the brazing material paste on the ceramic substrate, Dozens of μm in advance
Write applied so that the grooves occurs in a striped or lattice pattern spacing
Law, or both (a) and (b). Striped or latticed
As shown in FIGS. 1 and 2, the coating pattern of
The interval (a) between grooves without material paste is 3 to 5 mm,
The width (b) of the groove without the brazing material paste is 30 to 100 μm.
And As a result, the gap of 1 mm or more in diameter is easily formed.
A specific amount can be formed, and the circuit board
The amount of warping is -70 μm or less (however, the warping direction of the circuit board is gold
The direction that is concave with respect to the generic circuit surface is displayed as “+”. )When
Become smaller. When the amount of warpage of the circuit board decreases,
The occurrence of voids after padding is drastically reduced.

【0015】本発明におけるセラミックス基板と金属回
路間の接合層、及びセラミックス基板と金属放熱板間の
接合層に存在する直径1mm以上の空隙の占有率が接合
層全体の体積に対して0.3〜3%であることが必要で
ある。空隙の占有率が3%をこえるとセラミックス基板
と金属回路又は金属放熱板との接合強度が弱まり、また
0.3%未満では上記した熱応力を吸収する効果が充分
に現れなくなる。
In the present invention, the occupation ratio of the void having a diameter of 1 mm or more in the bonding layer between the ceramic substrate and the metal circuit and the bonding layer between the ceramic substrate and the metal radiating plate is 0.3 to the total volume of the bonding layer. It needs to be 必要 3%. If the occupation ratio of the voids exceeds 3%, the bonding strength between the ceramic substrate and the metal circuit or metal radiator plate will be weakened, and if it is less than 0.3%, the effect of absorbing the thermal stress will not be sufficiently exhibited.

【0016】本発明における直径1mm以上の空隙は軟
エックス線によって測定することができ、また接合層全
体の体積は回路基板の断面のSEM観察から求めること
ができる。
In the present invention, the gap having a diameter of 1 mm or more can be measured by a soft X-ray, and the volume of the entire bonding layer can be obtained from SEM observation of a cross section of the circuit board.

【0017】[0017]

【実施例】以下、本発明を実施例と比較例をあげて具体
的に説明する。 実施例1〜5 比較例1〜6 銀、銅及びジルコニウムの各金属粉末を、銀粉末75重
量部、銅粉末25重量部にジルコニウム粉末5重量部、
テルピネオール15重量部(これらの合計は120重
量部である。)、及び有機結合剤としてポリイソブチル
メタアクリレートのトルエン溶液を固形分で表1に示す
比率で加えてよく混練し、ろう材ペーストを調製した。
このろう材ペーストを窒化アルミニウム基板(51×3
6×0.65mm)の回路面側(表面)にスクリーン印
刷によって全面印刷するか(実施例1と2、比較例1と
2)、又は表1及び図1に示す格子状のパターンに塗布
(実施例3〜5、比較例3〜6)、また放熱面側(裏
面)には全面塗布した。その際の塗布量(乾燥後)は6
〜8mg/cm2 とした。
The present invention will be specifically described below with reference to examples and comparative examples. Examples 1-5 Comparative Examples 1-6 Each metal powder of silver, copper and zirconium, 75 parts by weight of silver powder, 25 parts by weight of copper powder, 5 parts by weight of zirconium powder,
15 parts by weight of terpineol (the total of these is 120
Parts. ) And a toluene solution of polyisobutyl methacrylate as an organic binder were added in solid content at the ratio shown in Table 1 and kneaded well to prepare a brazing material paste.
This brazing material paste is applied to an aluminum nitride substrate (51 × 3
Whether the entire surface is printed by screen printing on the circuit surface side (front surface) of 6 × 0.65 mm) (Examples 1 and 2, Comparative Example 1
2) or a grid-like pattern shown in Table 1 and FIG. 1 (Examples 3 to 5 and Comparative Examples 3 to 6), and the entire surface was applied to the heat radiation surface side (back surface). The coating amount (after drying) at that time is 6
88 mg / cm 2 .

【0018】次に、ろう材ペーストの塗布された窒化ア
ルミニウム基板の表面には金属回路形成用銅板(51×
36×0.5mm)を、また裏面には金属放熱板用銅板
(51×36×0.2mm)を接触配置してから、真空
度1×10-5Torr以下の真空下、温度900℃で3
0分加熱した後、2℃/ 分の降温速度で冷却して接合
体を製造した。
Next, a copper plate (51 ×) for forming a metal circuit is formed on the surface of the aluminum nitride substrate on which the brazing material paste is applied.
36 × 0.5 mm) and a copper plate (51 × 36 × 0.2 mm) for a metal radiator on the back side, and then at a temperature of 900 ° C. under a vacuum of 1 × 10 −5 Torr or less. 3
After heating for 0 minutes, the assembly was cooled at a temperature lowering rate of 2 ° C./min to produce a joined body.

【0019】次いで、この接合体の銅板上にUV硬化タ
イプのエッチングレジストをスクリーン印刷で塗布後、
塩化第2銅溶液を用いてエッチング処理を行って銅板不
要部分を溶解除去し、さらにエッチングレジストを5%
苛性ソーダ溶液で剥離した。このエッチング処理後の接
合体には、銅回路パターン間に残留不要ろう材や活性金
属成分と窒化アルミニウム基板との反応物があるので、
それを除去するため、温度60℃、10%のフッ化アン
モニウム溶液に10分間浸漬した。
Next, a UV-curable etching resist is applied on the copper plate of the joined body by screen printing.
Unnecessary portions of the copper plate are dissolved and removed by performing an etching process using a cupric chloride solution, and the etching resist is further reduced by 5%.
Peeled off with caustic soda solution. In the joined body after this etching process, there is a residual unnecessary brazing material or a reaction product between the active metal component and the aluminum nitride substrate between the copper circuit patterns.
To remove it, it was immersed in a 10% ammonium fluoride solution at a temperature of 60 ° C. for 10 minutes.

【0020】これら一連の処理を経て製作された回路基
板について、軟エックス線(ソフテックス社製「SV−
100AW」 測定条件:電圧30kV 電流3mA)
によって接合層全体に存在する直径1mm以上の空隙を
測定し、それを回路基板の断面をSEM観察して求めら
れた接合層全体の体積で割り算して占有率を算出した。
また、ピール強度をプッシュプルゲージを用いて測定し
た。
A circuit board manufactured through these series of processes is provided with a soft X-ray (“SV-X” manufactured by Softex Corporation).
100AW "Measurement conditions: voltage 30kV, current 3mA)
A gap having a diameter of 1 mm or more existing in the entire bonding layer was measured, and the resulting space was divided by the volume of the entire bonding layer obtained by observing the cross section of the circuit board by SEM to calculate the occupancy.
The peel strength was measured using a push-pull gauge.

【0021】更に、回路基板のヒートサイクル(熱衝
撃)試験を行った。ヒートサイクル試験は、気中、−4
0℃×30分保持後、25℃×10分間放置、更に12
5℃×30分保持後、25℃×10分間放置を1サイク
ルとして行い、銅板が剥離開始したヒートサイクル回数
を測定した。また、250℃に加熱したときの回路基板
の反り量を非接触式レーザー変位計で測定した。更に
は、回路基板を厚さ4mmのベース銅板に250℃のリ
フロー炉中で無荷重にて半田付けを行った際のボイドの
発生率〔(ボイド面積)/(回路基板面積)×100〕
を超音波探査機(日立製作所社製「AT−7000」)
で測定した。これらの結果を表1に示す。
Further, a heat cycle (thermal shock) test of the circuit board was performed. The heat cycle test was aerial, -4
After holding at 0 ° C. × 30 minutes, leave at 25 ° C. × 10 minutes, and further 12
After holding at 5 ° C. for 30 minutes, leaving as one cycle at 25 ° C. for 10 minutes, the number of heat cycles at which the copper plate started peeling was measured. Further, the amount of warpage of the circuit board when heated to 250 ° C. was measured by a non-contact laser displacement meter. Furthermore, the rate of void formation when a circuit board is soldered to a base copper plate having a thickness of 4 mm with no load in a reflow furnace at 250 ° C. [(void area) / (circuit board area) × 100]
The ultrasonic probe (“AT-7000” manufactured by Hitachi, Ltd.)
Was measured. Table 1 shows the results.

【0022】[0022]

【表1】 [Table 1]

【0023】[0023]

【発明の効果】本発明の回路基板は、それをベース銅板
に半田付けする際のボイド発生率を著しく減少させるこ
とができ、またピール強度が大きく、ヒートショックや
ヒートサイクル等の熱衝撃、熱履歴に対する耐久性も充
分に高いものである。
According to the circuit board of the present invention, the rate of void generation when soldering the circuit board to the base copper plate can be remarkably reduced, the peel strength is large, and the thermal shock such as heat shock and heat cycle, heat shock, etc. The durability against the history is also sufficiently high.

【図面の簡単な説明】[Brief description of the drawings]

【図1】セラミックス基板上に塗布されたろう材ペース
トのパターンを示す平面図
FIG. 1 is a plan view showing a pattern of a brazing material paste applied on a ceramic substrate.

【図2】図1の拡大図FIG. 2 is an enlarged view of FIG. 1;

【符号の説明】[Explanation of symbols]

1 セラミックス基板 2 ろう材ペーストのない溝を示す線 a ろう材ペーストのない溝同士の間隔 b ろう材ペーストのない溝の幅 Reference Signs List 1 Ceramic substrate 2 Line indicating groove without brazing material paste a Interval between grooves without brazing material paste b Width of groove without brazing material paste

───────────────────────────────────────────────────── フロントページの続き (72)発明者 蔭山 俊之 福岡県大牟田市新開町1 電気化学工業 株式会社 大牟田工場内 (72)発明者 寺野 克典 福岡県大牟田市新開町1 電気化学工業 株式会社 大牟田工場内 審査官 林 茂樹 (56)参考文献 特開 昭59−126739(JP,A) 実開 平2−140870(JP,U) (58)調査した分野(Int.Cl.7,DB名) H05K 1/02 H05K 3/38 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Toshiyuki Kageyama 1 Shinkaicho, Omuta-shi, Fukuoka Prefecture Inside the Omuta Plant of Electrochemical Industry Co., Ltd. (72) Inventor Katsunori Terano 1 Shinkaicho, Omuta-shi, Fukuoka Prefecture Electrochemical Industry Omuta Plant Examiner Shigeki Hayashi (56) References JP-A-59-126739 (JP, A) JP-A-2-140870 (JP, U) (58) Fields investigated (Int. Cl. 7 , DB name) H05K 1 / 02 H05K 3/38

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 セラミックス基板の一方の面に金属回
路、他方の面には金属放熱板が活性金属ろう付け法によ
って接合されてなる回路基板において、接合層中に存在
する直径1mm以上の空隙の占有率が接合層全体の体積
に対して0.3〜3%、反り量が−70μm以下(但
し、回路基板の反り方向は金属回路面に対し凹となる方
向を「+」として表示。)とするに際し、次の(イ)及
び/又は(ロ)の手段を施すことを特徴とする回路基板
の製造方法。 (イ)活性金属ろう付け法で使用されるろう材ペースト
は、金属成分と有機溶剤と有機結合剤とを含み、有機結
合剤の割合を金属成分と有機溶剤との合計120重量部
あたり、4.7〜7.3重量部とする。 (ロ)活性金属ろう付け法で使用されるろう材ペースト
を縞状又は格子状に塗布するが、その縞状又は格子状の
塗布パターンを、ろう材ペーストのない溝の幅(b)が
30〜100μmで、溝同士の間隔(a)を3〜5mm
とする。
A ceramic circuit is provided with a metal circuit on one side and a metal radiator on the other side by an active metal brazing method.
In the circuit board formed by bonding I, from 0.3 to 3% occupancy of diameter 1mm or more voids present in the junction layer is the volume of the entire bonding layer, warpage -70μm less (however
The direction of warping of the circuit board is concave with respect to the metal circuit surface.
The direction is displayed as "+". ), The following (a) and
And / or (b) means for applying a circuit board.
Manufacturing method. (A) Brazing material paste used in active metal brazing
Contains a metal component, an organic solvent and an organic binder,
The ratio of the mixture is 120 parts by weight in total of the metal component and the organic solvent.
4.7 to 7.3 parts by weight. (B) Brazing material paste used in active metal brazing
Is applied in the form of stripes or grids.
When the width (b) of the groove without the brazing material paste is
30 to 100 μm, and the interval (a) between the grooves is 3 to 5 mm
And
JP30205593A 1993-12-01 1993-12-01 Circuit board manufacturing method Expired - Fee Related JP3260224B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30205593A JP3260224B2 (en) 1993-12-01 1993-12-01 Circuit board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30205593A JP3260224B2 (en) 1993-12-01 1993-12-01 Circuit board manufacturing method

Publications (2)

Publication Number Publication Date
JPH07162105A JPH07162105A (en) 1995-06-23
JP3260224B2 true JP3260224B2 (en) 2002-02-25

Family

ID=17904373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30205593A Expired - Fee Related JP3260224B2 (en) 1993-12-01 1993-12-01 Circuit board manufacturing method

Country Status (1)

Country Link
JP (1) JP3260224B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023146122A1 (en) * 2022-01-28 2023-08-03 삼성전자주식회사 Display device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3890539B2 (en) * 1996-04-12 2007-03-07 Dowaホールディングス株式会社 Ceramic-metal composite circuit board
JP4584764B2 (en) * 2005-04-25 2010-11-24 Dowaホールディングス株式会社 Method for manufacturing ceramic-metal composite circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023146122A1 (en) * 2022-01-28 2023-08-03 삼성전자주식회사 Display device

Also Published As

Publication number Publication date
JPH07162105A (en) 1995-06-23

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