JP3258110B2 - Driving method of antiferroelectric liquid crystal panel - Google Patents

Driving method of antiferroelectric liquid crystal panel

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Publication number
JP3258110B2
JP3258110B2 JP02072793A JP2072793A JP3258110B2 JP 3258110 B2 JP3258110 B2 JP 3258110B2 JP 02072793 A JP02072793 A JP 02072793A JP 2072793 A JP2072793 A JP 2072793A JP 3258110 B2 JP3258110 B2 JP 3258110B2
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Japan
Prior art keywords
liquid crystal
voltage
voltage value
stable state
state
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JP02072793A
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Japanese (ja)
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JPH06214215A (en
Inventor
近藤  真哉
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Citizen Watch Co Ltd
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Citizen Watch Co Ltd
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  • Liquid Crystal Display Device Control (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、反強誘電性液晶を液晶
層とする、マトリックス状の画素を有する液晶表示パネ
ルや液晶光シャッターアレイ等の反強誘電性液晶パネル
の駆動法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving an antiferroelectric liquid crystal panel such as a liquid crystal display panel having a matrix of pixels and a liquid crystal optical shutter array, using an antiferroelectric liquid crystal as a liquid crystal layer. is there.

【0002】[0002]

【従来の技術】反強誘電性液晶を用いた液晶パネルは、
日本電装(株)及び昭和シェル石油(株)らの特開平2
ー173724号公報で広視野角を有すること、高速応
答が可能なこと、マルチプレックス特性が良好なこと等
が報告されて以来、精力的に研究がなされている。
2. Description of the Related Art A liquid crystal panel using an antiferroelectric liquid crystal,
Japanese Patent Application Laid-Open No. 2 by Nippondenso Co., Ltd. and Showa Shell Sekiyu KK
173724 discloses that it has a wide viewing angle, high-speed response, good multiplex characteristics, etc., and has been vigorously studied.

【0003】図2は反強誘電性液晶をディスプレイとし
て用いる場合の構成図である。クロスニコルに合わせた
偏光板21a,21bの間に、どちらかの偏光板の偏光
軸と電圧無印加時に於ける分子の長軸方向が平行になる
ように液晶セル22を置き、電圧無印加時に黒が、電界
印加時には白が表示できるようにしている。このような
セル構成に於いて液晶セルに電圧を印加したとき、それ
に対する透過率変化をグラフにプロットすると図1のよ
うなヒステリシスループを描くことが出来、電圧を印加
し増加させていく場合に透過率が変化し始める電圧値を
V1、透過率の変化が飽和する電圧値をV5、逆に電圧
値を減少させていく場合に透過率が減少し始める電圧値
をV2、また前記電圧値と逆電圧を印加し、その絶対値
を増加させた場合に透過率が変化し始める電圧値をV
3、透過率変化が飽和する電圧値をV6、逆に電圧の絶
対値を減少させた場合に透過率が変化し始める電圧値を
V4とする。この図1からは、液晶分子にあるパルス波
を印加した場合、このパルス幅と電圧値の積の値がしき
い値以上の値をとる場合に第1の安定状態(強誘電状
態)が選択され、また印加電圧の極性の違いによって、
第2の安定状態(強誘電状態)が選択され、この第1の
状態及び第2の状態から、前記パルス幅と電圧値の積の
値の絶対値があるしきい値より低い場合には第3の安定
状態(反強誘電状態)が選択されることがわかる。
FIG. 2 is a configuration diagram when an antiferroelectric liquid crystal is used as a display. The liquid crystal cell 22 is placed between the polarizing plates 21a and 21b in accordance with the crossed Nicols so that the polarization axis of one of the polarizing plates and the long axis direction of the molecule when no voltage is applied are parallel. Black and white are displayed when an electric field is applied. In such a cell configuration, when a voltage is applied to the liquid crystal cell, a change in the transmittance with respect to the voltage is plotted on a graph, whereby a hysteresis loop as shown in FIG. 1 can be drawn. The voltage value at which the transmittance starts to change is V1, the voltage value at which the change in the transmittance is saturated is V5, and the voltage value at which the transmittance starts to decrease when the voltage value is reduced is V2. When a reverse voltage is applied and its absolute value is increased, the voltage value at which the transmittance starts to change is V
3. The voltage value at which the transmittance change is saturated is V6, and the voltage value at which the transmittance starts to change when the absolute value of the voltage is reduced is V4. From FIG. 1, the first stable state (ferroelectric state) is selected when a certain pulse wave is applied to the liquid crystal molecules, and when the product of the pulse width and the voltage value exceeds a threshold value. And depending on the polarity of the applied voltage,
A second stable state (ferroelectric state) is selected, and if the absolute value of the product of the pulse width and the voltage value is lower than a certain threshold from the first state and the second state, It can be seen that the stable state (antiferroelectric state) of No. 3 is selected.

【0004】時分割駆動の方法としては、種々の方法が
提案されている。図3はこの反強誘電性液晶を含むマト
リックス形の液晶パネルの電極構成を示したものであ
る。走査電極Y1〜Y128に順次周期的に選択電圧を
印加し、信号電極X1〜X160には所定の情報信号を
走査電極信号と同期させて並列的に印加し、選択された
画素の液晶分子を表示情報に応じてスイッチングさせる
時分割駆動が採用されている。図4は特開平2ー173
724号に示されている駆動法で、1画面を書き込むた
めに、2つの走査期間の書き込みを行い、第1走査期間
と第2走査期間はそれぞれの波形の電圧値が互いに電圧
値0Vに対して対称な関係になっており、これにより、
交流化を図っている。図4は図3における画素部A1の
ON状態とOFF状態をセットする時の電圧波形と画素
の透過率の変化を示している。選択期間中、走査電極Y
1に印加される信号は3位相からなり、第1位相で必ず
1度OFF状態(反強誘電状態)にリセットし、第2位
相では、第1位相での状態を保持し、第3位相でON状
態(強誘電状態)にセットするかどうか選択する。第3
位相目が強誘電状態にセットするためのしきい値電圧を
越えた場合には、ON状態(強誘電状態)にセットさ
れ、前記しきい値電圧を越えない場合はOFF状態(反
強誘電状態)を保持する。
Various methods have been proposed as a method of time division driving. FIG. 3 shows an electrode configuration of a matrix type liquid crystal panel including the antiferroelectric liquid crystal. A selection voltage is sequentially and periodically applied to the scan electrodes Y1 to Y128, and a predetermined information signal is applied in parallel to the signal electrodes X1 to X160 in synchronization with the scan electrode signal to display the liquid crystal molecules of the selected pixel. A time-division drive that switches according to information is employed. FIG.
According to the driving method described in No. 724, writing is performed in two scanning periods to write one screen. In the first scanning period and the second scanning period, the voltage values of the respective waveforms are different from each other with respect to the voltage value of 0V. And symmetrical relationship,
We are aiming for exchange. FIG. 4 shows a voltage waveform and a change in transmittance of the pixel when the ON state and the OFF state of the pixel unit A1 in FIG. 3 are set. During the selection period, scan electrode Y
The signal applied to 1 has three phases. In the first phase, the signal is always reset to the OFF state (antiferroelectric state). In the second phase, the state in the first phase is maintained. Select whether to set to ON state (ferroelectric state). Third
If the phase exceeds the threshold voltage for setting the ferroelectric state, it is set to the ON state (ferroelectric state), and if it does not exceed the threshold voltage, the state is OFF (the antiferroelectric state). ) Hold.

【0005】ここで、時分割駆動の場合の非選択期間の
電圧は、図1に於いて印加電圧を増加させた場合に透過
率が変化し始める電圧値V1以下でかつ印加電圧の絶対
値を減少させた場合に透過率が変化する電圧値V2以上
に設定されていた。
Here, the voltage in the non-selection period in the case of the time-division driving is equal to or less than a voltage value V1 at which the transmittance starts to change when the applied voltage is increased in FIG. The voltage value is set to a voltage value V2 or more at which the transmittance changes when reduced.

【0006】[0006]

【発明が解決しようとする課題】良好に時分割駆動を行
うためには走査側の電圧値をVC 、信号側の電圧値をV
D とした場合には電圧の設定は上記で説明した第1走査
期間について考えると、|VC +VD |≧V5かつV2
≦|VC −VD |≦V1を満たす必要があり、ここで時
分割駆動を行う場合、一般にVC >VD で駆動されるの
で、V1とV5の差が大きい液晶材料を用いる場合には
上記の関係式よりVD の値の範囲がかなり限定される。
よって、V1とV5の差が大きい液晶材料を用いた場
合、電圧設定範囲がかなり狭く規制され、良好な表示を
行うことが困難であった。そこで本発明は非選択期間の
電圧値の範囲を従来の範囲よりも広く設定することによ
り、V1とV5の電圧値の差が大きな液晶材料に関して
も、容易に良好な表示が可能な反強誘電性液晶の駆動方
法を提供することを目的としている。
In order to perform the time-division driving satisfactorily, the voltage value on the scanning side is V C and the voltage value on the signal side is V C.
When D is set, considering the first scanning period described above, | V C + V D | ≧ V5 and V2
≦ │V C −V D │ ≦ V1. When time-division driving is performed here, since driving is generally performed at V C > V D , when a liquid crystal material having a large difference between V 1 and V 5 is used. The range of the value of V D is considerably limited by the above relational expression.
Therefore, when a liquid crystal material having a large difference between V1 and V5 is used, the voltage setting range is regulated to be very narrow, and it has been difficult to perform good display. Accordingly, the present invention sets the range of the voltage value in the non-selection period wider than the conventional range, so that even a liquid crystal material having a large difference between the voltage values V1 and V5 can easily display good antiferroelectricity. It is an object of the present invention to provide a method for driving a transparent liquid crystal.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
に本発明の駆動方法では、選択期間において第1の安定
状態を選択する電圧を画素に印加した時には、非選択期
間において、V2以下でV3以上の電圧値が印加された
後、反強誘電性液晶が第1の安定状態から第3の安定状
態へスイッチングするのに必要な時間よりも短い時間内
に、V2以上V1以下の電圧値を画素へ再度印加し、反
強誘電性液晶が第1の安定状態から他の安定状態へスイ
ッチングしないように信号側電圧波形を設定することを
特徴としている。また、非選択期間において、走査電極
に印加される走査側電圧波形はオフセット電圧値として
一定であることが好ましい。
In order to achieve the above object, according to the driving method of the present invention , the first stable operation is performed during the selection period.
When the voltage for selecting the state is applied to the pixel,
During the period, a voltage value of V2 or less and V3 or more was applied.
Then, the antiferroelectric liquid crystal is changed from the first stable state to the third stable state.
Less than the time required to switch to
Then, a voltage value between V2 and V1 is applied to the pixel again,
The ferroelectric liquid crystal switches from the first stable state to another stable state.
It is characterized in that the signal side voltage waveform is set so as not to cause switching . In the non-selection period, the scanning electrode
The scan-side voltage waveform applied to the
It is preferably constant.

【0008】[0008]

【作用】非選択期間に於いては選択期間で設定された第
1図に於ける3つの安定状態を保持しなければならな
い。例えば第1の安定状態をとる場合には非選択期間内
に印加される電圧値はヒステリシスループの電圧値V2
以上で電圧値V1以下にする必要があった。第1の安定
状態をとった場合に、その後に印加されるパルス波の電
圧値がV2以下でV3以上の間の値の場合には第3の安
定状態を取るが、このV2以下でV3以上の電圧値を持
つパルス波の後に、液晶分子が第3の安定状態へ戻るた
めに必要な時間よりも十分短い時間内に、V1とV2の
間の電圧値のパルス波が印加されれば第1の安定状態か
ら第3の安定状態へ戻ることはないことが判明した。通
常の反強誘電性液晶は第3の安定状態から第1の安定状
態もしくは第2の安定状態へスイッチングする時間より
も、第1の安定状態もしくは第2の安定状態から第3の
安定状態へスイッチングする時間の方が長いために、非
選択時に印加される1パルスのパルス幅は、第1の安定
状態から第3の安定状態へスイッチングするためには十
分短い。
In the non-selection period, the three stable states set in the selection period in FIG. 1 must be maintained. For example, in the case of the first stable state, the voltage value applied during the non-selection period is the voltage value V2 of the hysteresis loop.
As described above, it is necessary to make the voltage value V1 or less. In the first stable state, if the voltage value of the pulse wave applied thereafter is between V2 and V3, the third stable state is obtained. If a pulse wave having a voltage value between V1 and V2 is applied within a time sufficiently shorter than the time required for the liquid crystal molecules to return to the third stable state after the pulse wave having the voltage value It has been found that the first stable state does not return to the third stable state. The normal antiferroelectric liquid crystal changes from the first stable state or the second stable state to the third stable state longer than the time required for switching from the third stable state to the first stable state or the second stable state. Since the switching time is longer, the pulse width of one pulse applied at the time of non-selection is short enough to switch from the first stable state to the third stable state.

【0009】このことより、従来は例えば第1の安定状
態を選択した場合には、非選択時に印加される電圧値の
範囲はV2以上でかつV1以下にしなければならず、電
圧値の幅が狭かったが、本発明の考え方では、非選択時
に印加される電圧値の下限の範囲が、V2以下でV3以
上に設定されていれば良いために電圧値の範囲が広くで
きる。例えば、図1に於いて、|V1−V2|≧|V2
−V4|ならば走査側電圧の非選択時に於けるOFFセ
ット電圧をV2にした場合には、非選択期間のパルス波
の上限の電圧値はV1まで大きくすることができ、下限
の電圧値はV2−(V1−V2)の値を取れ、従来に比
べて信号側電圧の幅を大きくとることができる。
From the above, conventionally, for example, when the first stable state is selected, the range of the voltage value applied at the time of non-selection must be not less than V2 and not more than V1. Although narrow, in the concept of the present invention, the lower limit range of the voltage value applied at the time of non-selection may be set to V2 or less and V3 or more, so that the voltage value range can be widened. For example, in FIG. 1, | V1−V2 | ≧ | V2
−V4 |, when the OFF set voltage at the time of non-selection of the scanning side voltage is set to V2, the upper limit voltage value of the pulse wave in the non-selection period can be increased to V1, and the lower limit voltage value is The value of V2− (V1−V2) can be obtained, and the width of the signal side voltage can be increased as compared with the related art.

【0010】時分割駆動に於いては、走査側電圧波形の
選択期間に印加される選択パルスの絶対値と信号側電圧
波形の絶対値の差が小さい方が、ON状態を選択する場
合に画素に印加されるパルス波の電圧値とOFF状態を
選択する場合に画素に印加されるパルス波の電圧値の差
が大きくでき、ヒステリシスループの立ち上がりや立ち
下がりがあまり急峻でない液晶材料も容易に駆動するこ
とが出来る。そのために信号側電圧の絶対値はできるだ
け大きな方が良好な駆動が行える。上記より、本発明に
於いては従来よりも信号側電圧の絶対値を大きくするこ
とが出来るために多くの液晶材料に対し、容易に良好な
表示を行うことが出来る。
In time-division driving, the smaller the difference between the absolute value of the selection pulse applied during the selection period of the scanning-side voltage waveform and the absolute value of the signal-side voltage waveform, the smaller the difference between the pixel and the ON state when selecting the ON state. When the OFF state is selected, the difference between the voltage of the pulse wave applied to the pixel and the voltage value of the pulse wave applied to the pixel can be increased, making it easy to drive a liquid crystal material in which the rise and fall of the hysteresis loop is not very steep. You can do it. For this reason, it is preferable that the absolute value of the signal side voltage is as large as possible to perform good driving. As described above, in the present invention, since the absolute value of the signal-side voltage can be made larger than that in the related art, good display can be easily performed on many liquid crystal materials.

【0011】[0011]

【実施例】以下本発明の実施例を図面に基づいて詳細に
説明する。図6は本実施例に用いた液晶パネルのセル構
成図である。本実施例で用いた液晶パネルは約2μの厚
さの反強誘電性液晶層66を持つ一対のガラス基板63
a、63bから構成されている。ガラス基板の対抗面に
は電極64a、64bが形成されており、その上に高分
子配向膜65a、65bが塗布され、ラビング処理がな
されている。さらに1方のガラス基板の外側に偏光板の
偏光軸とラビング軸とが平行になるように第1の偏光板
61aが設置されており、他方のガラス基板の外側には
第1の偏光板61aの偏光軸と90°異なるようにして
第2の偏光板61bが設置されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 6 is a cell configuration diagram of the liquid crystal panel used in this embodiment. The liquid crystal panel used in this embodiment is a pair of glass substrates 63 having an antiferroelectric liquid crystal layer 66 having a thickness of about 2 μm.
a and 63b. Electrodes 64a and 64b are formed on the opposite surface of the glass substrate, and polymer alignment films 65a and 65b are applied thereon, and a rubbing process is performed. Further, a first polarizing plate 61a is provided outside the one glass substrate so that the polarizing axis of the polarizing plate and the rubbing axis are parallel to each other, and the first polarizing plate 61a is provided outside the other glass substrate. The second polarizing plate 61b is installed so as to be different from the polarization axis of the second polarizing plate by 90 °.

【0012】本発明で用いた反強誘電性液晶は図1のよ
うなヒステリシスループを描いたとき、V1=18V、
V2=4V、V3=ー18V、V4=ー4V、V5=3
0V、V6=ー30Vであった。図5はこの反強誘電性
液晶を用いた場合の、本発明における駆動波形である。
駆動波形は2つの走査期間から構成され、また1選択期
間は4パルスで構成される。第1走査期間と第2走査期
間は互いに0Vに対して対称な電圧値を取っている。各
パルス幅は100μs、走査電極に印加される第1走査
期間の選択期間の1位相目から第3位相目は0V、第4
位相目は30V、残りの非選択期間のOFFセット電圧
は4.5Vの電圧波形が印加され、第2走査期間の選択
期間の第1位相目から第3位相目の電圧値は0V、第4
位相目の場合がー30V、残りの非選択期間のOFFセ
ット電圧は−4.5Vの電圧波形が印加される。また信
号電極側には、走査電極側と同期してON状態の時の第
1位相から第2位相目は0V、第3位相は12V、第4
位相はー12Vの電圧波形が印加される。またOFF状
態の時の第1位相と第2位相は0V、第3位相はー12
V、第4位相は12Vの電圧波形が印加される。フレー
ム周波数は約60msとして駆動を行った。この結果、従
来に比べて信号側電圧値を大きく設定でき、また走査側
電圧の非選択時のOFFセット電圧値を低く設定するこ
とが出来るために良好な表示を行うことが出来た。
When the antiferroelectric liquid crystal used in the present invention has a hysteresis loop as shown in FIG.
V2 = 4V, V3 = -18V, V4 = -4V, V5 = 3
0V, V6 = -30V. FIG. 5 shows a driving waveform in the present invention when the antiferroelectric liquid crystal is used.
The driving waveform is composed of two scanning periods, and one selection period is composed of four pulses. The first scanning period and the second scanning period have voltage values symmetric with respect to 0V. Each pulse width is 100 μs, the first to third phases in the selection period of the first scanning period applied to the scanning electrodes are 0 V,
A voltage waveform of 30 V is applied at the phase and an OFF set voltage of 4.5 V is applied during the remaining non-selection period. The voltage values of the first to third phases during the selection period of the second scanning period are 0 V, and
In the case of the phase, a voltage waveform of −30 V is applied and the OFF set voltage of the remaining non-selection period is −4.5 V. On the signal electrode side, the first phase from the first phase in the ON state in synchronization with the scanning electrode side is 0V, the third phase is 12V, and the fourth phase is 12V.
A voltage waveform having a phase of -12 V is applied. In the OFF state, the first phase and the second phase are 0 V, and the third phase is -12.
For the V and fourth phases, a voltage waveform of 12 V is applied. Driving was performed with a frame frequency of about 60 ms. As a result, the signal-side voltage value can be set higher than in the prior art, and the OFF-set voltage value when the scanning-side voltage is not selected can be set lower, so that good display can be performed.

【0013】[0013]

【発明の効果】反強誘電性液晶ディスプレイに於いて、
本発明の駆動方法を用いることにより、使用する反強誘
電性液晶材料の特性に寄与されることなく良好な表示が
容易に行える。
In the antiferroelectric liquid crystal display,
By using the driving method of the present invention, good display can be easily performed without contributing to the characteristics of the antiferroelectric liquid crystal material used.

【図面の簡単な説明】[Brief description of the drawings]

【図1】反強誘電性液晶の特性を示すヒステリシスカー
ブを示す図である。
FIG. 1 is a diagram showing a hysteresis curve showing characteristics of an antiferroelectric liquid crystal.

【図2】本発明の反強誘電性液晶パネルと偏光板の構成
図である。
FIG. 2 is a configuration diagram of an antiferroelectric liquid crystal panel and a polarizing plate according to the present invention.

【図3】本発明の反強誘電性液晶パネルの電極構造を示
す図である。
FIG. 3 is a diagram showing an electrode structure of the antiferroelectric liquid crystal panel of the present invention.

【図4】従来の駆動方法を示す図である。FIG. 4 is a diagram showing a conventional driving method.

【図5】本発明に用いた駆動方法を示す図である。FIG. 5 is a diagram showing a driving method used in the present invention.

【図6】本発明の反強誘電性液晶パネルのセル構成図で
ある。
FIG. 6 is a diagram showing a cell configuration of the antiferroelectric liquid crystal panel of the present invention.

【符号の説明】[Explanation of symbols]

21a、21b 偏光板 22 液晶セル 61a、61b 偏光板 62a、62b シール材 63a、63b ガラス基板 64a、64b 電極 65a、65b 高分子配向膜 66 反強誘電性液晶 X1〜X160 信号電極 Y1〜Y128 走査電極 A1〜A128 画素部 21a, 21b Polarizing plate 22 Liquid crystal cell 61a, 61b Polarizing plate 62a, 62b Sealing material 63a, 63b Glass substrate 64a, 64b Electrode 65a, 65b Polymer alignment film 66 Antiferroelectric liquid crystal X1 to X160 Signal electrode Y1 to Y128 Scanning electrode A1 to A128 pixel section

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 走査電極と信号電極を有する1対の基板
間に反強誘電性液晶を狭持し、画素を備える反強誘電性
液晶パネルの駆動方法であって、反強誘電性液晶は電圧
を印加して強誘電状態となる第1の安定状態と、逆極性
の電圧を印加して強誘電状態となる第2の安定状態と、
反強誘電状態である第3の安定状態とを有し、前記画素
に印加する電圧値を増大させて前記画素の透過率が増加
し始める電圧値をV1、その後透過率が飽和し、電圧値
減少させて透過率が低下し始める電圧値をV2、逆極
性の電圧値の絶対値を増大させて透過率が増加し始める
電圧値をV3とし、前記画素に電圧を印加する走査期間
は選択期間と非選択期間とを有し、前記選択期間におい
て、反強誘電性液晶は第1の安定状態が選択され、前記
非選択期間において、前記画素へはV2以下でV3以上
の電圧値を印加した後、反強誘電性液晶が第1の安定状
態から第3の安定状態へ戻るために必要な時間よりも短
い時間内に、V1以下でV2以上の電圧値を印加し、反
強誘電性液晶が第1の安定状態から他の安定状態へスイ
ッチングしないように、前記非選択期間における前記信
号電極に印加する信号側電圧波形を設定することを特徴
とする反強誘電性液晶パネルの駆動方法。
1. A method of driving an antiferroelectric liquid crystal panel having pixels by sandwiching an antiferroelectric liquid crystal between a pair of substrates having a scanning electrode and a signal electrode, wherein the antiferroelectric liquid crystal is Voltage
And a first stable state in which a ferroelectric state is
A second stable state that becomes a ferroelectric state by applying a voltage of
A third stable state that is an antiferroelectric state, wherein the pixel
V1 is the voltage value at which the transmittance of the pixel starts to increase by increasing the voltage value applied to the pixel, and V2 is the voltage value at which the transmittance is saturated and the voltage value begins to decrease by decreasing the voltage value.
Transmittance begins to increase by increasing the absolute value of the
A scanning period in which a voltage value is V3 and a voltage is applied to the pixel
Has a selection period and a non-selection period, and in the selection period
The first stable state is selected for the antiferroelectric liquid crystal.
In the non-selection period, V2 or less and V3 or more are applied to the pixel.
Anti-ferroelectric liquid crystal is in the first stable state
Less than the time required to return from state to the third stable state
Within a short time, a voltage value of V1 or less and V2 or more is applied,
The ferroelectric liquid crystal switches from the first stable state to another stable state.
The signal during the non-selection period to prevent switching.
The feature is to set the signal side voltage waveform applied to the signal electrode
Driving method of antiferroelectric liquid crystal panel.
【請求項2】 前記非選択期間において、走査電極に印
加される走査側電圧波形はオフセット電圧値として一定
であることを特徴とする請求項1に記載の反強誘電性液
晶パネルの駆動方法。
2. The method according to claim 1, wherein the scanning electrode is marked during the non-selection period.
The applied scan-side voltage waveform is constant as the offset voltage value
The antiferroelectric liquid according to claim 1, wherein
Driving method of crystal panel.
JP02072793A 1993-01-14 1993-01-14 Driving method of antiferroelectric liquid crystal panel Expired - Fee Related JP3258110B2 (en)

Priority Applications (1)

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JP02072793A JP3258110B2 (en) 1993-01-14 1993-01-14 Driving method of antiferroelectric liquid crystal panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP02072793A JP3258110B2 (en) 1993-01-14 1993-01-14 Driving method of antiferroelectric liquid crystal panel

Publications (2)

Publication Number Publication Date
JPH06214215A JPH06214215A (en) 1994-08-05
JP3258110B2 true JP3258110B2 (en) 2002-02-18

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Country Link
JP (1) JP3258110B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6008787A (en) * 1995-04-07 1999-12-28 Citizen Watch Co., Ltd. Antiferrolectric liquid crystal panel and method for driving same
US5973659A (en) 1995-06-07 1999-10-26 Citizen Watch Co., Ltd. Method of driving antiferroelectric liquid crystal display
JP3672317B2 (en) * 1995-09-18 2005-07-20 シチズン時計株式会社 Liquid crystal display

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