JP3256225B2 - LED array printer - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a non-impact printer device for performing printing, and more particularly, to a method of controlling the current flowing through a plurality of printing elements in such a printer device. The present invention relates to a circuit for controlling uniformity.

2. Description of the Prior Art In an LED (light emitting diode) type print head described in U.S. Pat.
The magnitude of the current flowing through D can be controlled by a current mirror circuit. Characteristic components of this current mirror circuit are a variable resistor and a voltage source, which are used to control the respective currents flowing through the LEDs, thereby controlling the outputs of the LEDs. It allows for adjustments to be more uniform. If the LEDs are divided into a plurality of groups and the LEDs in each group are driven by driver chips corresponding to that group, each driver chip can be adjusted individually, so that the driver chips LED to drive
In addition, sufficient current can be passed so that the emission intensity of each of these LEDs is comparable to the emission intensity of LEDs driven by other driver chips on the printhead. . In addition, making the current adjustable in this way is related to the fact that the amount of light output from the LED must be sufficient to expose a recording medium such as a photoconductor.

The LED printhead described in U.S. Pat. No. 4,885,597 maintains the LED emission intensity constant over time by allowing both the effects of aging and temperature to be compensated for on the LED. I can do it. In this printhead, the magnitude of the current flowing through the LEDs is controlled by using a plurality of digitally addressable current mirrors combined with each driver chip. Here, as the current control signal,
Since a multi-bit digital signal is used, the multi-bit digital signal needs to be transmitted to a plurality of driver chips, and the emission intensity of the LED must be adjusted by transmitting the signal.

Therefore, one of the issues to be solved is related to the fact that temperature affects the output of the LED,
How to correct the influence of temperature with better accuracy during use of the print head.

A further problem to be solved is that the structure for supplying a current control signal to the print head for compensating for the effects of temperature and other factors has been very complicated. Problem.

Further issues to be solved are the LED drive voltage V _LED ,
Or if the V _CC may fluctuate or if multiple LEDs
The problem is that the light output of the LED must be kept constant in a situation where the LED is turned on and off at different times.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to solve these problems and to provide an improved printer device, wherein the printer device has improved means for ascertaining the local temperature of the printhead, Improved means to allow consistent operation, and variations
A printer device having improved means and the like for quicker and more precise correction.

SUMMARY OF THE INVENTION The above and other objects can be clearly understood by referring to the following description in the present specification. These objects are achieved by the following non-impact printer. That is, the non-impact printer device includes a recording head having a plurality of recording elements for performing recording on a recording medium, and a plurality of recording heads for selectively driving the plurality of recording elements in accordance with respective image data signals. A driving means including a current driving channel, the driving means further comprising: a current having a magnitude related to a current supplied to the plurality of recording elements. A non-impact type non-impact type, further comprising a special additional current drive channel in which the elements are not combined, and further comprising monitoring means for monitoring a parameter related to the current flowing through the special additional channel. Printer device.

The present invention, in another aspect thereof, provides the following non-impact printer. That is, the non-impact printer device includes a recording head having a plurality of recording elements for performing recording on a recording medium, and driving means for selectively driving the plurality of recording elements in accordance with respective image data signals. Transmitting means including a data bus means for transmitting a multi-bit image data signal defining a duration of a recording operation of a certain recording element on the data bus means; A multi-bit bus used to control the level of current flowing through one recording element on one of a plurality of lines of the bus means which is also used for transmitting image data signals; A non-impact printer device comprising: the transmission means for transmitting a digital signal.

The present invention, in still another aspect thereof, provides the following non-impact printer device. That is, the non-impact printer device includes a recording head having a plurality of recording elements for performing recording on a recording medium, and driving means for selectively driving the plurality of recording elements in accordance with respective image data signals. The driving means includes a plurality of data register means, each of the data register means is combined with each of the recording elements, to store the image data signal, Data bus means for transmitting an image data signal; common connection means for commonly connecting the data bus means to the plurality of data register means; means for generating a token bit signal; By sequentially outputting the token bit signal from each of the stages, each of the plurality of data register means is sequenced. And a multi-stage shift register means for selectively receiving an image data signal, wherein the driving means further includes a current control means for controlling a level of a current flowing to each of the recording elements, Current control means for adjusting a level of a current flowing through each of the recording elements in response to a multi-bit digital signal, the current control means further comprising: Register means including a plurality of registers for storing the converted digital signal, second register means for storing and shifting the token bit signal, and a token bit signal in the second register means. In response to the multi-bit digital data stored in a corresponding one of the plurality of registers of the first register means. And means for latching the signals, it is non-impact type printer apparatus according to claim.

According to still another aspect of the present invention, there is provided a non-impact printer device for performing recording as described below. That is, the non-impact printer device includes: a plurality of printing elements forming a plurality of printing element groups; a plurality of integrated circuit driver chips for driving each of the plurality of printing element groups; The first in response to the bit digital signal
First digitally addressable current conducting means for selectively establishing a bias voltage; and b) generating a bias current in response to the first bias voltage and the second multi-bit digital signal. 2) digitally addressable second current conducting means for establishing a bias voltage; and c) means for selectively passing current through a selected one of the plurality of recording elements to be energized. D) current mirror type current driving means for controlling a level of a current flowing through the selected recording element to make the level of the current a magnitude related to the second bias voltage; All of the element a), the element b), the element c), and the element d) are provided on each of the plurality of driver chips. It is a bet type of printer.

According to the present invention, the following non-impact printer device is provided. That is, the non-impact printer device comprises a series of a plurality of energizable point-like radiation sources arranged in a row and means for supplying a data signal representing data to be printed. And responsive to the data signal, to determine which of the plurality of point radiation sources should be selected and activated, logic circuit means, and in response to the logic circuit means Current driving circuit means for supplying a current flowing to a point radiation source selected to be energized, the current driving circuit means including a first transistor, and supplying a current flowing through the first transistor. A master circuit for generating a reference current, and a plurality of slave circuits for supplying respective slave drive circuit currents to a plurality of radiation sources selected to be energized; and Select to (B) selectively determining which of the plurality of first current conducting devices should be brought into the current conducting state; Current control means, further comprising: (c) a current source means configured to increase a current generated by itself in response to a temperature rise of the print head; d) coupling the current source means to the plurality of first current conducting devices and increasing a level of a respective current flowing through a selected first current conducting device of the plurality of first current conducting devices; Adjustable bias means for generating an adjusted voltage bias signal in response to an increase in the current level; and (e) in response to adjustment of the voltage bias, a reference current increasing the printhead temperature. So as to rise in response,
A non-impact printer device comprising: a bias response unit; and a bias response unit.

The present invention further provides the following non-impact type printer device. That is, the non-impact printer device includes a plurality of energizable recording elements, and driving means for energizing the plurality of recording elements, including current mirror means.
Mirror means comprises: master circuit means for generating a reference current; and a plurality of slave circuit means for supplying respective drive currents to the recording elements selected to be energized among the plurality of recording elements. Wherein each of the plurality of slave circuit means comprises: (a) a plurality of transistor-type switching means connected in series to each of the plurality of recording elements; In response to switching from one state to another,
A plurality of transistor-type switching means, further comprising: a control electrode for controlling a drive current flowing to each of the recording elements to which each of the recording elements is connected in response to the signal; (C) switching the transistor-type switching means to actuate the driving current to selectively supply a drive current to each recording element only for a predetermined period of time. Each of the plurality of slave circuit means further includes auxiliary slave circuit means dedicated to the slave circuit means, and the auxiliary slave circuit means converts the signal input to the control electrode to a voltage. Means for providing a current path to assist in changing from one level to another voltage level, a non-impact printer device It is.

The above and other objects and features of the present invention can be clearly understood by referring to the following description in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS The following description of the preferred embodiments of the present invention refers to the accompanying drawings, which are as follows.

FIG. 1 is a perspective view showing a schematic configuration of a conventional non-impact printer, FIG. 2 is a block diagram of a circuit for supplying a signal to a non-impact print head according to the present invention, 3 is a block diagram of a printhead according to the present invention, including a plurality of driver chips for driving a plurality of LEDs formed on a chip array, and FIG. 4 is used on the printhead of FIG. in order to,
6A is a block diagram of a driver chip according to an embodiment of the present invention. FIG. 5 is a circuit diagram of one of the circuits incorporated on the driver chip of FIG. 4 according to the present invention. 6B, 6C, and 6D are circuit diagrams of a current driving path incorporated on the driver chip of FIG. 4, and FIG. 7 is a block diagram of a print head according to another embodiment of the present invention. 8 is a block diagram of a driver chip for use on the print head of FIG. 7, FIG. 9 is a block diagram of a special additional drive channel, that is, a channel for monitoring current, of the driver chip of FIG. 8, and FIG. FIG. 11 is a circuit diagram of a token bit register incorporated in the driver chip of FIG. 8;・ Bit Regis FIG. 12 is a timing diagram showing the generation times of various pulses generated on the driver chip of FIG. 11, and FIG. 13 is a timing chart of the driver chip with the modification shown in FIG. Is a truth table indicating the operation.

Description of the Preferred Embodiments Devices of the type described herein are known,
In the following description, a particular emphasis will be given to elements that form part of the present invention or that cooperate in particular with the present invention. I do.

An apparatus that can incorporate the invention disclosed herein is illustrated in the schematic diagram of FIG. FIG. 1 shows a linear array 10 composed of a plurality of triggerable recording elements.The recording elements are, for example, LEDs, and the number of recording elements included in the linear array is For example, 35
There are 84. The array 10 is mounted such that the photosensitive image receiving medium 12 can be selectively exposed,
The medium 12 is relatively movable with respect to the array 10 by any suitable moving means (not shown).
In the following description of the embodiments of the present invention, a case where the present invention is applied to an LED type print head will be described as an example. It is also possible to apply the invention. Further, an optical unit for focusing the LED on the medium may be provided. In this regard, it is highly suitable to use an array of graded index optical fiber devices, such as, for example, SELFOC ("Selfik" is a trademark of Nippon Sheet Glass Co., Ltd.). Each LE in array 10
D emits light when triggered by image processing electronics 14 operating in response to the image signal information. To increase or decrease the amount of exposure from a given LED, the duration of that LED's on state is varied. For example, if the medium 12 is a photographic film, a latent image is formed by selectively exposing one line at a time by a plurality of LEDs of the array 10 to form a latent image. A visible image can be formed by developing with a general developing means. When the medium 12 is an electrophotographic image receptor, the photoconductor layer is uniformly charged, and then an electrostatic image is formed thereon using an LED, and the electrostatic image is opaque. The toner may be developed using various toner particles and then transferred to copy paper or the like, which is described in US Pat. No. 3,850,517 and US Pat. No. 4,831,395.
Please refer to the issue.

Next, FIGS. 2, 3 and 4 will be described. Data source 15 is, for example, a computer, word processor, image scanner, or other data source that generates digitized image data. The data source 15 sends an image data signal to a data processor 16 including, for example, a raster image processor. The data processor 16 outputs a plurality of types of outputs under the control of clock pulses supplied from a logic and control device (LCU) 13. The output output includes the rasterized data output and various control signals, which are supplied to the printhead. Data corresponding to each pixel may be represented by a multi-bit signal. The number of bits of the multi-bit signal may be, for example, 4 bits, and can represent a gray level when performing exposure for recording a corresponding pixel. Programmable ROM (PRO
M) 16a may be provided on the print head, or may be provided at a location remote from the print head. This PROM16a
Is to correct the above data, and the correction is made so as to obtain uniformity among a plurality of LEDs. In this regard, the PCT
See International Application US90 / 0074 (Pham et al.). PR
The OM 16a converts the 4-bit signal into a 6-bit gray level signal. The 6-bit signal is a signal obtained by adjusting, ie, correcting, the original 4-bit signal in accordance with the light emission characteristics of each LED. In order to correct the balance of the light emission output among the plurality of LEDs, the 4-bit signal, which is the data signal, may be modified according to an experimentally determined value. Therefore, this PR
In the OM, a correction coefficient unique to each LED is stored to correct the data signal related to each LED. As will be described in more detail below, the output from the PROM can be further modified in response to aging and / or temperature changes occurring in the printhead. The LCU also supplies an exposure clock pulse to a down / up counter 18 (FIG. 4). The down / up counter 18 is an LCU
When enabled by a signal from, this clock pulse is counted and a digital signal indication is provided at its output having a plurality of output lines to indicate the status of the counter. As in the typical configuration of this type of counter, this counter displays the least significant bit of its count value on one of its output lines and on the other output lines. , Each higher order bit is displayed. The output of this counter 18 is described in US Pat. No. 4750010 (Ayers et al.).
In the manner described in detail above, the data is supplied to a first set of a plurality of input terminals of a comparator 19 associated with each of the recording elements 30 (which are LEDs in this embodiment). Further, each comparator 19 is associated with a data register 24, and accordingly, a plurality of data registers 24 are provided for a plurality of comparators 19. A plurality of data lines are output from each data register 24, and the data lines are connected to a second set of a plurality of input terminals of the comparator 19 corresponding to the data register 24. Thereby, all the comparators 19 compare the output of the counter 18 with the value of each data. As will be described in detail later, the image data signal supplied to each comparator 19 indicates the ON time of each LED 30 when the LED 30 records a certain pixel, that is, the duration during which the LED is enabled. Is data related to the desired length. Multiple LEDs
Is alternately divided into odd and even LEDs according to one of the well-known configurations, and of the plurality of integrated circuit driver chips 40, an integrated circuit driver chip for the odd LED; Integrated circuit driver chips for the even LEDs are located on opposite sides of the row of LEDs.
Since the circuits of the driver chips for the odd-numbered LED and the driver chip for the even-numbered LED are the same as each other, the description in this specification will describe only one of the driver chips. . When a row of LEDs is printing one dot line consisting of a plurality of dots, the image data signal supplied to each comparator 19 is such that the LED corresponding to each comparator 19 has one of the LEDs. Book dot
An image data signal related to a desired size of one pixel or dot that is exposed on an image receiving medium for a line. As shown in FIGS. 3 and 4, a 6-bit digital image data signal is supplied by six independent data lines DI0 to DI5. The gray scale of the output in one operation cycle can be varied. If the data being supplied to each comparator during one operating cycle is assumed to consist of six binary bits, a decimal "0"
To the decimal number "63".
In FIG. 4, the data lines DI0 to DI5 are drawn as if they pass through the data register 24.
This is so drawn for the sake of clarity, and in fact, the data lines are, as will be described in detail later, all latches can simultaneously take data from the data lines. Connected as possible.

Here, one LED (this is LED ₁ ) is referred to as a time T
Consider the case of enabling for a length of _MIN plus a time equivalent to 20 clock pulses. This time T _MIN is a predetermined shortest on-time of the LED. If a start pulse is generated on line LLATCHN, counter 18 is enabled and starts counting in response to the start pulse on line LLATCHN.
The upper exposure clock pulse is counted from decimal "63" toward "0". The clock pulse is generated so that its interval can be changed by a program. The 6-bit output of counter 18 is coupled to a set of input terminals at terminal X of each comparator. This count value is compared in the comparator with a data input being input to another set of input terminals of the terminal Y of the comparator, the data input being a decimal "10", This is data expressed in hexadecimal. If the comparison is "matched", that is, if the count value of the terminal section X becomes "10", a pulse is transmitted from the output terminal of the comparator 19. Then, the toggle flip-flop 22, which is a latch, enables the constant current drive circuit 23 and
The current supply to LED ₁ is started and the current supply state is maintained. If the counter 18 counts down to “0”, the counting operation is inhibited so that the counter 18 does not count any more clock pulses until the time T _MIN elapses. Can be taken. The prohibition of this count operation is
Either program it inside 18 or
What is necessary is just to perform it using another appropriate means.
As described above, in a case where a method of securing a predetermined time T _MIN is employed, after the time T _MIN has elapsed, the counter 18 is set to
Set to count in count-up mode, and start counting clock pulses again. When the counter is in the count-up mode and reaches a decimal "10", flip-flop 22 is reset, thereby causing the flip-flop 22 to carry the current previously flowing through LED _1. To stop. Other LEDs besides this LED ₁ operate in a similar manner, except that the count values when turning on and turning off the LEDs, which require their respective data, usually vary. ing. What is common to these LEDs is that the positions of the current pulses of each LED are all centered with each other,
In other words, the midpoint of each current pulse is located at the same time. On the contrary,
When printing one line, the duration of the current pulse of each LED differs depending on the individual image data signal corresponding to that LED, and thus has various values.
It should be noted that the aforementioned PCT International Application US90 / 00074 also describes a clocking system using a non-linear clock. Also, the description of the PCT International Application is incorporated in this disclosure with this reference.
Further, as described in the PCT international application, a plurality of L
In order to correct the variation of the light emission output during the ED, the data supplied to each LED may be adjusted according to the characteristics of each LED. This includes programmable read only memory devices or PROMs
Or other programmable device, storing the characteristics of each LED, and supplying a corrected version of the data corresponding to the LED to the terminal section Y to obtain the input count value. good. In this case, the input count value represents data corrected so as to match the exposure characteristics of the LED. For example, if an LED emits more intense light than another LED, the LE
The correction performed by the PROM on the bits of the data corresponding to D is such that the count value actually supplied to the terminal portion Y is smaller than the count value determined based only on the original data. It is.

From this, to balance LED drive current,
Other circuits will be described.

The circuit described below is a circuit that forms a part of a drive circuit for delivering each image data signal to a comparator corresponding to the data signal, and further delivering the image data signal to a current drive circuit. In the embodiment of the circuit for the printhead shown in FIG. 3, drive circuits for a plurality of LEDs are arranged on both sides of the LED column 20. This is a known and preferred arrangement, which is preferred because the LEDs can be arranged more closely and thereby improve the resolution of the printer. As can be seen, the arrangement of this circuit is an alternating arrangement, i.e., for so-called even LEDs, their respective drive circuits are arranged on one side of the LED row,
On the other hand, for so-called odd LEDs, the respective drive circuits are arranged on the other side of the LED column. In a typical example, for example, 64 odd LEDs are grouped into one group (one LED chip array 31 has 128 LEDs arranged in a line), and each of the groups includes On the other hand, one driving circuit formed on a single integrated circuit chip 40 is provided. Thus, in this case, if the printhead had 3584 LEDs, then there would be 28 driver chips on each side of the row of LEDs. In order to reduce the manufacturing cost of the driver chips, it is desirable that the driver chips have the same structure. Then, all the driver chips have the same structure, and the driver chips are LE
To be able to be placed on either side of the row of D, the signals transmitted in the longitudinal direction of the printhead through its driver chip must be either bidirectional, depending on how it is programmed. It is desirable to make it possible from the viewpoint of simplification of design. See US Pat. No. 4,746,941 in this regard. As an LED chip array, an array having more than 128 LEDs is also known.However, here, the present invention will be described for the case where a chip array having 128 LEDs is used. I will go.

The image data signal sent from the data processor 16 is sent as an image data signal for odd LEDs and an image signal for even LEDs, respectively. The following description is odd
This relates to the image data signal for the LED, however, the operation of driving the even LED and the driving circuit for driving it are exactly the same as those of the odd LED.
Referring to FIG. 4, data lines DI0-DI5 are independent data lines, each carrying a signal representing one digital bit (0 or 1). The entire signal of each of the data lines DI0 to DI5 represents one 6-bit digital number corresponding to decimal numbers "0" to "63". The 6-bit signal, that is, the image signal, is transferred on the print head by the data lines DI0 to DI5,
These data lines DI0 to DI5 constitute an image data signal bus. Each of the LEDs is combined with data register means 24, which stores the data received from the bus in one operating cycle to print a single dot line or pixel line. Is to be latched while the operation is being executed. As will be described in detail below, the token bit is used to enable the data register means associated with one LED to accept the corresponding data, and the data register associated with the other LEDs. Means are made to wait for acceptance of each data. US Pat. No. 4,746,941 describes that a token bit is used to control multi-bit data latch operation in a printer device.

Data register means 24 associated with each LED
Is composed of a set of latches 25 and 26 provided in pairs for each of the above-mentioned six data lines.
ster-slave flip-flop). That is, the pair of latches 25 and 26 are connected in a master-slave relationship. When a token bit signal is input to the enable input terminal of the master latch 25, the data of the master latch 25 is An image data signal applied to the input terminal affects the output of the master latch, which changes or remains the same depending on the image data signal. Six master latches in the data register means corresponding to one LED
25 all connect in common to line 27 so that when they receive a token bit signal from token bit shift register 28, they all receive the token bit signal at the same time.

The token bit shift register 28 is composed of a series of a plurality of flip-flops 29 forming a flip-flop array, and a clock pulse (SH
FTCLK) and each flip-flop 2
The token bit signal is input to the data input terminal 9. Even tokens for even LEDs
The same token bit signal is provided to both the bit shift register and the odd token bit shift register for the odd LED. The output of each of the plurality of flip-flops 29 is the next (adjacent) flip-flop 29 in the flip-flop train.
Is connected to the data input terminal of A plurality of buffers 31 are coupled to the token bit shift register 28. The buffers 31 are used for input enable control and direction control. The direction of shifting through the token bit shift register 28 can be controlled by a program. For example, the data (DATA OD) for the odd LED of the print head
In the part relating to D), if the token bits are to be shifted from left to right in FIG.・ Bit is line LT
Causes the token bits to be transferred from left to right when generated on OKEN. In this case, the token bit is sent to the token bit shift register in response to a clock pulse from data processor 16.
28 from one stage to the next (from left to right in FIG. 4), with the transfer of the token bit onto each output line 21 of each stage. And the token bits output on output line 21 are transmitted on line 27 via OR gate 11 and thereby all of the respective data register means 24 Enable the master latch 25 of the As the token bit moves from one stage of shift register 28 to the next, then data line DI0
The data bits transmitted on ~ DI5 are successively accepted by the respective data register means 24, and the acceptance into the data register means 24 also proceeds from left to right. . Finally, all of the 1792 data register means 24 on this side of the printhead are provided with 6 bits of data to be stored in each of them. Thereafter, when the latch enable signal on line LLATCHN goes pulsed low, causing each slave latch 26 to latch this data at its output, and
The toggle flip-flop 22 is reset. The respective outputs of the slave latches 26 are now in communication with the plurality of terminals of the data input Y of the corresponding comparator 19, whereby each of the LEs in the manner previously described.
The exposure time of D can be determined. On the other hand, at this time, the master latch 25 is ready to receive an image data signal for the next dot line to be printed.

Each of the comparators 19 has at its output a AND gate 19 '.
And a D-type flip-flop 19 ″, which are output from the comparator 19 by a toggle flip-flop.
It is provided to prevent large glitches about logic states from propagating to the 22 inputs.

After the level of the LLATCHN signal returns to the inactive level, each comparator 19 responds to the comparator 19 at the same time as the first rising edge of the EXPCLK signal at which the logic state of the output of the comparator 19 becomes high. The toggle flip-flop 22 that has been switched from the reset state to the set state by performing a toggle operation. Then, the Q output and the QN output of the toggle flip-flop 22 enable the current drive circuit 23 combined with the toggle flip-flop 22 whose current magnitude is controlled. Further, the logical state of the output of the comparator 19 once returns to low level,
When the signal returns to the high level again by the rising edge of the EXPCLK signal after that,
The flip-flop 22 performs a toggle operation and returns to the reset state. Then, this toggle flip-flop 22
The Q output and the QN output disable the current drive circuit 23, which is a constant current drive circuit, which is combined with the toggle flip-flop 22.

Next, FIG. 6A, FIG. 6B, FIG. 6C, and FIG. 6D will be described.
These figures show the current drive circuit 23 of each driver chip 40.
Is shown. The output of each of the toggle flip-flop 22 is delivered through the output lines 45 ¹ each, 45 ^3, output lines 45 ^{5-45 125} thereof followed not shown and output line 45 ^127. As can be seen, each of these output lines is actually a double line (two lines), one of which is for transmitting an enable signal to turn on the corresponding LED. And the other is for transmitting a complementary signal of the enable signal. Two output lines 45 ¹ are input to respective control electrodes of the transistor Q ₄₂₆ and the transistor Q _427. These transistors operate as switches and constitute a part of a current mirror type driving circuit. This current mirror type drive circuit
Formed by Q ₄₂₄ , transistor Q _425, and a series of transistors adapted to be digitally controlled,
Includes master circuit. Of these, a series of transistors that are controlled digitally are:
Details will be described later in the description of FIGS. 6A and 6B. Briefly described here, the transistors that are digitally controlled establish the current signal I _{CHIP_BIAS} by selectively turning them on, and furthermore, this driver This is to control the level of the current flowing to the LED driven by the chip to a desired level. FIG. 6C shows two LEDs, LED ₁ and L
Circuit parts for driving ED ₃ and ED ₃ respectively are shown.
As can be seen from this figure, the driver chip can be implemented by any suitable circuit including the circuit described below, for example, 64 odd LEDs in an LED chip array having 128 LEDs. This is a driver chip that drives. In this case, this LED chip
Another driver chip located on the other side of the array will drive 64 even LEDs.

The current flowing through the master circuit, on line 117, the voltage V _G1 is established. LED ₁ has two transistors Q ₄₂₈ and Q ₄₂₉ connected in series thereto. Of these, transistor _Q428 is biased so that it is always conductive, while transistor _Q428 is
Q ₄₂₉ is a transistor that is turned on and off, and is a transistor that controls whether or not current flows through LED ₁ . The gate or control electrode of the transistor Q ₄₂₉ is the transistor Q ₄₂₆ and Q _427, are coupled to the connecting portion between the drain and the source. When turning on LED ₁ , transistor Q ₄₂₇ is made conductive, while when turning off LED ₁ , transistor Q ₄₂₆ is turned on.
Is made conductive. Logic signal is input to the gate of the transistor Q ₄₂₆ is an inverted signal of a logic signal being input to the gate of the transistor Q _427, these logic signals are input from the enabling means 22 which is driven by the data This enable means 22 is shown in FIG.
It corresponds to the part of the circuit for controlling whether the LED should be turned on and for how long it should be turned on. As described above, in a gray-level printhead, the LED is turned on for the duration specified by the gray-level data signal input to the printhead.

The circuit part for driving LED ₁ is further combined with another current mirror, which includes two slave circuits. The slave circuit of one of them consists of transistors Q ₄₂₀ , Q
₄₂₁ , and Q ₄₃₀ , and the other slave circuit is formed by transistors Q ₄₂₂ , Q ₄₂₃ , and Q ₄₃₁ . Of these six transistors,
Transistors _Q430 and _Q431 are N-channel MOSFETs, and the other transistors are P-channel MOSFETs. Both of these two additional slave circuits associated with LED ₁ are always on. Where LE
If the nominal current value ILED _{1 of the} current flowing through D ₁ is, for example, 4 mA (ILED ₁ = 4 mA), the transistor Q
_The current flowing through the transistor ₄₂₁ is, for example, (1/80) ILED ₁ , and the current flowing through the transistor Q ₄₂₃ is, for example, (1/800) ILED ₁ . And these by the current flowing through the two slave circuits is established on line 114, the voltage level V _G2, and the potential of the drain electrode of the transistor Q _427.

The operation will be described below. First,
When transistor Q ₄₂₉ is turned off, transistor Q ₄₂₆ is on, so that a voltage substantially equal to voltage V _CC is applied to the gate of transistor Q ₄₂₉ . When the LED ₁ was turned on to record one pixel (pixel) from the enabling means 22 which is driven by a data signal to the gate of the transistor Q ₄₂₇ is supplied, the transistor Q ₄₂₇ is turned on, At the same time, the inverted signal of the transistor
Q ₄₂₆ is turned off. To turn on the transistor Q ₄₂₉ is a capacitive load which is present between the gate electrode and the substrate of the transistor Q _429, i.e. must be kept so as to be removed charge. So, if transistor Q ₄₂₇ turns on, transistor Q
The charge of the gate electrode of ₄₂₉ is discharged via the transistors _Q427 and _Q430 . Transistor Q ₄₂₉
However, since the discharge path for discharging the capacitive load of the gate electrode is formed in this way, the turn-on time is not affected by the number of LEDs that are energized at one time. I have. The need not receive such affected is the control transistor is provided in each of the LED corresponding to the transistor Q _429, any of which control transistor, for discharging the capacitive load of the control transistor This is because a dedicated discharge path is provided. In the illustrated embodiment, a current mirror circuit is added, and a driving transistor Q ₄₂₉ is used by using a transistor Q ₄₃₀ included in the current mirror circuit.
Is discharged, but as will be easily understood, depending on the circuit configuration, the control electrode may be charged instead of being discharged.

The current flowing through the transistors Q ₄₂₂ , Q ₄₂₃ and Q ₄₃₁ has a magnitude proportional to the current flowing through the master circuit, ie
The current mirrors the current flowing through the master circuit.
This is between the transistor Q ₄₂₄ and the transistor Q _422, gate - between the source terminal bias (V _GS1) is because identical to each other. Therefore, transistors Q ₄₂₂ , Q ₄₂₃ and
In the slave circuit comprised of Q _431, when the voltage V _CC which is obtained from the normal power supply varies also, since the potential difference V _GS1 between the gate terminal and the source terminal of the transistor Q ₄₂₂ remains constant The current flowing through the slave circuit is kept constant. Further, transistors Q ₄₂₂ , Q ₄₂₃ ,
The current flowing through this circuit consisting of Q ₄₃₁ and Q ₄₃₁ is mirrored by the current flowing through the slave circuit consisting of transistors Q ₄₂₀ , Q ₄₂₁ , and Q ₄₃₀ , which is the difference between transistor Q ₄₃₀ and transistor Q _431. This is because the gate-source bias is the same. Thus, transistors Q ₄₂₀ ,
Since the current flowing through the slave circuit consisting of Q ₄₂₁ and Q ₄₃₀ is constant, the potential difference between the gate terminal and the source terminal of the transistor Q ₄₂₀ , and also the potential difference between the gate terminal and the source terminal of the transistor Q ₄₂₁ The potential difference is also kept constant. Then, these potential differences, the voltage level V _G2 established on line 114, will vary in accordance with variations in the voltage V _CC, however, the potential difference between the voltage V _CC and the voltage V _G2 is kept constant Will be.

While the exposure is being performed, the transistor _Q429 is in the ON state, and the driving current for driving the LED ₁ is conducting. At this time, voltage level V _G2 is applied to the gate of transistor Q ₄₂₉ because transistor Q ₄₂₇ is conducting. On the other hand, the voltage level of the source terminal of the transistor Q ₄₂₉ is in the level of a certain threshold value which is higher than the voltage level V _G2. This transistor
Q ₄₂₉ is adapted to operate as a cascode transistor, the source terminal of which is connected to the drain terminal of transistor Q ₄₂₈ . Therefore, transistor Q ₄₂₉
Establishes the potential of the drain terminal of transistor _Q428 , and the transistor thus established
The potential of the drain terminal of Q ₄₂₈ has a potential that varies in accordance with fluctuations in the voltage V _CC. On the other hand, as already mentioned,
The potential difference V _GS1 is maintained constant regardless of the fluctuation of the voltage V _CC itself. From these, the transistor
Q ₄₂₈ indicates that the voltage relationship between each of its three terminals is
V _CC is not affected by variations, so the current through LED ₁ is kept constant throughout the recording of the pixel.

As described above, stabilization of the drive current for driving LED ₁ is achieved. That is, even if the voltage V _CC fluctuates transiently, the current flowing through the LED ₁ does not fluctuate, and thus the fluctuation of the voltage V _CC affects the intensity level of the light emission output of the LED _1. Has no effect. Some LED printheads have a large number of LEDs at once.
When the ED is turned on, there is a case in which the emission output of each LED tends to weaken. However, the use of the above circuit can reduce the tendency. Already mentioned, the length of the conduction time of transistor Q ₄₂₉ is supplying a current to the LED ₁ is controlled by the data bits,
Thereby, an appropriate pixel is recorded. On the other hand, the current level at the time of executing the recording of the pixel is controlled by a current mirror operating in response to the current level I _{CHIP_BIAS} . Therefore, next, a circuit for generating the current level I _{CHIP_BIAS} will be described.

When transistor Q ₄₂₉ is turned on, the magnitude of the current flowing through transistor Q ₄₂₉ is a magnitude that mirrors the current flowing through transistor Q ₄₂₅ at that time (ie, is equal to or proportional to that current). Size). And furthermore, the magnitude of the current flowing through this transistor Q ₄₂₅ is equal to the current I _{CHIP_BIAS} . This current I
_{CHIP_BIAS} will be described below with reference to FIGS. 6A and 6B. The current I _{CHIP_BIAS} is controlled by three factors. These three elements are a temperature-compensated current source 172 and eight N-controllers which are digitally controlled.
A first transistor group consisting of MOSFET transistors Q ₂₅ , Q ₂₆ ,..., Q ₃₁ , Q ₃₂ and eight N-type MOSFET transistors which are likewise digitally controlled
Q ₅ , Q ₆ ,... Q ₁₁ , Q ₁₂ and a second transistor group. The first transistor group, are combined with N-type MOSFET transistor Q ₃₃ which is adapted to control the non-digitally. Similarly, also the second transistor group, are combined with N-type MOSFET transistor Q ₁₃ which is adapted to control the non-digitally. As can be seen from FIGS. 6A and 6B, not all transistors are shown in the figures. Further, the control level is determined by a plurality of transistors included in each group. Transistor
Q ₂₅ ,..., Q ₃₂ are connected in parallel with each other, and furthermore, the value of the ratio of the gate width to the gate length of each of the transistors is different between the respective transistors. Are determined to be in proportion to each other, such that the magnitude of the current flowing through each of the transistors is in proportion to a power of two, ie, the magnitude of the current is a power of two. Weighted. For example, the first transistor group (Q ₂₅ ~Q _32), for the transistor so as to control the eight digital, husband those transistors people, the value of the ratio of the gate width to the gate length, For example, the following values (the eight values on the left) may be set.

Incidentally, the right end value, the transistor Q ₂₅ to Q _32, when the value of the ratio of the gate width to the gate length was eight values of the left, the gate of the transistor Q ₃₃ which is adapted to control the non-digital It is the value of the ratio of the gate width to the length.

These digitally controlled devices or transistors are controlled by logic signals supplied to respective 2-transistor switch circuits associated with each transistor. For example the switch circuit constituted by N-type MOSFET transistors Q ₂₅₀ and Q _251, the logic signal of the high level to the gate of the transistor Q ₂₅₀ is supplied, the low-level logic signal is a complementary signal thereof to the gate of the transistor Q ₂₅₁ There Once supplied, the transistor Q ₂₅ in a conductive state. Of the eight transistors of the above for the flow of current, logic signal for controlling whether to turn on which transistor is controlled by a register R _2. The register R ₂ is an 8-bit digital words, stores a 8-bit and its complement word, the bits of which word, 8
Turn on each of the current conducting transistors Q _{25 to} Q _32.
It represents a desired current control signal for turning on.
Transistor Q ₃₃ is Yes as is always in the ON state, and the transistors Q _33, by a first transistor group, use in combination, is performed to "local" control of LED current. Here By "local control", a digital word to be stored in the register R ₂ is a unique word to the driver chip, i.e., a plurality of LED to the driver chip is driving It states that the driving word is adjusted to determine the digital word so that the LEDs can achieve the desired light emission output level. This digital word may be input from the memory of the LCU to the register R _2, also, such as a ROM that is provided to the print head, it may be input from the memory separately provided. In addition, the digital word can be changed in response to the temperature of the driver chip, as described in more detail below. In that regard, it can be summarized here that the level of current flowing from the special additional current mirror channel (channel 65) of each driver chip is used as an indicator of temperature. . After digitizing the voltage generated by this current, the LCU
Digital words and registers in the register R ₁ R ₂
With one value based on the digital word in. LCU in response to the result of this comparison, if it is necessary to change the current levels, according to an algorithm which had been stored in memory, "write" new digital word into register R _2. When starting, the LCU
It is a set of a particular digital word, as a default value, and is programmed to write into the register R ₁ and R _2.

Maintain the count of each LED previously activated, as described in US Pat. No. 4,831,395 mentioned above, and control according to a program tailored to the aging characteristics of the printhead. To adjust the voltage,
The LCU may be programmed.

As long as this initial calibration has been performed and the printhead has been aged over and over due to its repeated use, the factors that act to degrade the luminous output are the temperature factors plus the aging factors. Therefore, there are two factors. In general, the aging effect is the same for all LEDs, and to compensate for this aging effect, the resistor R ₁
The 8-bit digital word and its complementary word, 8-bit word, which are stored in the memory are adjusted.

This digital word consists of eight N-types for current conduction.
This is for controlling the MOSFET transistors Q ₅ ,..., Q ₁₂ . The transistor group, and so is always in a conductive state, are combined with N-type MOSFET transistor Q _13. Transistor Q _5, ..., Q ₁₂ is weighted, a transistor so as to control digitally, they transistors Q _5, ..., the value of the ratio of the gate width to the respective gate lengths of the Q ₁₂ has its As an example, the following values (the eight values on the left) can be used.

Incidentally, the right end value, the transistor Q ₅ to Q _12, the gate width to gate length ratio values, when the eight values of the left, the transistor Q ₁₃ which is adapted to control the non-digital , The ratio of the gate width to the gate length. The 8-bit word and its complementary 8-bit word stored in register R ₁ are stored in register R ₁
Regardless of what is provided on any driver chip, they are all the same. If aging of the print head has proceeded to some extent, in each case, LCU is, calculates a digital word and its complement 8-bit word of the new 8-bit, which is input to the register R _1. To account for aging, the formula for calculating this 8-bit word may be determined experimentally, for example, using another printhead of the same type, or
Or, by calibrating this print head using an optical sensor that detects the output of some selected LEDs, the calculation formula may be derived, or
Using a detection patch recorded on the photoconductor. The calculation formula may be derived.

As described above, a temperature-compensated current source 172 is a third element for performing the adjustment for maintaining the uniformity of the light emission output of the LED between the chips. The current source 172 includes a temperature sensor and a circuit that functions to increase the current flowing to the LED in response to a rise in temperature. A wide variety of circuits are known as circuits having such a function, and specific examples are described in the second edition of "Analysis and Design of Analog Integrated Circuits" by Gray and Meyer.
and Meyer, Analysis and Design of Analog Integrate
d Circuits, 2nd edition), pages 733 to 735, and figure
See 12.28. The contents of the document are included in the present disclosure with this reference. The same document, so-called, V _T canonical current source (V _T is meant the temperature voltage) is described. The circuit of this current source is provided with a resistor having an appropriate temperature coefficient so that the driver
The output current _IO increases as the temperature of the chip increases.

The operation of the circuits shown in FIGS. 6A, 6B, 6C, and 6D will now be described. During use of the printhead, the temperature of the driver chips rises, but the degree of the temperature rise differs for each chip. This is due to the amount of demand current that each chip must flow and the heat dissipation capacity of the chip when dissipating the heat generated by the demand current through the heat transfer structure to which the chip is attached. This is because there is a difference in the degree of temperature rise depending on the situation. Current I _O which temperature compensation has been performed, with flows to ground through the N-type MOSFET transistors Q _33, optionally, the transistors Q _32, Q _31, ..., all of Q _25, or even through a portion of the ground Flowed to This current causes the transistors Q ₃₂ , Q ₃₁ ,.
Either flowed through any transistor of the ₂₅ (or, either flowed through all of them, or, if not also flow through any of them) are stored in the register R _2, 8-bit digital signal and its complement The signal is determined by an 8-bit digital signal. Then, depending on which transistors in this transistor group are enabled and conducting (the transistors have their conductive properties:
Yes in the predetermined proportional relationship, that is, it should be noted that you have a different weighting), the voltage level of the source terminal of the transistor Q ₃₃ is determined. It should also be noted that each of the digitally controlled transistors is associated with a switching transistor. For example, the transistor Q ₂₅ is controlled by the switching transistor Q ₂₅₀ and Q _251, this control is performed in response to a signal to turn off the transistor Q ₂₅₁ a transistor Q ₂₅₀ is made conductive. Other digitally controlled transistors are similarly controlled. Voltage level V _TC thus obtained is applied to the gate of the transistor Q _13, thereby controlling the magnitude of the current the transistor Q ₁₃ is flowed. As already mentioned, transistor Q ₁₃
Are non-digitally controlled transistors, digitally controlled transistors Q ₅ ,.
₁₁ and Q _{12 in a} transistor group. And among these transistors, the resistor R ₁
The selected one is rendered conductive according to the digital word stored in the P-type MOSFET.
Bias current I flowing through transistor Q ₄₂₅
The current level of _{CHIP_BIAS} depends. Each transistor Q ₅ -Q ₁₂ in this transistor group is
Note that the conductive performance is in a predetermined ratio relationship, that is, the conductive performance is weighted. P-type MOSF
The current flowing through the ET transistor Q _425, the transistor Q ₄₂₄
Equal to the current flowing through the master circuit containing
The current of the master circuit is generated by the slave transistors Q ₄₂₉ , Q _{429 ′} ,.
ED _1, LED _3, ..., by the current mirror consisting of each of the current control transistor) for controlling a current of the LED _127, the same same size or Chijimibai the current in a predetermined ratio, is duplicated, or even, Even with the special additional temperature detecting circuit using the 65th channel, the current having the same size or a reduced current at a predetermined ratio is copied.
The transistor Q ₄₂₉ is set to conductive state, combined to the transistor Q _429, 2 the transistors Q _426, Q ₄₂₇ which functions as a logic element, the data signal representing the to be printed pixels, appropriate instructions It is when I received. That is, when a low logic signal is sent on line 45 ¹ (AN), transistor Q ₄₂₇ turns on, biasing the gate of transistor Q ₄₂₉ to level _VG2 . Because the bias states of transistors Q ₄₂₄ and Q ₄₂₈ are identical to each other, the magnitude of the current flowing through transistor Q ₄₂₉ during the exposure of the pixel will be _less than the current flowing through transistor Q _424. It is mirrored as it is, or has a predetermined ratio to the current flowing through the transistor _Q424 . The exposure time of this pixel is determined by the time the logic signal on line 45 ¹ (AN) is low, ie, the duration of the low state.
Is controlled. As can be seen from FIG. 6C, the transistor
The current through Q ₄₂₉ is supplied to LED ₁ , thereby effecting pixel recording. Current level generated other channel that supplies direct current to the other of each of the LED is also the same as the current level of this channel that supplies current to the LED _1. Thus, all LEDs driven by this driver chip receive the same amount of current, while the time that the current flows through these LEDs varies for each LED's respective enable signal. Time. Furthermore, the magnitude of the current flowing through the LEDs is adjusted to keep the light emission intensity of the LEDs constant.

Referring now to FIGS. 4 and 5, tokens related to the purpose of controlling the magnitude of the current flowing through the LED will be described.
A circuit portion for utilizing the bit and the image data line will be described. As already mentioned, in order to control the magnitude of the current flowing through the LED, the digital stored in the register R ₁
Using a word, the digital word stored in the register R _2. Therefore, the number of lines connecting the print head to the outside is reduced as much as possible, and the number of connection points of wiring that must be connected when manufacturing a print head using many driver chips is reduced. As described above, the token line used for latching the image data as described above is also used for latching current data in each driver chip. I have.

In FIG. 4 and FIG. 5, a line SEL1 and a line SEL2 are lines for selecting one operation mode from the four operation modes that can be taken by the token system by using these two bits. As can be seen from the table entered in FIG. 5, as an option of the four operation modes, a "normal" mode (a certain image data is stored in the plurality of image the register 24 corresponding to the image data, a mode) which controls so as to latch, when sending a "V _REF load" mode (global bias is, current control digital word to be loaded into the register R ₁ Mode) and "R _REF
Load "mode there and are (a local bias mode when delivering current control digital word to be loaded into the register R _2). And the fourth mode is a "bias monitor" mode, which checks the level of current being sent to the LEDs by operating the 65th channel of each driver chip sequentially. This is the mode used for

The manner in which the token bits are used to cause the image data to be latched is as described above, and the token bits are so used by the LCU by the input of the 3: 1 multiplexer 60, This is when a two-bit signal “00” is transmitted to the input of the logic device 62 and (both SEL2 and SEL1). The logic device 62 forms a part of a circuit to be referred to as a “serial interface for monitoring V _REF / R _REF load and bias” shown in FIG. As can be seen from FIG. 5, the logic set of the logic device 62 includes a plurality of interconnected logic ANs.
It can be configured as a D gate. When the "00" signal is being input, the serial interface of FIG. 5 is disabled. Therefore, in this case, as the token bit shifts through the token line LTOKEN and the token register 29,
At this time, the image data transmitted on the lines DI0 to DI5 is a flip-flop 25 corresponding to the image data, which is a master latch for image data in the register means 24.
Are latched one after another, as described above. The image data thus latched is further transferred in the manner described above and used to control the duration of the LED on-time when recording the corresponding pixel.

After the LED printhead has been used for a certain long period of time, it is necessary to adjust the amount of current flowing through all the LEDs because the printhead ages. Sometimes. In that case, the LCU determines whether a criterion indicating that such an adjustment is necessary has been met, and the LCU responds to the determination by adjusting the global bias, if necessary. To start. As a criterion indicating that such adjustment is necessary, the count number of the activation of the LED and the time during the printing operation can be used. See U.S. Pat. No. 4,797,071 in this regard. When the adjustment operation is started in response to the determination result, the LCU sends out the line SEL2, the line SEL1, and the signal "01" in anticipation of a period during which the image generation operation (print operation) is not performed, and Calculate the updated 8-bit digital word for transfer to all driver chips. The calculation of this new digital word is performed according to a formula for updating based on data experimentally determined by examining the aging of this printhead or of another printhead of the same type. I have. This updated digital word, that is, the data for current control is
The data is transferred using the serial transfer method. That is, the data is serially transferred on one line DI5 of the image data buses (DI0 to DI5) to the data input of a series of cascade-connected flip-flop registers 70 to 77.
The plurality of registers 70 to 77 provide a register R ₁ for storing the signal V _{REF (0-7)} on each driver chip.
Are formed. The current control data transferred on the line DI5 is supplied to these registers 70 to 77 in response to the token clock signal TCLK acting via the AND gate 80.
Shift in the inside. Since the line DI5 is a line constituting a part of the data bus, the signal on the line DI5 is
All driver chips have the property of being able to contact the signal, and the signal can be latched simultaneously by different driver chips.
Therefore, according to this method, the current control data signal V
_{REF (the 0-7),} the register R ₁ of all of the driver chips,
They can be loaded at the same time.

Next, the case where loading signal R _{REF (0-7)} for the "local" current control register R _2. In this case, the LCU sends a signal “10” to the lines SEL2 and SEL1. This enables latches 90-97, which become responsive to the token clock provided through AND gate 82. The token bit transmitted on the line LTOKEN is input to the latch register 90 via the direction control gate 87, and then the token is transmitted through the latches 91 to 97 connected to the latch 90. Shifting in response to the clock signal TCLK. The output of each of these latches 90-97 is registers R ₂ for storing the R _{REF (0-7)} signal
Are input to the respective clock inputs. As token bit is gradually shifted through the latch 90 to 97, for the token bit of them latch 90-97, the data of each that is present on the time line DI5 is, the register R ₂ Are sequentially latched into each of the flip-flops 98a to 98h. Register R ₂ configuration to which the plurality of registers (flip-flops) 98A～9
Of the 8h, only one of the registers is enabled by the token bit at any one time, so the rest of the registers are then present on line DI5 Data cannot be latched and captured. This is important because, line ID5 is the input of all the registers 98a~98h constituting the register R _2, because are commonly connected.
The token bit shifts down from latch 90 to latch 97 in response to the token clock, and after reaching latch 97, shifts out of this driver chip to the next adjacent driver. Shift into the chip (as a R _REF token). The token bit is a current control data signal for the current drive circuit in the driver chip in the driver chip. The signal on line DI5 at that time, the driver chip continue to latch the plurality of flip-flops constituting the register R ₂ in the following, which was successively performed in the driver chip of each go. Therefore, LUC is sent, a register for current control data for storing in R _2, the image data bus to all the driver chips register R ₂ disposed on one side of the LED rows are connected together The current control data may be data unique to each driver chip, that is, local data of each driver chip, despite transmission on one of the data lines. You can.

Next, the “bias monitor” mode, which is the fourth of the above four operation modes, will be described. In this mode of operation, the LCU monitors the current flowing through the 65th current drive channel, which is a special additional channel of each drive chip. The purpose of this monitor operation in this mode of operation is to determine whether the level of the current supplied by the current drive circuit is at an acceptable level, thereby preventing damage to the LED, or In order to better control the output of the LED, it is necessary to determine whether it is substantially necessary to cut off or adjust the power supplied to the print head. By monitoring this current, in addition to or in addition to these objectives, an indication of the temperature of the LED can be obtained, thus reducing the luminous output due to increased temperature during use of the LED. This monitoring operation can also be used to determine whether or not to perform data correction for correcting. With respect to this data correction, the V _REF data may be adjusted, and the R _REF data can be adjusted to control the current level of the LED driven by one driver chip, Furthermore, by correcting the image data, the LED
By controlling the pulse width, that is, the duration of the current pulse flowing through the device, more precise control becomes possible.

Further, by this monitor operation, it is possible to monitor the presence or absence of a problem situation.Specific examples of the monitorable situation include, for example, a failure of a cooling fan for air-cooling a print head and a print failure. There is a situation where the temperature of the print head has increased during the execution of the operation. Because the current level detected by the monitor operation is that available as an indicator of the temperature, the current level, when compared with the digital word stored in the register R ₁ and R _2, knowing the existence of problems Can be. That is, the level of the flowing current is, if it is outside the expected range to be expected from the control signal stored in the register R ₁ and R _2, by its, it is the be seen that there is a problem .

In this bias monitor mode, the LCU
The signal "11" is sent to the lines SEL1 and SEL2. Then, the token clock starts clocking the bias monitor register 100 via the AND gate 99, thereby enabling the register 100. Register 100 has a logical AND gate on its "D" input.
The output from 101 is received, and this AND gate 10
To 1 is input a token bit and a single bit "data" signal on data line DI5. This gives AN
The D gate 101 indicates whether or not the LCU is trying to monitor the current of this driver chip. As described above, the data on the line DI5 is such that all driver chips (but odd driver chips) can make contact with the data, but again from one driver chip to the next driver chip. The token bit shifting to the chip determines which driver chip should latch its data in the register. Where the token
Assuming that a high level logic signal is latched in the register 100 by a bit, the two outputs of this register 100 (normal output and inverted output) switch their states, and the transistor Q ^T1 (FIG. 6D). The transistor Q ^T1 is a transistor for controlling the current flowing through the fixed resistor R (FIG. 3). The fixed resistor R is a resistor having stability with respect to temperature and a resistor which has been calibrated. It is. The fixed resistance R, in all the driver chips are arranged on one side of the LED rows, each of the transistor corresponding to the transistor Q ^T1 (i.e., the transistors Q ^T1, ...,
Q ^T3 , Q ^T55 ). The voltage level between both terminals of the fixed resistor R (reference numeral 88) is
^It takes a value related to the magnitude of the current on line 217 that ^T1 flows, and this voltage level is detected by an analog / digital converter 89 and converted to a digital signal. This digitally displayed voltage signal is
Is fed back to The LCU, whether in accordance with program stored in itself, after examining the digital words stored in registers R ₁ and R _2, the current of the driver chip is at the appropriate level Judge. In this case, one of the possible responses from the LCU may be to supply power to the printhead by opening an appropriate switch attached to the power supply supplying power to the printhead. The response is to shut off. This is performed, for example, by interrupting the voltage V _CC or the voltage V _DD supplied to the current source 172 by the switch S (FIG. 6A). Since the circuit configuration of channel 65 is the same as the circuit configuration of the other drive channels on this driver chip, the current flowing through channel 65 has the same level as the current flowing through these other channels. Therefore, the current of the 65th channel is an index indicating the magnitude of the current flowing through the LED when the drive channel connected to the LED is enabled. Note that it is effective to enter the bias monitor mode immediately after the change of V _REF and / or the change of R _REF , so that the current supplied to the LED is reduced. If the level is safe and / or
Alternatively, the LCU can determine whether the level is appropriate. Therefore, the LCU is programmed accordingly and enters this mode for calibration immediately after making those changes and when trying to perform a power-up operation or at the time of an interframe. .
If there is sufficient time during the execution of the recording operation, this mode may be entered during the execution of the recording operation, or this mode may be entered at the time of interline.

A different approach is to program the LCU accordingly to provide current control data to the printhead that will reduce the current level, and to ensure that a safe current level is detected. Until
It is also possible to adopt a method in which the repetition is performed.
If a safe current level has not been detected, then a shutoff signal may be generated to shut off the power supplied to the printhead. In this mode, the LCU may count token clock pulses so that it is possible to determine which driver chip current level is at an unsafe current level. become. Since the value of the voltage signal detected by the A / D converter is also related to the temperature of the LED driven by the corresponding driver chip, the LCU uses this voltage signal to flow to the LED. You can also adjust the current precisely.
This fine adjustment is performed by changing the 8-bit local current control signal R _REF stored in the register R ₂ according to a temperature-related algorithm obtained from the voltage signal, and then changing the changed signal R _REF to: applicable may be supplied to the register R ₂ of driver chips. Furthermore, the data signal is adjusted using the temperature-related signal, thereby using a pulse width modulation scheme.
The on-time of the LED may be controlled, that is, corrected. As described above, the LCU can calculate a new correction program based on the state of the decrease in the light emission intensity with the temperature rise of the LED. By inputting this new program into PROM16a,
The corrected data sent to the printhead can be adjusted.

A / D converter 89 inputs each even driver
The 65th channel of the chip is also commonly connected (FIG. 3). Thus, for example, to obtain a reading of the voltage generated by the 65th drive channel of an even driver chip, the logic signal on line DI5 on the even side should be high.
At the same time, the logic signal on the odd-numbered line DI15 may be set to a low level correspondingly, because the logic AND gate 101 (FIG. 5) provided in each driver chip is This is because the token bit is not passed except when the corresponding (odd or even) line DI5 is in a high logic state.

Next, another embodiment shown in FIGS. 7 to 9 will be described. In this alternative embodiment, the same or similar reference numerals as those used in the previous embodiment indicate the same or similar components as those in the previous embodiment. Also,
In this embodiment, the manner of handling the image data and the manner in which the image data is recorded are similar to those described above, and are therefore described in U.S. Pat.
This is done in accordance with the method described in the above item. In this embodiment, the image data is 8-bit data instead of 6-bit data, but the basic principle of operation is the same, and in this regard, a comparator for determining the exposure time is simply provided by a comparator. It is merely an 8-bit comparator. While the print head 20 is performing the recording of the image data of the line one roll, the next line of data one roll is being delivered onto the data bus D ₀ to D _7, this data, Multiple master-slave latch registers
At 24, the token bits are successively latched one after another as the token bits arrive in the corresponding token bit register. As previously described, this token bit is shifted down through a 64-bit bidirectional register, the Token Bit Shift Register 28, and accordingly the data bus line D ₀ image data of ~D on _7, go is latched into the latch register 24 of each. Thereafter, the token bit shifts out of this shift register and into the shift register of the next driver chip. In addition, the token bit is
At some point during its presence in the bit shift register, the current monitoring operation is activated. At that time, a signal is sent from the LCU, thereby
Current starts to flow through the driving channel. The means for activating the 65th drive channel will be described below with reference to FIG. In this embodiment, the special additional driving channel, which is the 65th driving channel, has a latch 111 connected thereto. The output of the latch 111 has a token bit corresponding to a specific bit of the token bit shift register 28. (The N-th stage), it is enabled in response thereto, that is, the logic state becomes high. The output from the Nth stage of the token bit shift register 28 is connected to the latch 111 via logic gates 186 and 190 on the one hand
, On the other hand, is coupled to the clear input of latch 111 via logic gates 187 and 191. In response to the output from the Nth stage, current begins to flow through the 65th drive channel of driver chip 40, which currently holds the token bit, in a manner similar to the operation described with respect to the previous embodiment. . The current that started flowing through the 65th drive channel (Fig. 6D)
The operation is stopped when the token bit shift register 28 in the driver chip 40 is further shifted down by a predetermined number of stages (for example, M stages). That is, when the token bit reaches a particular stage (the (N + M) th stage), the output of latch 111 is disabled, ie, cleared. Also, in order to do so, the (N)
The output of the (+ M) stage is coupled on the one hand to the preset input of latch 111 via logic gates 188 and 190 and on the other hand to the clear input of latch 111 via logic gates 189 and 191. As can be seen from FIG. 7, the outputs of the current monitoring channels of all odd driver chips, i.e. the 65th channel, are connected in parallel to a current-to-voltage converter, which is The same as described may be used. Further, these outputs are multiplexed by multiplexer 106 with similar outputs of the current monitor channels of the even driver chips. The analog signal thus multiplexed is connected to the driver
Related to the temperature of the chip (and thus schematically represents the temperature of the LED the driver chip is driving)
A / D converter 89 converts the analog signal into a digital signal, and the converted digital signal is transmitted to the LCU via an appropriate line. The LCU keeps track of the count of the token clock that is shifting the image data, so that it knows which driver chip the token bit is in at that time. Therefore, it knows which driver chip No. 65 is active at that time. It should be noted that the image data for recording the next pixel line is a bus line.
Have been sent over the D ₀ to D _7, the image data in response to a token bit, when being sequentially latched into the appropriate master register, at the same time, the preceding pixel line (this The pixel line image data is now stored in the slave 24 latch 24).
LED, and at the same time, 65th
This means that the operation of activating the number-th driving channel is also being executed. Another thing to note is that the shift down of the token bit is performed simultaneously in the even driver chip and the odd driver chip (for example, the first driver chip and the second driver chip). And the third driver chip and the fourth driver chip perform the same operation on the 55th driver chip and the 56th driver chip in the same manner.) The LCU determines which part of the period during which the token bit is present in one driver chip (or the period during which the monitor operation of channel 65 is activated). , Multiplexer 160
That is, it is understood that the monitor current input to the CPU is necessarily the monitor current of the odd-numbered driver chip. For example, in FIG. 7, the token bit is present in the first driver chip, and among them, from the second register of the bidirectional token bit shift register 28 composed of 64 registers. If it exists between the 32nd register, the token
Although the bit is simultaneously present on both the first driver chip and the second driver chip, the current monitor signal received from the A / D converter 89 at that time is the same as that of the first driver chip. The LCU is programmed to determine that it is a signal representing current.
However, the first driver chip and the second driver chip have completely the same configuration,
Since bit shift register 28 is a bidirectional shift register, the token bits move from the 64th register to the 1st register in the second driver chip. Thus, in the first driver chip, when the token bit is present in either the second register or the 32nd register, the token bit is in the second driver chip. It exists in any of registers 63 to 33. Similarly, in the second driver chip, when the token bit is present in any of the registers from the 32nd register to the 2nd register, the token bit in the first driver chip is Exists in any of the 33rd to 63rd registers. Therefore, after the token bit enters a certain driver chip, the LCU moves the token bit shift register of the driver chip for more than 33 token clock pulses (except for 63 token clock pulses). Below), if moved, the signal that the A / D converter 89 is sending to the LCU at that time will be the signal of the even-numbered driver chip of the pair of driver chips in which the token bit is present. Is determined to represent the current to the LED. Further, from the LCU to the multiplexer 106, it specifies which of the odd driver chip current signal and the even driver chip current signal should be sent to the LCU,
A selection signal can be transmitted. Further, the total count number of the token clock is such that the token bit is included in any of a plurality of driver chip pairs including one odd driver chip and one even driver chip. Is present. Note that, if it is desirable to omit the current-to-voltage converter and the analog multiplexer, which are added in the print head of FIG. 7, they may be omitted and the print head of FIG. 3 may be omitted. good.

Next, referring to FIG. 10, the token
The bit register 28 will be described in more detail. The token direction signal Tdir biases line 220 to one logic level, and further from this line 220 via inverter 221 to bias line 222 to the opposite logic level. Here, the token direction signal Td is set such that the token bit (L bit) moving from left to right in FIG. 10 is transferred.
Assume that ir is biasing line 220. At this time,
The three-state inverter 31, which is used to transfer token bits moving from right to left, is disabled.
The token bit moves in synchronism with the pulse of the token clock (TCLK) and, if it enters the driver chip, the token bit shift register of the driver chip. No. 1 token
Trigger the D input of the register. Then, the output is switched to the No. 1 talk register, its by Q output is changed to enable the 8-bit latch 24 (FIG. 8), the latch 24, line D data bus ₀ to D Latch the image data signal on ₇ . When the next pulse of the token clock occurs, this first token register is reset and the token bit is set to the three state inverter 31.
From the Q output of the first token register to the D input of the second token register.
Then, the state of the Q output of the second token register changes, and the second token register enters a state in which the latch register associated with the LED ₃ latches the image data signal on the image data bus. At the same time as the state change of the Q output of the second token register, the latch 111 (FIG. 9)
Is also set, so that the 65th current channel (Fig.
6D) is triggered, transistor Q ^T1 is enabled and current IQ ^T1 begins to flow. The magnitude of this current IQ ^T1 is
Due to the recording of the preceding pixel line, it is equal to the magnitude of the current that is simultaneously flowing through the LEDs that are now enabled. The LCU converts this current IQ ^T1 to A / D
The relationship between this current and the temperature of the driver chip is determined according to a program monitored by the converter 89 and stored in Mizuka. This current monitoring operation is performed until the token bit reaches the 32nd token register, and therefore the Q of the 32nd token register.
The output continues until the latch 111 is reset. If the token bit has entered the No. 33 token register of this No. 1 driver chip, then as previously described, the LCU will execute the No. 6 token of the No. 2 driver chip.
The monitoring operation of the current of the fifth drive channel starts. Thus, when monitoring the current of the 65th drive channel, it is executed first on the first driver chip, and thereafter, it is executed on the second driver chip. After this, the token bit is
Turn moves to the driver chip and the fourth driver chip, thereby, the monitoring operation thereof driver chip of current is performed, the image data about those driver chip is latched by the line D ₀ to D ₇ You.

11-13 illustrate further improvements that can be made to the circuit of FIG. This improvement not only uses the token bit to control the distribution operation of the image data and also monitors the current with respect to the temperature of the driver chip, but also adds one pixel line to the image data. The digital data for controlling the current in the driver chip is changed immediately before the execution of each recording operation for recording the data. The token bit is also used for controlling the data change operation. . In the two embodiments described above, the supply of digital data for current control of both R _REF and V _REF is
This is performed during an image non-generation period in which a print operation is not performed, such as during an inter-frame. On the other hand, in the embodiment described here, the supply of the digital data for current control is performed during the execution of the printing operation. As a result, not only can the magnitude of the current be monitored in real time, but if necessary, the magnitude of the current can be changed quickly. In order to transmit the image data signal and the current control signal using the same data bus, each driver chip is provided with a logic circuit 246, and by this logic circuit 246, an image data signal (this data signal is , A data signal for controlling the duration of the current pulse width, that is, the exposure time in the recording operation of the next pixel line), and a data signal for controlling the current (this data signal is Each LED activated during recording operation
(A data signal for controlling the level of the current flowing through the data line).

The current control data for adjusting R _REF is sent from the LCU, where the LCU generates a temperature-related signal generated by the current driver circuit that constitutes the 65th current channel of each driver chip. The data is generated based on the obtained current signal. That is, in response to the current signal, the LCU calculates, for each driver chip, a new 8-bit digital word for controlling the current level of the driver chip. At the same time, a token bit is sent out on the line Lbit, and the logic state of the control line marked LD / Run in the drawing is set to low level. LCU
Sets the logic state of the line Ldir to a high level. The resulting logic level on the four output lines of logic circuit 246 disables the three-state inverter associated with the image data token register and also disables register 111, thereby reducing the number of registers. The drive circuit for the 65th current channel is disabled. Thereafter, when a token bit is input to the D input of the register 112, in response to this, the Q output of the register 112 changes and sends a load signal to the latch register 113 (FIG. 8). Latch register 113
To, to load the current control data at that time is sent on line D ₀ to D _7. The Q output of register 112 is output to the Lbit input of the next driver chip, and this Q output changes during the next operation of the token clock. This causes D 112 in register 112 of the next driver chip to
A token bit is obtained that must be supplied to the input. LCU is, at the time when thus token bit is moved to the next driver chip, already the current control data on lines D ₀ to D _7, for properly controlling the current of the driver chip, the The change to the current control data corresponding to the driver chip has been completed. The data line for the odd driver chip and the data line for the even driver chip are separately provided, and the token bit is connected to the odd driver chip and the even driver chip. Since the current control data is supplied simultaneously, the supply of the current control data is performed simultaneously by the odd driver chip and the even driver chip. LCU
Changes the logic state of the control line LD / Run to high level and prints a new token bit when the current control data corresponding to each driver chip has been distributed to all driver chips. Send to the first (odd and even) driver chips on the head and send data bus lines D ₀ through
Causing the latch of the image data signals on D _7. When this token bit enters the driver chip, register 111 is set by the token bit and causes the current drive circuit of channel 65 to begin operation, see FIGS. This is as described for the ninth embodiment. It should be noted that the embodiment of FIG. 11 differs from those embodiments in that the first token register (instead of the second token register) allows the current drive circuit of the 65th channel to be used. The point is that the operation is started. However, another token register may be designated as the token register for determining the timing for starting the operation of the 65th channel. Also, a program delay is set so that there is a slight delay between the time when the LCU receives the current data from the A / D converter 89 (FIG. 7) and the time when the current data is actually evaluated. It may be desirable to keep it. This is because the delay makes it possible to wait for the drive current of the 65th current channel to stabilize.

Effects In the improved printer described above, the adjustment of the level of the current flowing through the recording element can be precisely controlled, and if necessary to compensate for the effect of temperature, the pulse width of the current, That is, the duration can be corrected. Further, when adjusting the level of the current flowing through the recording element, it is possible to ensure that no current level that may cause damage is generated.

Example of 7-9, and in the embodiment of FIGS. 11 to 13, by using the token bit in the token register, sent over the image data bus D ₀ to D ₇ Specify which latch register the incoming image data should be latched in, and execute the current monitor operation during the print operation without waiting for the non-image generation period such as at the time of inter-frame. I can do it. Thus, in response to the monitored current-related data (and thus temperature-related data) obtained from each driver chip, the LCU can quickly perform the adjustment operation, and When the level is detected, the current flowing to the LED can be stopped quickly. Further, when the current level is within an acceptable range, control for ensuring uniformity can be quickly executed, and this control can be performed by current adjustment. It can be performed by a method of performing fine adjustment on the image data supplied to the corresponding driver chip. That is, the image data transmitted from the RIP 16 (FIG. 2) is a multi-bit digital signal representing the gray level of each pixel to be recorded by each LED. On the other hand, adjustments can be made.
More specifically, in response to the multi-bit data signal, for example, a temperature increase of the LED array chip driven by the driver chip is performed according to a signal related to correction for ensuring uniformity generated by the LCU. In order to compensate for the attenuation of the luminescence output of the LED driven by this driver chip due to the above, adjustments can be made. In order to make this adjustment, as shown in FIG. 2, the odd data and the even data sent from the RIP 16 are first corrected in the correction PROM 16a, and then the corrected data is printed. What is necessary is just to send it to a head. The correction PROM 16a stores correction information, and the information is used to convert an 8-bit word from the RIP 16 into a new 8-bit word. The new 8-bit word is a word that has been corrected based on the printhead temperature, thereby adjusting the pulse width duration. The LCU calculates the appropriate correction factor based on the temperature-related data obtained from the current reading of the 65th drive current channel in the PROM 16
It is transmitted to a. Therefore, there is an effective configuration in which the print head can be adjusted in a number of ways to ensure uniformity.
Among these adjustment methods, first, there is a method using a current control data signal (V _REF or R _REF ). This method uses, for example, an image data bus at the time of an inter-frame or the like to control the constant current drive. Bias current I _{CHIP_BIAS} to the circuit (Fig. 6
A, FIG. 6B, FIG. 6C, and FIG. 6D). There is also a method of making adjustments to image data, which can be performed at the time of image generation. The adjustment of the current is performed in the embodiment of FIGS. 7 to 10 and the embodiment of FIGS. 11 to 13 in the same manner as the system described with reference to the embodiment of FIGS. That is, regarding data for current control used for local bias, each driver
A signal is sent to a control logic circuit provided on the chip, indicating that a particular driver chip should latch its current control data in, for example, an 8-bit latch (this is because of the current Because the control data signal is only relevant to that particular driver chip). Global bias signal to driver chip
V _REF may be sent and this global bias signal V
_REF is a signal that all driver chips receive in common. This signal V _REF may be an analog signal or a digital signal.

Further improvements have been made to the embodiments of FIGS.
The improvement means that data supply for more precise current adjustment can be performed during execution of the recording operation of each line.

The drive circuit described here retains the desirable feature of having two operabilities, which are also described in prior art literature. First, it compensates for the difference between the luminous output of an LED driven by one driver chip and the luminous output of an LED driven by another driver chip on the same printhead. For this purpose, digital operations can be individually applied to each chip. This difference in light emission output is caused by differences in process conditions that occur when manufacturing the driver chip or when manufacturing the LED combined with the driver chip, and also due to non-uniformity caused by a difference in temperature. What you get. Also, the retained, second, digital operability is that it allows for operations to make global changes to address aging. Furthermore,
Since these two types of operable parts are provided in each driver chip, problems relating to noise are reduced as much as possible. In addition, since each of these operable parts is provided with a non-digitally controlled transistor, calibration becomes easy and control for ensuring uniformity can be performed with higher precision. ing.

In addition, since the temperature compensation type current source 172 is provided, the current supplied by the temperature compensation type current source 172 changes to a series of digitally addressable transistors, thereby realizing an effective and real-time method. The current is increased quickly. This allows the level of the current flowing through the LED to be changed instantaneously, and the temperature deviation is corrected at least to some extent. Accordingly, the provision of the temperature-compensated current source 172 means that the temperature control function, which is performed by selecting an appropriate transistor from a series of transistors that can be digitally addressed, is further added to the function. It is nothing but the addition of a supplementary device for supplementing.

Further, the printhead described above efficiently uses the electrical wiring provided on the printhead.
First, in order to latch multi-bit image data in a register corresponding to the image data, a token bit is used so that an effective latch operation is performed. Further, in order to control the current adjusting operation, a current control circuit which is operated digitally is used, so that the control is effectively performed. And
The image data and the current control data are transmitted on the same line, whereby
The number of required wires is reduced, and extra wires are omitted. Furthermore, this reduces the number of bonding pads and the number of connections required to manufacture the printhead.

In the embodiment of the present invention described above, only one data line DI5 is used for transmitting the current control data signal (for example, for all odd driver chips). As will be readily understood, a plurality of lines in the image data bus may be used to transmit this current control data signal in parallel.

Therefore, the LED type print head described above is an improvement of the drive circuit for generating the drive current flowing through the recording element, and according to this drive circuit, the turn-on time is simultaneously turned on. The drive current level hardly changes due to the number of recording elements, and the drive current level is isolated from the drive voltage level change so as not to be affected by the voltage level change. For,
The light emission output can also be constant. It is of course possible to make various changes to this drive circuit. For example, since the transistor _Q425 and the transistor _Q423 are substantially used as resistors, these transistors can be omitted.

In the preferred embodiment described above, the transistor to be used is a MOSFET and the gate of the MOSFET is controlled, but other types of devices that perform equivalent functions, such as bipolar transistors, are used. Alternatively, other gated devices may be used. When bipolar transistors are used, by appropriately changing the dimensions of each part and the doping level of each transistor, the conduction characteristics of each transistor should have a predetermined ratio, as described above. Can be.

Although the embodiment illustrated to explain the present invention has a configuration in which a special additional current drive channel is provided in each driver chip, the present invention may be applied to a recording element if it is taken in a wide aspect. And a configuration in which current is detected in the drive channel.

Although the present invention has been described in detail with reference to the preferred embodiments, various changes and modifications can be made within the concept and scope of the present invention so as to be easily understood. is there.

──────────────────────────────────────────────────続 き Continued on the front page (31) Priority claim number 543,929 (32) Priority date June 26, 1990 (1990.26.26) (33) Priority claim country United States (US) (31) Priority number 543,930 (32) Priority date June 26, 1990 (June 26, 1990) (33) Priority country United States (US) (72) Inventor Hadley, Marie 14626, New York, United States of America Rochester, Webwood Circle 77 (72) Inventor Small, Jeffrey A. 14626, New York, United States, Emerald Point, Chile 12 (72) Inventor Matan, Michael William, 14464, New York, USA Hamlin, Roosevelt Highway 2654 (72) Inventor Agar, Keith W. Amelie United States 14467, Henrietta, Peekview Drive 74 (72) Inventor Farm, Hughty United States of America 14580, Webster, Planck Road 610 (72) Inventor Ng, E-Seung 14450, New York, United States of America Fairport , Great Garland Rise 15 (72) Inventor Chun, Jeremy Kay 14612, New York, USA, Clayton Lane 116, Rochester 116 (72) Inventor Kiefer, Kenneth D. 14624, New York, United States, Rochester, Pine Ridge Dry No. 8 (56) References JP-A-1-161271 (JP, A) JP-A-61-185981 (JP, A) JP-A-1-160659 (JP, A) JP-A-63-56469 (JP, A) JP-A-56-27370 (JP, A) JP-A-62-31893 (JP, A) JP-A-1-1566083 (JP, A) A) JP-A-1-1566082 (JP, A) JP-A-2-288375 (JP, A) JP-T1-502734 (JP, A) JP-T1-501781 (JP, A) JP-T3 -503033 (JP, A) Special Table 2-501646 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) B41J 2/44 B41J 2/365 B41J 2/45 B41J 2/455 H04N 1/036

Claims (2)

(57) [Claims] A recording head having a plurality of recording elements for performing recording on a recording medium; and a driving unit for selectively driving each of the plurality of recording elements in accordance with each image data signal and current control data signal. A non-impact type printer device comprising: a transmission means including a data bus, wherein the transmission means includes a multi-bit printer that defines a duration of a recording operation of each of the plurality of recording elements. An image data signal is transmitted, and a current flowing through each of the plurality of recording elements is placed on one of the plurality of lines of the data bus which is also used for transmitting the image data signal. The transmission means for transmitting a multi-bit current control data signal used for controlling a level; and the transmission means for capturing a multi-bit image data signal. To capture a first register means capable of selectively binding the stage, of multi-bit current control data signal,
Second register means selectively connectable to the transmission means; and the first register means and the transmission means for enabling the first register means to capture a multi-bit image data signal. First selection means for selectively coupling the second register means and the transmission means, so as to enable the second register means to capture a multi-bit current control data signal. Second to selectively combine
A non-impact type printer device comprising: 2. A non-impact printer device, comprising: a recording head having a plurality of recording elements for performing recording on a recording medium; and a drive for selectively driving the plurality of recording elements in accordance with respective image data signals. Means, wherein the driving means includes a plurality of data register means, and each of the data register means is combined with each of the recording elements to store the image data signal. A data bus for transmitting an image data signal; common connection means for commonly connecting the data bus to the plurality of data register means; means for generating a token bit signal; By sequentially outputting the token bit signal from each of the plurality of stages, the plurality of data
Multi-stage shift register means for sequentially selecting each of the register means to receive an image data signal, wherein the driving means further comprises a current control means for controlling a level of a current flowing to each of the recording elements. Wherein the current control means includes a current level adjusting means for adjusting a level of a current flowing to each of the recording elements in response to a multi-bit digital signal, wherein the current control means further comprises: First register means including a plurality of registers for storing a digital signal related to the current control level; second register means for storing and shifting the token bit signal; In response to the token bit signal, the corresponding one of the plurality of registers of the first register means: Serial and means for latching the digital signal of the multi-bit, non-impact type printer device, characterized in that.