JP3242456B2 - Inverter power circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter power supply circuit for generating a constant current from an input power supply and supplying it to a storage battery or a load, and more particularly to protection of a switching element against inrush current when the power is turned on.

[0002]

2. Description of the Related Art Conventionally, an inverter power supply circuit composed of a self-excited oscillation type converter has been proposed as a power supply circuit (IEICE Technical Report Vol. 91, NO. 37).

FIG. 5 is a circuit diagram showing a conventional inverter power supply circuit. This inverter power supply circuit includes a resonance circuit including a primary winding L1 and a capacitor C1 of a transformer 1, a switching field-effect transistor 2 and a feedback winding L3 coupled to the primary winding L1 for self-excited oscillation. The output is sent to the secondary winding L2.

A capacitor C2 for generating a bias voltage is
It is connected to the power supply 3 via the resistor R1. The connection point between the resistor R1 and the capacitor C2 is connected to the gate of the field effect transistor 2 via the feedback winding L3. When the bias voltage obtained by charging the capacitor C2 reaches the threshold voltage of the field effect transistor 2, The field effect transistor 2 is turned on.

A connection point between the resistor R1 and the capacitor C2 is connected to a field effect transistor 2 via a bias control circuit composed of a series circuit of a resistor R2 and a diode D1.
Field effect transistor 2
When the bias voltage of the capacitor C2 becomes higher than the drain voltage of the field effect transistor 2 during the ON period, the charge of the capacitor C2 is discharged through the bias control circuit and the field effect transistor 2.

On the other hand, the power induced in the secondary winding L2 is rectified by the diode D2 connected to the secondary winding L2 of the transformer 1, and DC power is supplied to the load 4. .

Next, the operation in a steady state will be described with reference to FIG. 4A and 4B are waveform diagrams showing the voltage at each point in the steady state of the inverter power supply circuit. FIG. 4A shows a case where the input voltage is low, and FIG. 4B shows a case where the input voltage becomes high. Here, the bias voltage of the capacitor C2 is V _B ,
The drain voltage of the field effect transistor 2 V _D, the gate voltage is V _G.

When the power supply 3 is connected, the capacitor C2 is charged through the resistor R1, the bias voltage V _B rises, and the gate-source voltage V _GS is increased by the bias voltage V _B.
Reaches the threshold voltage of the field-effect transistor 2, the field-effect transistor 2 is turned on and oscillates with feedback from the feedback winding L3.

[0009] When the drain voltage V _D than the bias voltage V _B decreases, the charge of the capacitor C2, is discharged through the field effect transistor 2 from the bias control circuit, it decreases the bias voltage V _B.

For this reason, the gate-source voltage V _GS becomes equal to or lower than the threshold voltage of the field-effect transistor 2,
The ON time of the field effect transistor 2 is reduced. Then, the discharge time of the capacitor C2 decreases and its voltage increases.

[0011] Thus, the bias voltage V _B it takes negative feedback in a direction to stabilize, as shown in FIG. 4 (a), performing a self-oscillation operation of stable due to the resonant circuit.

On the other hand, when the voltage of the power supply 3 fluctuates and rises, the on-time of the field effect transistor 2 becomes longer, so that the discharge time of the capacitor C2 becomes longer and the bias voltage V
_B decreases, and the on-time is reduced as shown in FIG.

Next, the operation when the power is turned on will be described with reference to FIG. 6A and 6B are waveform diagrams showing the voltage or current at each point when the power supply of the conventional inverter power supply circuit is turned on. FIG. 6A shows a bias voltage V _B , FIG. 6B shows a gate voltage V _G , and FIG. _D and (d) show the exciting current _ID flowing through the field effect transistor 2.

When the power supply 3 is connected, through the resistor R1
The capacitor C2 is charged and the bias voltage V_BRise
You. And the bias voltage V_BBetween gate and source
Voltage V _GSIs the threshold voltage of the field effect transistor 2
, The field effect transistor 2 is turned on and the excitation
Style I_DFlows, and the drain voltage V_DDecreases and 1
A potential difference occurs at both ends of the next winding L1. Along with this,
Since a voltage is induced at both ends of the return winding L3, the gate voltage
V_GRises further.

After that, the drain voltage V _{D is} applied by the resonance circuit.
There rises, the gate voltage V _G along with this begins to descend.

[0016] When the gate voltage V _G drops below the threshold voltage of the field effect transistor 2, the field effect transistor 2 is turned off.

The subsequent, as described above, it takes a negative feedback in a direction of gradually stabilize the bias voltage V _B, the bias voltage V _B is gradually adapted to the field effect transistor 2 is turned on at a low level.

[0018]

However, when the power is turned on, as shown in FIG. 6, the on-time of the field effect transistor 2 increases, and the exciting current _ID flowing during that time increases. Due to the energy stored in L1, a high-level flyback voltage is generated during the next off period of the field effect transistor 2, and as a result, the field effect transistor 2 with a high breakdown voltage is required.

Since the on-time of the field effect transistor 2 when the power is turned on greatly changes depending on the turns ratio and the degree of coupling between the primary winding L1 and the feedback winding L3, the value of the flyback voltage also increases. It changes greatly.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide an inverter power supply circuit in which an excessive voltage is not applied to a switching element when power is turned on.

[0021]

In order to achieve the above object, the present invention comprises a switching element and a feedback winding, and comprises a primary winding of a transformer and a capacitor connected in series to the switching element. A self-oscillation circuit that self-oscillates the resonance circuit to be performed, and a bias voltage generation circuit that is connected to a switching control terminal of the switching element via the feedback winding . The above bias voltage generation circuit
Voltage applied to the switching control terminal
Turns on when threshold voltage level is exceeded
In the voltage control element, between the switching element and the ground, with an increase of the current flowing through the switching element, it is interposed a resistor to raise the upper kiss Reshorudo voltage level for the ground (claim 1) .

[0022]

[0023]

According to the present invention, when the current flowing through the switching element increases, the voltage generated at the resistor increases. As a result, the threshold voltage level of the switching element with respect to the ground increases, the voltage level applied to the switching control terminal relatively decreases, and the switching element is turned off faster by that amount, so that an excessive current flows through the switching element. Does not flow.

[0024]

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the inverter power supply circuit according to the present invention will be described below with reference to FIGS. FIG.
FIG. 2 is a circuit diagram showing a first embodiment of the inverter power supply circuit.

The power supply 3 rectifies an AC input from, for example, a commercial power supply and supplies DC power to the power supply circuit.
The power supply terminals 3a and 3b are connected between them.
This inverter power supply circuit includes a resonance circuit including a primary winding L1 and a capacitor C1 of a transformer 1, a switching field-effect transistor 2 and a feedback winding L3 coupled to the primary winding L1 for self-excited oscillation. The output is sent to the secondary winding L2.

A primary winding L is provided between the power terminals 3a and 3b.
1. A switching field-effect transistor 2 and a resistor R3 for generating a voltage for raising a threshold voltage level of the field-effect transistor 2 with respect to a power supply terminal 3b (ground) are connected in series. When the field effect transistor 2 is turned on and off, the current flowing into the primary winding L1 is switched, whereby a voltage is induced in the secondary winding L2 and the feedback winding L3.

Further, between the power supply terminals 3a and 3b, a starting resistor R1 and a capacitor C2 for generating a bias voltage are connected in series, and the capacitor C2 is charged by the power source 3 via the resistor R1. Has become. The connection point between the resistor R1 and the capacitor C2 is connected to the gate of the field effect transistor 2 via the feedback winding L3. When the bias voltage due to the charging voltage of the capacitor C2 reaches the threshold voltage of the field effect transistor 2, The field effect transistor 2 is turned on.

The connection point between the resistor R1 and the capacitor C2 is connected to the field effect transistor 2 via a bias control circuit composed of a series circuit of a resistor R2 and a diode D1.
Connected to the drain of When the bias voltage of the capacitor C2 becomes higher than the drain voltage of the field effect transistor 2 during the ON period of the field effect transistor 2, the bias control circuit, the field effect transistor 2
, The electric charge of the capacitor C2 is discharged.

On the other hand, a load 4 is connected to the secondary winding L2 of the transformer 1 via a diode D2. The power induced in the secondary winding L2 is rectified by the diode D2 and DC power is supplied.

Next, the operation of the above-configured circuit when the power is turned on will be described. FIG. 2 is a waveform diagram showing the voltage or current at each point when the power is turned on in the first embodiment. FIG. 2A shows the bias voltage V _{B of} the capacitor C2,
(B) the gate voltage V _G and the source voltage V _S, and (c) shows the drain voltage V _D of the field effect transistor 2, (d) the exciting current I _D flowing through the field effect transistor 2.

[0032] When the power 3 is connected, the capacitor C2 is charged through the resistor R1, the bias voltage V _B rises. When the gate-source voltage V _GS exceeds the threshold voltage of the field-effect transistor 2 due to the bias voltage V _B , the field-effect transistor 2 is turned on, the excitation current _ID flows, and the drain voltage V _D decreases. 1
A potential difference occurs at both ends of the next winding L1. Along with this, the voltage is induced across the feedback winding L3, the gate voltage V _G is further increased.

At this time, the exciting current I _D flowing through the resistor R3
And the source voltage V _S (= I _D × R3) increases (V _{S in} FIG. 2B), so that the gate-source voltage V _GS decreases.

When the source voltage V _S rises above a predetermined level and the gate-source voltage V _GS falls below the threshold voltage of the field effect transistor 2, the field effect transistor 2 is turned off.

Thereafter, the state shifts to a steady oscillation state by the resonance circuit, and the operation as shown in FIG. 4 is performed.

That is, negative feedback is applied in the direction in which the bias voltage V _B is stabilized, and a stable self-excited oscillation operation is performed by the resonance circuit as shown in FIG.

On the other hand, when the voltage of the power supply 3 fluctuates and increases, the bias voltage V _B decreases, and the on-time is shortened as shown in FIG.

As described above, by increasing the threshold voltage level of the field effect transistor 2 with respect to the ground, the on-time of the field effect transistor 2 at the time of turning on the power can be greatly reduced as compared with the conventional circuit. The energy stored by the current _ID can be suppressed to an appropriate amount, and the flyback voltage generated after the field effect transistor 2 is turned off can be reduced.

It should be noted that the exciting current I during steady operation is
_D has a small level as shown in FIG.
The decrease in efficiency due to the resistor R3 is small.

Next, a second embodiment of the inverter power supply circuit according to the present invention will be described with reference to FIG. FIG. 3 is a circuit diagram showing a second embodiment of the inverter power supply circuit. The same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

In this embodiment, instead of the resistor R3 of the first embodiment, a series circuit of resistors R31 and R32 is connected, the base is connected to the connection point of the resistors R31 and R32, and the collector is connected to the field effect transistor 2. A transistor Q1 whose emitter is connected to the power supply terminal 3b is provided at the gate.

Next, the operation of this circuit when the power is turned on will be described. Since the second embodiment shows the same voltage or current waveform as the first embodiment, FIG. 2 is used.

[0043] When the power source 3 is connected, the capacitor C2 is charged through the resistor R1, the bias voltage V _B rises. When the gate-source voltage V _GS exceeds the threshold voltage of the field-effect transistor 2 due to the bias voltage V _B , the field-effect transistor 2 is turned on, the excitation current _ID flows, and the drain voltage V _D decreases. 1
A potential difference occurs at both ends of the next winding L1. Along with this, the voltage is induced across the feedback winding L3, the gate voltage V _G is further increased.

On the other hand, the resistors R31 and R31 are supplied by the exciting current _ID.
When the voltage across 32 is supplied base current to the transistor Q1 rises, transistor Q1 is turned on by this, the gate voltage V _G of the field effect transistor 2 is lowered, the field effect transistor 2 is turned off You.

As described above, similarly to the first embodiment, the on-time of the field effect transistor 2 when the power is turned on can be greatly reduced, so that the energy stored by the exciting current _ID can be suppressed to an appropriate amount, and the field effect transistor 2 can be reduced. , The flyback voltage generated after turning off is reduced.

Further, since the transistor Q1 is used to generate a small-level voltage required for turning on the transistor Q1 between the resistors R31 and R32, the resistance values of the resistors R31 and R32 can be reduced. Thus, the reduction in efficiency due to the resistors R31 and R32 can be further reduced.

[0047]

As described above, the present invention provides a switch.
The voltage applied to the
Voltage control element that is turned on when the threshold voltage level is exceeded
When the current flowing through the switching element is increased, a resistor is provided so that the switching element is quickly turned off by the generated voltage, so that no excessive voltage is applied to the switching element when the power is turned on. Accordingly, it is not necessary to use a switching element for high withstand voltage.

[0048]

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an inverter power supply circuit according to the present invention.

FIG. 2 is a waveform diagram showing the voltage or current at each point when the power supply of the inverter power supply circuit according to the present invention is turned on.
Bias voltage V _B of the capacitor C2, (b) the gate voltage V _G and the source voltage V _S, (c) the drain voltage V _D of the field effect transistor 2, (d) the exciting current I flowing through the field effect transistor 2 _D is shown.

FIG. 3 is a circuit diagram showing a second embodiment of the inverter power supply circuit according to the present invention.

FIGS. 4A and 4B are waveform diagrams showing voltages at respective points in a steady state of the inverter power supply circuit. FIG.
(B) shows a case where the input voltage has increased.

FIG. 5 is a circuit diagram showing a conventional inverter power supply circuit.

6A and 6B are waveform diagrams showing the voltage or current at each point when the power supply of the conventional inverter power supply circuit is turned on. FIG. 6A shows a bias voltage V _B , FIG. 6B shows a gate voltage V _G , and FIG. V _D and (d) indicate the exciting current _ID flowing through the field effect transistor 2.

[Explanation of symbols]

 Reference Signs List 1 transformer 2 field effect transistor (switching element) 3 power supply 3a, 3b power supply terminal 4 load C1, C2 capacitor D1, D2 diode L1 primary winding L2 secondary winding L3 feedback winding R1 to R3, R31, R32 resistor Q1 Transistor (switch means)

──────────────────────────────────────────────────続 き Continuation of the front page Examiner Takao Ako (56) References JP-A-58-43139 (JP, A) JP-A-3-117373 (JP, A) JP-A-4-80290 (JP, U) ( 58) Field surveyed (Int.Cl. ⁷ , DB name) H02J 1/00 309 H02H 7/122 H02H 9/02 H02M 7/537

Claims (1)

(57) [Claims] A self-oscillation circuit having a switching element and a feedback winding, and self-oscillating a resonance circuit formed by a primary winding of a transformer and a capacitor connected in series to the switching element; An inverter power supply circuit having a bias voltage generation circuit connected to a switching control terminal of the switching element via a feedback winding, wherein the switching element is controlled by the bias voltage generation circuit .
Voltage applied to the switching control terminal
Turns on when threshold voltage level is exceeded
In the voltage control device, an inverter power source to between the switching element and the ground, characterized in that in response to the increase in current flowing through the switching element, is interposed a resistor to raise the upper kiss Reshorudo voltage level for the ground circuit.