JP3239004B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a multi-pin IC package and a method of manufacturing the same.

In recent years, semiconductor devices such as LSIs have been required to have higher integration, higher speed, and higher power. However, malfunction of devices at high frequencies has become a problem. Therefore, there is a need for an IC package having good electrical characteristics at high frequencies.

[0003]

2. Description of the Related Art FIG. 11 shows an example of a conventional TAB (Tap).
e Automated Bonding) IC
1 shows a cross-sectional view of a package. In the tab tape, a lead 9 made of copper foil is attached to a tape member 13 made of resin by an adhesive 12.
Are joined. A bump 14 is formed on an electrode portion on the IC chip 15, and an electrode of the IC chip 15 is connected to the inner lead portion 9 a of the lead 9 via the bump 14. Outer lead portion 9 of lead 9
b projects out of the IC package after resin sealing.

On the tab tape 13, at a predetermined pitch,
A large number of leads 9 are provided, and inner leads 9 a of each lead 9 are connected to electrodes of the IC chip 15. The leads 9 include a signal lead, a power supply lead, and a ground lead.

[0005]

The conventional I shown in FIG.
In the C package, the conductive layer is a single layer including only the narrow lead 9, and a ground layer and a power supply layer having a large area cannot be provided. Therefore, at high frequencies, the inductance and resistance of the ground line and the power line are large, and the electrical characteristics are not good. There is a problem that a high-speed IC malfunctions due to poor electrical characteristics at high frequencies.

Therefore, recently, use of a multilayer tab tape in which conductive layers are provided in multiple layers via a resin layer has been studied. In the multilayer tab tape, electrical characteristics at high frequencies can be improved. However, the multilayer tab tape requires through holes for connecting the conductive layers, and is difficult to manufacture, and has problems of high cost and reliability.

The present invention has been made in view of the above points, and has as its object to provide a low-cost semiconductor device having good electric characteristics at high frequencies and a method of manufacturing the same.

[0008]

According to a first aspect of the present invention, an electrode of a semiconductor chip is connected to each internal lead of a plurality of lead members, and the external lead of the lead member protrudes. In a semiconductor device resin-sealed in a state, the anisotropic conductive resin layer overlapped and bonded to the lead member and the anisotropic conductive resin layer facing the lead member via the anisotropic conductive resin layer. A solution is provided by a configuration in which a ground layer or a conductive layer as a power supply layer, which is joined to the conductive resin layer and is electrically connected to the predetermined lead member via the anisotropic conductive resin layer, is provided. Is done.

According to the second aspect of the present invention, on the joint surface of the lead member with the anisotropic conductive resin layer, on the joint surface of the conductive layer with the anisotropic conductive resin layer, or on the lead member. The lead member and the conductive layer are electrically connected at opposing positions on the joint surface with the anisotropic conductive resin layer and on the joint surface of the conductive layer with the anisotropic conductive resin layer. And a protrusion for electrically connecting the lead member to the conductive layer by compressing the anisotropic conductive resin layer with the protrusion.

In the invention according to claim 7, the conductive layer is laminated via the anisotropic conductive resin layer.

In the invention according to claim 8, the conductive layer is divided and provided for each predetermined lead member in the lead member.

According to the ninth aspect of the present invention, the lead member is
It is configured to be a metal foil lead of a predetermined pattern formed on a tape member.

[0013]

According to the first aspect of the present invention, a multilayer structure having a conductive layer laminated on a lead member via an anisotropic conductive resin layer can be realized. For this reason, a power supply layer or a ground layer having a large area can be provided, and electric characteristics at high frequencies can be significantly improved as compared with a conventional semiconductor device having a single-layer structure.

Further, the lead member, the anisotropic conductive resin layer and the conductive layer are joined, and a predetermined lead member and the conductive layer are electrically connected via a predetermined portion of the anisotropic conductive resin layer. Multi-layering is possible. For this reason, it is not necessary to form a through hole, and a low-cost and highly reliable multilayer structure can be realized.

According to the second aspect of the present invention, the lead member, the conductive layer and the anisotropic conductive resin layer are simply press-bonded with the anisotropic conductive resin layer interposed between the lead member and the conductive layer. The conductive layer can be electrically connected to the conductive layer. For this reason, it is possible to more easily perform multilayering.

According to the seventh aspect of the present invention, a plurality of types of different conductive layers can be provided. Therefore, even when a plurality of types of power supply and ground are provided, a power supply layer and a ground layer having a large area are provided so that electric power at a high frequency can be provided. It is possible to improve characteristics.

According to the invention of claim 8, it is possible to provide a conductive layer divided for each predetermined lead member in accordance with desired electric characteristics.

According to a ninth aspect of the present invention, in a semiconductor device of a type in which an electrode of a semiconductor chip is connected to a metal foil lead formed on a tape member, the electrical characteristics at high frequencies are excellent, the cost is low, and the reliability is low. It is possible to realize a multi-layer structure having a high density.

[0019]

1 is a block diagram showing a first embodiment of the TAB system according to the present invention.
1 shows a cross-sectional view of a C package. In the figure, the same components as those in FIG. 11 are denoted by the same reference numerals. An adhesive 1 is applied to a tape member 13 made of a resin such as a polyimide resin constituting the tab tape.
Copper foil made of lead 11 ₁ is joined by two. IC
Electrode of the chip 15, via the bumps 14 formed on the electrode, is connected to the inner lead portion 11 _1a of the lead 11 _1. The outer lead portions 11 _1b of the lead 11 _1, after resin sealing, projecting out of the IC package.

On the tape member 13, at a predetermined pitch,
A large number of substantially strip-shaped leads 11 ₁ are provided, and each lead 11 ₁
The inner lead portions 11 _1a is connected to the electrode of the IC chip 15. Some leads 11 _1, signal leads, power lead, and a ground lead.

[0021] power supply or the upper surface of the lead 11 ₁ for ground, the projection 18 is formed. This projection 18
Lead 11 ₁ of the upper surface of the etching, the formation of bumps by a process bump or ball bumps are formed by machining or the like with a die.

[0022] upper surface of the lead 11 _1, anisotropic conductive resin film (ACF) 16 is bonded. The ACF
In a thin film in which metal particles are dispersed and contained in a resin having elasticity, the metal particles are in close contact with each other in a compressed portion and become conductive, and there is no conductivity in other portions.

On the upper surface of the ACF 16, an extremely thin metal plate 17 is provided.
_One is joined. Metal plate 17 ₁ is a conductive layer as a power supply layer or a ground layer.

At the time of the joining, the protrusion 18
CF16 are compressed, and the metal plate 17 ₁ facing the projection 18 and the projection 18 are electrically connected.

Lead 11 ₁ , ACF 16 and metal plate 17
To join ₁ , for example, the ACF 16 is connected to the lead 11 _1.
After bonded to the upper surface, overlapped metal plates 17 _1, lead 11
₁ and the metal plate 17 ₁ in a state sandwiching the ACF16, thermocompression bonding. At the time of thermocompression bonding, ACF16 between the metal plate 17 ₁ facing the protrusion 18 and the protrusion 18 is compressed, and the metal plate 17 ₁ facing the projection 18 and the projection 18 are electrically connected. Thereby, the lead 1 for power supply or ground 1
1 ₁ and the metal plate 17 ₁ is electrically connected. Protrusion 18
In other parts, the ACF 16 is not compressed because it is slightly compressed.

It should be noted in advance by bonding a metal plate 17 ₁ in ACF16 earlier, thereafter, A lead 11 ₁ and the metal plate 17 ₁
The thermocompression bonding may be performed with the CF 16 interposed therebetween.

The metal plate 17 ₁ is disposed so as to be opposed to the plurality of leads 11 ₁ disposed substantially on the same plane via the ACF 16, and is significantly larger than the area of _one lead 11 _1. Has a large area.

As described above, in this embodiment, the lead 11
It can be a multi-layer structure having a metal plate 17 ₁ is a conductive layer other than ₁ can be provided with a wide supply layer of the area, or a ground layer. Therefore, the inductance and resistance of the ground line and the power supply line can be reduced as compared with the conventional single-layer IC package, and the electrical characteristics at high frequencies can be greatly improved. With the improvement of the electrical characteristics, noise can be reduced and malfunction of a device formed on the IC chip 15 can be eliminated.

Further, in order to form a multilayer structure, it is only necessary to sandwich the ACF 16 between the lead 11 ₁ and the metal plate 17 ₁ and thermocompression-bond. Unlike the conventional multilayer tab tape, it is necessary to form a through hole which is difficult to manufacture. Absent. Therefore, a highly reliable IC package having a multilayer structure can be realized at a significantly lower cost than conventional multilayer tab tapes.

Further, the strength is increased by the metal plate 17 ₁ the joined, ILB to connect the IC chip 15 (inner-
Tape member 13 which is problematic during lead bonding)
Can be prevented from being bent. Further, by providing the metal plate 17 _1, it is possible to improve heat dissipation.

FIG. 2 is a sectional view of a TAB type IC package according to a second embodiment of the present invention. In the figure, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description will be appropriately omitted. I
The electrode of the C chip 15 is connected to the lead 1 via the bump 14.
It is connected to one ₂ of the inner lead portions 11 _2a. Outer lead portions 11 _2b, after resin sealing, projecting out of the IC package. Some leads 11 _2, signal leads, power lead, and a ground lead.

[0032] upper surface of the lead 11 _2, ACF16 are joined. The upper surface of ACF16 the metal plate 17 ₂ is bonded. The metal plate 17 ₂ is a conductive layer as a power supply layer or a ground layer.

[0033] the metal plate 17 ₂ lower surface (junction surface between ACF16), the projection 19 is formed. This projection 19
The metal plate 17 ₂ the lower surface of the etch, the formation of bumps by a process bump or ball bumps are formed by machining or the like with a die.

Lead 11 ₂ , ACF 16 and metal plate 17
_The ACF 16 is connected to the lead 11 ₂ and the metal plate 17 ₂
And by thermocompression bonding. At the time of thermocompression bonding, ACF16 is compressed between the leads 11 ₂ opposed to the protrusion 19 and the protrusion 19, and leads 11 ₂ opposed to the protrusion 19 and the protrusion 19 are electrically connected. Thus, power supply or ground lead 11 ₂ and the metal plate 17
₂ are electrically connected. In portions other than the protrusion 19,
Since the ACF 16 is slightly compressed, it is in a non-conductive state.

The metal plate 17 ₂ is disposed so as to face each other with a disposed substantially in the same plane a plurality of leads 11 ₂ ACF16, compared to one area of the leads 11 _2, significantly Has a large area.

As described above, in the second embodiment, the first embodiment
Similarly, the metal plate 17 as the conductive layer _TwoWith a multilayer structure and
Large area power supply layer or ground layer
Can be provided. For this reason, conventional single-layer IC packages
Significantly improved electrical characteristics at high frequencies compared to cages
can do.

Further, in a multilayer structure is across the lead 11 ₂ and the metal plate 17 ₂ ACF16, it is only necessary to thermocompression bonding reliability at a significantly lower cost than conventional multilayer tab tape to form a through hole It is possible to realize a multi-layered IC package having high reliability.

FIG. 3 is a sectional view of a TAB type IC package according to a third embodiment of the present invention. In the figure, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and the description will be appropriately omitted. Electrodes of the IC chip 15 through a bump 14, and is connected to the inner lead portion 11 _3a of the lead 11 _3.
Outer lead portions 11 _3b, after resin sealing, projecting out of the IC package. Some leads 11 _3, signal leads, power lead, and a ground lead.

[0039] power supply or the upper surface of the lead 11 ₃ for grounding, the projection 18 is formed. The upper surface of the lead 11 _3, ACF16 are joined. The upper surface of ACF16 the metal plate 17 ₃ are joined. Metal plate 17 ₃
Is a conductive layer as a power supply layer or a ground layer.

_{On the} lower surface of the metal plate 173 (the joint surface with the ACF 16), a projection 19 is formed at a position facing the projection 18.

Lead 11 ₃ , ACF 16 and metal plate 17
_The ACF 16 is joined with the lead 11 ₃ and the metal plate 17 ₃ .
And by thermocompression bonding. During this thermocompression bonding, the ACF 16 between the protrusion 18 and the protrusion 19 facing the protrusion 18 is compressed, and the protrusion 1 facing the protrusion 18 is compressed.
9 are electrically connected. Thus, the power supply or ground lead 11 ₃ and the metal plate 17 ₃ are electrically connected. At the portions other than the projections 18 and 19, the ACF 16 is slightly compressed, and thus is in a non-conductive state.

The metal plate 17 ₃ is disposed so as to face each other with a plurality of leads 11 ₃ ACF16 disposed substantially coplanar, than the area of one lead 11 _3, greatly Has a large area.

[0043] As described above, in the third embodiment, first, similarly to the second embodiment, can be a multi-layer structure having a metal plate 17 ₃ is a conductive layer, a large area power layer or the ground Layers can be provided. For this reason, the conventional single-layer I
Electrical characteristics at high frequencies can be significantly improved as compared with the C package.

[0044] Further, in a multilayer structure is across the lead 11 ₃ and the metal plate 17 ₃ ACF16, it is only necessary to thermocompression bonding reliability at a significantly lower cost than conventional multilayer tab tape to form a through hole It is possible to realize a multi-layered IC package having high reliability. Further, for providing a projection 18, 19 on both the lead 11 ₃ and the metal plate 17 _3, it is possible to secure the electrical connection of the lead 11 ₃ and the metal plate 17 _3.

FIG. 4 is a sectional view of a TAB type IC package according to a fourth embodiment of the present invention. In the figure, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and the description will be appropriately omitted. Electrodes of the IC chip 15 through a bump 14, and is connected to the inner lead portions 11 _4a of the leads 11 _4.
The outer lead portions 11 _4b of the leads 11 _4, after resin sealing, projecting out of the IC package. Some lead 11 _4, signal leads, power lead, and a ground lead.

[0046] Among the power supply or lead 11 ₄ for ground lead is connected to the second metal plate 21 to be described later 11
_A projection 18 is formed on the upper surface of ₄ . Further, of the lead 11 ₄ for power supply or ground, first to be described later
The upper surface of the lead 11 ₄ connected to the metal plate 17 _4,
A projection 25 longer than the projection 18 is formed.

[0047] the upper surface of the lead 11 _4, ACF16 are joined. The second metal plate 2 is provided on the upper surface of the ACF 16.
1 are joined. ACF2 on the upper surface of the metal plate 21
2 are joined. The upper surface of ACF22 the first metal plate 17 ₄ is bonded. Metal plate 21,17 _4,
It is a conductive layer as a power supply layer or a ground layer.

_On the lower surface of the metal plate 174 (the joint surface with the ACF 22), a projection 26 is formed at a position facing the projection 25.

FIG. 5 is an enlarged perspective view of the vicinity of the projections 25 and 26. The metal plate 21 has substantially cylindrical projections 25 and 2.
A hole 23 into which 6 is fitted is formed. The diameter of the hole 23 is
The diameter of the projections 25, 26 is sufficiently larger than the diameter of the projections 25, 26.
Does not contact the metal plate 21.

The lead 11 _4, ACF16, metal plate 21,
The ACF 22 and the metal plate 17 ₄ are joined by the leads 11 ₄ ,
ACF 16, metal plate 21, ACF 22, and metal plate 17 ₄
And by thermocompression bonding.

During this thermocompression bonding, the ACF 16 between the projection 18 and the projection 19 facing the projection 18 is compressed, and the projection 18 and the projection 19 facing the projection 18 are electrically connected. Thus, the metal plate 21 a power supply or ground lead 11 ₄ provided with projections 18 are electrically connected.

At the same time, the ACFs 16 and 22 between the projection 25 and the projection 26 facing the projection 25 are compressed,
The protrusion 25 and the opposing protrusion 26 are electrically connected in the vicinity of the hole 23. At this time, the hole 23 and the projections 25 and 26 are not electrically connected. Thus, the power supply or for ground lead 11 ₄ provided projections 25 and the metal plate 17 ₄ are electrically connected.

At portions other than the projections 18, 19, 25, and 26, the ACFs 16, 22 are slightly compressed, and thus are non-conductive.

[0054] As described above, in the fourth embodiment, a plurality of types of metal plates 21,17 ₄ (power supply layer or ground layer) that is not electrically connected to provided a power supply or ground leads 11 ₄ it can be connected to one of the metal plates 21,17 _4.

[0055] the metal plate 21 is disposed so as to face each other with a plurality of leads 11 ₄ disposed in substantially the same plane as the ACF16, than the area of one lead 11 _4,
It has a much larger area. Similarly, the metal plate 17 ₄
Is disposed so as to face each other through the metal plate 21 and ACF 22, than the area of one lead 11 _4, it is to have a significantly large area.

As described above, in the fourth embodiment, a multilayer structure having a plurality of types of metal plates 21 and 17 ₄ (conductive layers) that are not electrically connected can be provided. The power supply layer or the ground layer having a large area can be provided for the ground. Therefore, even when a plurality of types of power sources and grounds are provided, electrical characteristics at high frequencies can be significantly improved as compared with a conventional single-layer IC package.

[0057] In addition, in a multilayer structure is, to lead 11 _4,
ACF 16, metal plate 21, ACF 22, and metal plate 17
_It is only necessary to superimpose the layers ₄ and thermocompression bonding, and it is possible to realize a highly reliable multi-layer IC package at a significantly lower cost than a conventional multi-layer tab tape forming through holes.

In the same manner, if necessary, the number of stacked metal plates and ACFs can be further increased.

FIG. 6 is a sectional view of a TAB type IC package according to a fifth embodiment of the present invention. In the figure, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and the description will be appropriately omitted. Electrodes of the IC chip 15 through a bump 14, and is connected to the inner lead portion 11 _5a of the lead 11 _5.
Outer lead portions 11 _5b, after resin sealing, projecting out of the IC package. Some lead 11 ₅ signal leads, power lead, and a ground lead.

[0060] Among the leads 11 ₅ of the power supply or ground, lead is connected to the second metal plate 31 to be described later 11
_The protrusion 18 is formed on the upper surface of the _fifth . Further, of the lead 11 ₅ of the power supply or ground, first to be described later
The upper surface of the lead 11 ₅ connected to the metal plate 17 _5,
The projection 18 is not formed.

[0061] the power supply or the upper surface of the lead 11 ₅ for ground, ACF16 are joined. A second metal plate 31 is joined to the upper surface of the ACF 16. Metal plate 3
The ACF 22 is joined to the upper surface of the first ACF 1. ACF2
The second upper surface, the first metal plate 17 ₅ is bonded.
Metal plate 31,17 ₅ is a conductive layer as a power supply layer or a ground layer.

A hole 28 is formed in the metal plate 31, and a substantially cylindrical projection 27 penetrating the hole 28 is provided. The protrusion 27 is separated from other members.

The lead 11 ₅ , the ACF 16, the metal plate 31,
The ACF 22 and the metal plate 17 ₅ are joined by the leads 11 ₅ ,
ACF 16, metal plate 31, ACF 22, and metal plate 17 ₅
And by thermocompression bonding.

[0064] During the thermocompression bonding, ACF16 between the leads 11 ₅ facing the lower end and the protrusion 27 of the protrusion 27 is compressed, and the lead 11 ₅ facing the projections 27 are electrically connected. And, ACF 22 between the metal plate 17 ₅ facing the upper end and the protrusion 27 of the protrusion 27 is compressed, and the metal plate 17 ₅ facing the projections 27 are electrically connected.
At this time, the projection 27 and the hole 28 are not electrically connected. Thus, the metal plate 17 ₅ power supply or ground leads 11 ₅ are electrically connected.

At this time, simultaneously, the projection 18 and the projection 18
The ACF 16 between the metal plate 31 and the opposing metal plate 31 is compressed, and the protrusion 18 is electrically connected to the metal plate 31 opposing the metal plate 31. Accordingly, and the power supply or ground lead 11 ₅ provided with projections 18 the metal plate 31 are electrically connected.

FIG. 7 is an explanatory view of a procedure for forming the projection 27. As shown in FIG. 7A, first, the ACF 16 is joined to the lower surface of the metal plate 31a on which the protrusion 27a is formed. Thereafter, as shown in FIG. 7B, the metal member around the protrusion 27a is removed by etching, and the columnar protrusion 27 is separated from the metal plate 31.

The metal plate 31 thus formed and the ACF
16 is joined to the lead 11 _FiveJoin the top surface and
Then, the ACF 22 is joined onto the metal plate 31 and the ACF 22
Metal plate 17 on_FiveTo join. Joining by this thermocompression bonding
At this time, the protrusion 27_FiveAnd metal plate 17_FiveToni Den
It is connected pneumatically.

In portions other than the protrusion 27, the ACFs 16, 2
2 is non-conductive because it is only slightly compressed.

[0069] As described above, in the fifth present embodiment, similarly to the fourth embodiment, can be a multi-layer structure in which a plurality of types of metal plates 31,17 _5, a plurality of types of power supply, to ground Thus, a power supply layer or a ground layer having a large area can be provided. Therefore, even when a plurality of types of power sources and grounds are provided, electrical characteristics at high frequencies can be significantly improved as compared with a conventional single-layer IC package.

[0070] In addition, in a multilayer structure is, to lead 11 _5,
ACF 16, metal plate 31, ACF 22, and metal plate 17
_It is only necessary to superimpose the layers ₅ and thermocompression bonding, and it is possible to realize an IC package having a multi-layer structure with much lower cost and higher reliability than the conventional multi-layer tab tape forming through holes.

In the same manner, if necessary, the number of metal plates and ACFs can be further increased.

FIG. 8 shows a TAB system according to a sixth embodiment of the present invention.
1 shows a cross-sectional view of the IC package of FIG. In the figure, the same as FIG.
The same reference numerals are given to the components, and the description will be appropriately omitted.
The electrodes of the IC chip 15 are connected to the leads via the bumps 14.
11₆Inner lead part 11 _6aIt is connected to the. Au
Talead part 11_6bOf the IC package after resin sealing
Project outside. Lead 11₆Inside are signal leads,
There are power supply leads and ground leads.

[0073] the upper surface of the lead 11 _6, ACF16 are joined. The upper surface of ACF16, the metal plate 17 ₆ are joined. The metal plate 17 ₆ is a conductive layer as a power supply layer or a ground layer. Metal plate 17 ₆ Lower surface (ACF1
A projection 19 is formed on the surface (joining surface with the surface 6).

The lead 11 ₆ , the ACF 16 and the metal plate 17
Joining ₆ is a lead 11 ₆ and the metal plate 17 ₆ ACF16
And by thermocompression bonding. During this thermocompression bonding, the lead 11 ₆ facing the projection 19 and the projection 19 are electrically connected. Thus, the metal plate 17 ₆ power supply or ground lead 11 ₆ are electrically connected.

[0075] Further, on the lower surface of the tape member 13, a copper foil made of conductive layer 32 is formed, via through holes 33, and is electrically connected to the lead 11 _6.

As described above, the tab tape having a multi-layer structure formed by the conventional method can be multi-layered by the method of joining the metal plates via the ACF of the present invention.

FIGS. 9 and 10 show an example of the shape of a metal plate.
It is a top view of C package. Here, the case of the first embodiment is shown, but the same applies to other embodiments. In the example of FIG. 9, so as to overlap through ACF16 the overall number of leads 11 ₁ connected to the electrodes of the IC chip 15 is arranged a frame-like metal plate 17 _1A. Lead 11 ₁ of power supply or ground is a protrusion 18 part provided on the lead 11 _1, and is electrically connected to the metal plate 17 _1A.

[0078] Note that the tape member 13 of the tab tape 41, outer lead holes 42, the lead 11 ₁ of the test pad 43 connected to the outer lead portions 11 _1b is formed.

In the example shown in FIG.₁A
Metal plate 17 overlapping via CF 16 _1B, 17_1C, 1
7_1D, 17_1EAre arranged separately. Each metal plate 1
7_1B, 17_1C, 17_1D, 17_1EAre different power supply layers or
Can be used as a ground layer.

The metal plates 17 _1A , 17 _1B , 17 _1C , 1
7 _1D and 17 _1E may be formed so as to cover the entire upper surface of the chip 15 via an insulating layer provided on the upper surface of the chip 15.

As described above, the shape of the metal plate is not limited, and can be set appropriately according to the characteristics of the IC chip 15.

The present invention is not limited to the TAB type IC package, but is also applicable to a lead frame type IC package by bonding a metal plate via an ACF.
Multi-layering can be performed.

Also, in the case of an IC package using a substrate such as a printed board, a ceramic board, or a flexible board on which leads are provided, it is possible to similarly perform multi-layering by bonding a metal plate via an ACF. Can be.

[0084]

As described above, according to the first aspect of the present invention,
With a multilayer structure having a conductive layer laminated on a lead member via an anisotropic conductive resin layer, a power supply layer or a ground layer having a large area can be provided. Electrical characteristics can be greatly improved, and a lead member, an anisotropic conductive resin layer and the above conductive layer are joined, and a predetermined lead member and the conductive layer are electrically connected via the anisotropic conductive resin layer. Since it is possible to form a multilayer by connecting to a substrate, there is no need to form a through-hole, and it is possible to realize a low-cost and highly reliable multilayer structure.

According to the second aspect of the present invention, the lead member, the conductive layer and the anisotropic conductive resin layer are simply press-bonded with the anisotropic conductive resin layer interposed between the lead member and the conductive layer. Since the member and the conductive layer can be electrically conducted, multilayering can be performed more easily.

According to the seventh aspect of the present invention, since a plurality of types of different conductive layers can be provided, even when a plurality of types of power supply and ground are provided, a power supply layer and a ground layer having a wide area are provided and a high frequency Can be improved in electrical characteristics.

According to the invention of claim 8, it is possible to provide a conductive layer divided for each predetermined lead member in accordance with desired electric characteristics.

According to the ninth aspect of the present invention, in a semiconductor device of a type in which an electrode of a semiconductor chip is connected to a metal foil lead formed on a tape member, the electrical characteristics at high frequencies are excellent and the cost is low. A highly reliable multilayer structure can be realized.

[Brief description of the drawings]

FIG. 1 is a sectional view of an IC package according to a first embodiment of the present invention.

FIG. 2 is a sectional view of an IC package according to a second embodiment of the present invention.

FIG. 3 is a sectional view of an IC package according to a third embodiment of the present invention.

FIG. 4 is a sectional view of an IC package according to a fourth embodiment of the present invention.

FIG. 5 is an enlarged perspective view of the vicinity of a protrusion in FIG. 4;

FIG. 6 is a sectional view of an IC package according to a fifth embodiment of the present invention.

FIG. 7 is an explanatory diagram of a procedure for forming a projection in FIG. 6;

FIG. 8 is a sectional view of an IC package according to a sixth embodiment of the present invention.

FIG. 9 is a plan view of an IC package showing an example of a shape of a metal plate.

FIG. 10 is a plan view of an IC package showing a shape example of a metal plate.

FIG. 11 is a cross-sectional view of a conventional IC package.

[Explanation of symbols]

11 _{1 to} 11 ₆ Lead 12 Adhesive 13 Tape member 14 Bump 15 IC chip 16, 22 ACF 17 _{1 to} 17 ₆ , 17 _{1A to} 17 _1E Metal plate 18, 19 Projection 21, 31 Metal plate 23 Hole 25, 26 Projection 27 Projection 28 Hole 32 Conductive Layer 33 Through Hole 41 Tab Tape 42 Outer Lead Hole 43 Test Pad

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-64-84689 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H01L 21/60

Claims (13)

(57) [Claims] 1. A semiconductor chip (1 in the internal leads of the plurality of lead members _{(11 1 ~11 6) (11} 1a ~11 6a)
5) is connected to the lead member (11 _1).
To 11 in the semiconductor device outer lead portions (11 _1b to 11 _6b) is sealed with a resin so as to protrude in _6), the lead member (11 ₁ to 11 ₆₎ are overlapped and joined to the anisotropic conductive resin a layer (16) is joined to the anisotropic conductive resin layer so as to face with the lead member (11 ₁ to 11 ₆₎ via the anisotropic conductive resin layer (16) (16), The predetermined lead member (11 ₁ ) is interposed via the anisotropic conductive resin layer (16).
To 11 ₆₎ and the conductive layer serving as a ground layer or power layer is electrically connected (17 ₁ to 17 _3, 21,31,1
7 ₆₎ and the semiconductor device, wherein a is provided. 2. The lead member (11)₁~ 11₆)Before
On the bonding surface with the anisotropic conductive resin layer (16) or
Electric layer (17₁~ 17_Three, 21,31,17₆Above)
On the bonding surface with the isotropic conductive resin layer (16) or
Member (11 ₁~ 11₆)) Of the anisotropic conductive resin layer (1)
6) and the conductive layer (17).₁~ 17_Three, 2
1,31,17₆The above anisotropic conductive resin layer (16)
At the opposite position on both bonding surfaces on the bonding surface of
Member (11₁~ 11₆) And the conductive layer (17)₁~ 1
7_Three, 21,31,17₆) To electrically connect
Projections (18, 19), and the anisotropic conductive resin layer (1) is formed by the projections (18, 19).
6) is compressed and the lead member (11) is compressed.₁~ 11₆)When
The conductive layer (17₁~ 17_Three, 21,31,17 ₆)When
2. The device according to claim 1, wherein said device is electrically conductive.
Semiconductor device. 3. The lead (18, 19) is provided on the lead.
Member (11₁~ 11 ₆) Or the conductive layer (17)₁~ 17
_Three, 21,31,17₆) By etching the joint surface
3. The semiconductor device according to claim 2, wherein the semiconductor device is formed.
Place. 4. The projection (18, 19) is provided on the lead.
Member (11₁~ 11 ₆) Or the conductive layer (17)₁~ 17
_Three, 21,31,17₆) Process bump on the joint surface
It is characterized by being a bump formed by plating
The semiconductor device according to claim 2. 5. The lead (18, 19) is provided on the lead.
Member (11₁~ 11 ₆) Or the conductive layer (17)₁~ 17
_Three, 21,31,17₆) To the ball bump on the joint surface
3. The bump according to claim 2, wherein:
13. The semiconductor device according to claim 1. 6. The lead (18, 19) is provided on the lead.
Member (11₁~ 11 ₆) Or the conductive layer (17)₁~ 17
_Three, 21,31,17₆Molding on the joint surface
3. The semiconductor according to claim 2, wherein the semiconductor is formed by:
Body device. 7. The conductive layer (21, 17 ₄ ; 31, 17)
3. The method according to claim 1, wherein the step ( ₅ ) is laminated via the anisotropic conductive resin layer (16, 22).
13. The semiconductor device according to claim 1. 8. The conductive layer (17 _{1B to} 17 _1E ) includes a predetermined lead member (11 ₁ ) in the lead member (11 ₁ ).
2. The device according to claim 1, wherein the device is divided and provided for each.
Alternatively, the semiconductor device according to claim 2. 9. The lead member (11 _{1 to} 11 ₆ )
3. A metal foil lead having a predetermined pattern formed on a tape member (13).
13. The semiconductor device according to claim 1. 10. The semiconductor device according to claim 1, wherein said lead member is a lead of a lead frame provided with a plurality of leads holding a predetermined shape. 11. The semiconductor device according to claim 1, wherein the lead member is a lead of a substrate on which a plurality of leads of a predetermined shape are provided. 12. A plurality of lead members (11).₁~ 11₆)
Of each internal lead (11_1a~ 11_6a) To semiconductor chip
After connecting the electrode of (15), the lead member (11)₁
~ 11₆) External leads (11)_1b~ 11_6b) Protrudes
In a method of manufacturing a semiconductor device in which a semiconductor device is sealed with a resin in a closed state, a conductive layer (17₁~ 1
7_Three, 21,31,17₆) Is an anisotropic conductive resin layer (1).
6) via the lead member (11)₁~ 11₆) And opposite
As shown in FIG.₁~ 11₆),the above
Anisotropic conductive resin layer (16) and conductive layer (17)₁~ 1
7_Three, 21,31,17₆), And the above-mentioned predetermined lead is interposed via the anisotropic conductive resin layer (16).
Member (11₁~ 11 ₆) And the conductive layer (17)₁~ 17
_Three, 21,31,17₆) And electrically connect
A method for manufacturing a semiconductor device. 13. The lead member (11)₁~ 11₆)of
On the bonding surface with the anisotropic conductive resin layer (16) or
Conductive layer (17₁~ 17_Three, 21,31,17 ₆Above)
On the joint surface with the anisotropic conductive resin layer (16) or
(11)₁~ 11₆)) The above anisotropic conductive resin layer
(16) and the conductive layer (17)₁~ 1
7_Three, 21,31,17₆)) The anisotropic conductive resin layer
(16) at opposite positions on both joint surfaces on the joint surface,
The lead member (11)₁~ 11₆) And the conductive layer (17)
₁~ 17_Three, 21,31,17₆) And electrically connect
Projections (18, 19) for the lead member (11₁~ 11₆) And conductive layer (17)₁~
17_Three, 21,31,17₆) In the anisotropic conductive resin layer
(16), the lead member (11)₁~ 1
1₆), The conductive layer (17)₁~ 17_Three, 21,31,1
7₆) And said anisotropic conductive resin layer (16)
The anisotropic conductive resin layer (16) is formed by the projections (18, 19).
Of the lead member (11)₁~ 11₆) And above
The conductive layer (17 ₁~ 17_Three, 21,31,17₆) And
13. The electrical connection according to claim 12, wherein the electrical connection is established.
A method for manufacturing a semiconductor device.