JP3226094B2 - Optical transmission communication device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an optical transmission communication device for performing communication using an optical signal as a transmission medium.

[0002]

2. Description of the Related Art As an optical transmission communication device, there is a device that takes in a clock signal input from outside the device, uses the clock signal as a device internal clock signal, and performs an internal operation based on the device internal clock signal. As the clock signal input from the outside of the device, a clock signal extracted from an optical transmission signal, a clock signal extracted from a bipolar transmission signal, a master clock signal externally provided for synchronizing all transmission devices, and the like are used. Since the clock signal in the device needs to be phase-synchronized with the clock signal input from the outside of the device, the clock signal input from the outside of the device is generally input to a phase locked oscillator (PLO). Then, the output of the PLO is used as the internal clock signal.

[0003] In such an optical transmission communication device, it is necessary to monitor the state of synchronization of the clock signal in the device. In that case, for example, the probe of the oscilloscope
By connecting to the input side and the output side of the LO and checking the display of the oscilloscope, it is possible to monitor the synchronization pull-in state of the internal clock signal. When the phase of the internal clock signal is synchronized with that of the external clock signal, for example, it is possible to start supplying an output from a portion operating based on the internal clock signal to another device.

[0004]

However, it is troublesome to use an oscilloscope or other observing instrument to observe the state of pull-in of the clock signal in the apparatus, and an observation error may occur.

Therefore, the present invention automatically detects that the clock signal in the device has been synchronized in phase with the clock signal from outside the device, and automatically determines the timing at which the processed signal can be given to another device. It is an object to provide an optical transmission communication device that can be determined.

Japanese Patent Application Laid-Open No. 4-40117 discloses that
There is disclosed an example in which a pull-in state monitoring circuit is provided in a PLL circuit which receives clock signals of two kinds of frequencies and generates an output signal synchronized with the phase of the signals. However, the pull-in state monitoring circuit in the PLL circuit is used to determine whether or not to control the VCO inside the PLL circuit, and is used to determine the signal output timing from the transmission device to another device. It is not used. That is, it is naturally provided for performing control switching in a PLL circuit that generates an output signal synchronized in phase with two types of clock signals.
It is not used for controlling the output signal of the PLL circuit. Further, the configuration of the pull-in state monitoring circuit disclosed in Japanese Patent Application Laid-Open No. H4-40117 is different from the configuration applied to the optical transmission communication device according to the present invention.

Japanese Patent Application Laid-Open No. 9-307435 discloses a phase comparison circuit for detecting a difference between input and output phases of a PLO. However, unlike the one applied to the optical transmission communication device according to the present invention, the phase comparison circuit detects whether the phase difference exceeds a predetermined value and outputs the phase shift amount. The purpose is.

[0008]

An optical transmission communication device according to the present invention comprises: a device clock selecting section for selecting any one of a plurality of external clock signals; and a phase of the clock signal selected by the device clock selecting section. A PLO for performing control and outputting as an internal clock signal, and a low-speed transmission signal interface unit for synchronizing and demultiplexing transmission signals using the internal clock signal;
A phase comparator is provided for determining whether or not the phase of the output signal of the LO is synchronized with the phase of the clock signal input to the PLO.

When the phase comparing section outputs a signal indicating that phase synchronization has been achieved, the optical transmission communication apparatus sets the output of the low-speed transmission signal interface section to a state in which it can be connected to another apparatus. The phase comparison unit is configured to divide the output signal of the PLO into a first signal.
D flip-flop, a second D flip-flop for dividing the frequency of the clock signal input to the PLO, and a first D flip-flop.
An exclusive OR circuit for outputting an exclusive OR of an output of the flip-flop and an output of the second D flip-flop;
A protection circuit which is set by the output of the exclusive OR circuit and latches a low level by the output signal of the PLO. The protection circuit is composed of a plurality of stages of D flip-flops.
The output signal of O is connected.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing main components of an optical transmission communication device according to the present invention. The device clock generator 10 shown in FIG. 1 includes, for example, a clock signal extracted from an optical transmission signal, a clock signal extracted from a bipolar transmission signal, a master clock signal externally provided to synchronize all transmission devices, and the like. Is entered. In the device clock generation unit 10, the device clock selection unit 1 determines to use one of the input clock signals as the in-device clock signal. Then, the determined clock signal is output.

In the device clock generator 10, the clock signal selected by the device clock selector 1 is supplied to the PLO 2 as an input signal. The PLO 2 controls the frequency and phase of the output signal so as to match the frequency and phase of the input signal, and outputs the output signal as a clock signal in the device. In the device clock generator 10,
The phase comparison unit 3 detects whether or not the synchronization of the internal clock signal is completed by introducing the input / output signal of the PLO 2.

The low-speed transmission signal interface section 20 mainly receives 1.544 Mbps from outside to 139.26.
Stuff processing of PDH low-speed transmission signals up to 4 Mbps, and externally receiving SDD of 51.84 Mbps or more
The demultiplex processing and the destuffing processing of the H high-speed transmission signal are performed using the internal clock signal. Device control unit 3
0 performs alarm monitoring, status change monitoring, command execution processing, and the like of the entire optical transmission communication device. Further, in this embodiment, the device control unit 30 also performs on / off control of the switching unit 40 that enables the output signal of the low-speed transmission signal interface unit 20 to be supplied to another device.

FIG. 2 is a circuit diagram showing a configuration of the phase comparator 3 used in this embodiment. The internal clock signal output from the PLO 2 is input to the clock input terminal of the D flip-flop 31. The clock signal (selected clock signal) selected by the device clock selection unit 1 is:
It is input to the clock input terminal of the D flip-flop 32. The D inputs of the D flip-flops 31 and 32 are connected to their respective inverted Q outputs. The Q outputs of the D flip-flops 31 and 32 are connected to an exclusive OR circuit (EXO).
R) 33.

The output of the EXOR 33 is input to a protection circuit for protecting a phase comparison result signal indicating that the phase lock by the PLO 2 has been completed. In this embodiment, the protection circuit includes three stages of D flip-flops 34, 35,
The output of the EXOR 33 is connected to the set terminal (low active) of each of the D flip-flops 34, 35, 36. First stage D flip-flop 34
Is always supplied with the ground level (low level), and the Q output of the first stage D flip-flop 34 is
The Q output of the middle-stage D flip-flop 35 is connected to the D input of the final-stage D flip-flop 36. Then, an internal clock signal is input to the clock input terminals of the D flip-flops 34, 35, 36.

Next, the operation will be described with reference to the timing charts of FIGS. When the PLO 2 completes the phase pull-in and is locked, the phase comparison unit 3
The phase comparison result signal is at a low level. When the device clock selection unit 1 selects another external input clock signal instead of one external input clock signal, the synchronization of the PLO 2 is lost. Then, the PLO 2 enters a new synchronization pull-in operation state. That is, for the selected clock signal, PL
The phase of the O2 output clock signal is shifted, and then the phase gradually matches. Also, when the clock signal is supplied to the PLO 2 for the first time after the operation of the optical transmission communication device starts, the PLO 2 enters the synchronization pull-in operation state.

As shown in FIG. 3, in the synchronization pull-in operation state, the output clock signal of the PLO2, that is, the clock signal in the device and the selected clock signal are out of phase.
The phases of the outputs of the D flip-flops 31 and 32 that divide the frequency of the input signal by １ ／ are also shifted. Therefore, EXO
R33 outputs a clock signal according to the deviation.
When entering the synchronization pull-in operation state, the D flip-flops 31 and 32 are simultaneously supplied with a reset pulse, and are initialized at that time.

As shown in FIG. 3, D flip-flops 34, 3 which latch a low level by a clock signal in the device.
A low level is given to the set terminals 5 and 36 at the rise of the internal clock signal. Therefore, the set state of each of the D flip-flops 34, 35, 36 is not released, and the Q output continuously appears at the high level. That is, in the synchronization pull-in operation state of the PLO2, the phase comparison result signal which is the Q output of the D flip-flop 36 indicates a high level.

When the phase pull-in of the PLO 2 is completed, as shown in FIG. 4, the phases of the internal clock signal and the selected clock signal match, the phases of the outputs of the D flip-flops 31 and 32 also match, and the output of the EXOR 33 Does not appear in the form of a clock-like signal, and is kept at a low level. Then, an inactive signal is continuously supplied to the set terminal of each of the D flip-flops 34, 35, 36.
The low level latched by the selected clock signal appears on the Q outputs of the flip-flops 34, 35, and 36. That is, when the phase pull-in of the PLO2 is completed, the phase comparison result signal indicates a low level.

The apparatus control section 30 receives the phase comparison result signal and supplies a stable internal clock signal when the phase comparison result signal changes from high level to low level after the selected clock is switched. You can know that has started. Therefore, at that time, the switching unit 40 can be set to the passing state so that the low-speed transmission output signal output from the low-speed transmission signal interface unit 20 is supplied to another device.

As described above, according to this embodiment,
In the optical transmission communication device, it is automatically recognized that the phase pull-in of the in-device clock signal by the PLO 2 has been completed, and a state in which the output signal of the low-speed transmission signal interface unit 20 can be automatically started to be supplied to another device. Moreover, as shown in FIG. 2, EXOR 33 corresponding to the phase shift
Is connected to the set terminals of D flip-flops 34, 35, and 36, and the output signal of PLO2 is connected to the clock input terminals of D flip-flops 34, 35, and 36.
Since the low level is latched by the output signal of LO2, the phase comparison result signal which can notify the device control unit 30 of the completion of the phase pull-in by changing from the high level to the low level with a simple configuration. Can be generated.

[0021]

According to the present invention, a PLO for controlling the phase of a clock signal selected by a device clock selector and outputting the same as a device internal clock signal, and synchronizing and multiplexing a transmission signal using the device internal clock signal. An optical transmission communication device having a low-speed transmission signal interface unit for performing separation
A phase comparator for determining whether or not the phase of the output signal of the LO and the clock signal input to the PLO is synchronized ;
The phase comparator outputs a signal indicating that phase synchronization has been achieved.
And the output of the low-speed transmission signal interface section to other devices.
It is configured to be able to connect to
Gives the signal processed by the transmission signal interface to another device
Automatically determine when it can be
There is an effect that the supply of a signal to another device can be started at an appropriate timing .

[0022]

The phase comparison unit includes a first D flip-flop for dividing the output signal of the PLO, a second D flip-flop for dividing the frequency of the clock signal input to the PLO, and a first D flip-flop. An exclusive OR circuit for outputting an exclusive OR of the output of the second D flip-flop and an output of the second D flip-flop;
In a case where a configuration including a protection circuit that latches a low level with an O output signal is used, it is possible to know whether or not the phase pull-in is completed with a simple configuration.

[Brief description of the drawings]

FIG. 1 is a block diagram showing main components of an optical transmission communication device.

FIG. 2 is a circuit diagram illustrating a configuration of a phase comparison unit.

FIG. 3 is a timing chart showing an example of a signal in a phase pull-in operation state in the phase comparison unit.

FIG. 4 is a timing chart showing an example of a signal after completion of phase pull-in in a phase comparison unit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Device clock selection part 2 PLO 3 Phase comparison part 10 Device clock generation part 20 Low-speed transmission signal interface part 30 Device control part 40 Switching part

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-8-204677 (JP, A) JP-A-56-117430 (JP, A) JP-A-58-164325 (JP, A) JP-A-9-204 205452 (JP, A) JP-A-10-13226 (JP, A) JP-A-60-253320 (JP, A) JP-A-3-273711 (JP, A) JP-A-5-22130 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H03L ⁷ /06-7/23 H04B 9/00

Claims (4)

(57) [Claims] A plurality of clock signals from the outside;
A device clock selecting unit for selecting any one of the device clock phases;
PLO that performs control and outputs it as an internal clock signal
When,From the PLO Transmission signal using internal clock signal
Low-speed transmission signal interface that synchronizes and demultiplexes
An optical transmission communication device comprising a source signal and a clock signal input to the PLO.
Phase comparison unit that determines whether phase synchronization with the signal has been achievedWhen, Stable based on the phase comparison result signal from the phase comparator
Determines whether the supply of the internal clock signal has started
And that the supply of the stable internal clock signal has started.
When you recognize that Of the low-speed transmission signal interface
Set the output so that it can be connected to other devicesDevice controller
ToPreparationWasAn optical transmission communication device characterized by the above-mentioned. 2. A includes a switching unit that permits supplying the output signal of the low-speed transmission signal interface unit in the other device, the device control section, the phase comparison result signal from the phase comparator is cheap
Indicates that the supply of the specified internal clock signal has started.
To the optical transmission communication apparatus according to claim 1, wherein for setting the switching unit to the output signal passing state. 3. A phase comparison unit comprising: a first D flip-flop for dividing an output signal of a PLO; a second D flip-flop for dividing a clock signal input to the PLO;
An exclusive-OR circuit for outputting an exclusive-OR of the output of the first D-flip-flop and the output of the second D-flip-flop; 3. The optical transmission communication device according to claim 1, further comprising a protection circuit that latches a low level with an output signal. 4. The optical transmission communication device according to claim 3, wherein the protection circuit comprises a plurality of stages of D flip-flops, and an output signal of the PLO is connected to a clock input terminal of each D flip-flop.