JP3221761B2 - Convolutional coding circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a convolutional coding circuit which is a kind of error correction codec used for data transmission in digital automobile telephones and portable telephones.

[0002]

2. Description of the Related Art First, constraint lengths K = 3 and R = 1/2 generated in the conventional convolutional coding circuit shown in FIG.
The convolutional coding and decoding method will be described with reference to the code C of FIG.

Depending on the states of the two shift registers F ₀ and F ₁ , the state S of the encoding circuit has four states: S ₀ = (0,0), S ₁ = (1,0), S ₂ = (0,
1), S ₃ = (1, 1)

[0004] A trellis diagram is a representation of a coding circuit initially in the state S ₀ , which represents a state in which each state changes every moment when an information signal is input. FIG. 4 shows a trellis diagram of the code C. Here, it is assumed that the input information signal sequence length is J−K + 1, and that K−1 zeros continue.

[0005] The branch-like portion of the trellis diagram is divided into two branches,
A series of branches is called a partial path. In the trellis diagram shown in FIG. 4, it is assumed that the dotted branch indicates that the input signal is 0, and the solid line indicates that the input signal is 1. Further, outputs a, b, c, and d of the encoding circuit are shown in the branch portion. Where a = (0,0), b = (0,1), c = (1,1), d
= (1,0), the left component represents C _i0 and the right component represents C _i1 .

The output is converted to, for example, π / 4 shift QPSK.
When transmission is performed using (four-phase modulation), transmission is performed with the phase changed so that the signal point arrangement shown in FIG. 5 is obtained. The distance between two signal points on this phase plane is the Euclidean distance. In this case, the (square) Euclidean distance between the abs is 2E. Here, E is the square of the signal amplitude.

In the case of the code C, there is one branch that transitions from a certain state to the next state.
May be plural as shown in FIG. A plurality of such branches that transition to the same state are called parallel branches.

The state S ₀ (t = t ₀ ) at time t = t ₀
t ₀₎ from t = state at _{t j S (t = t j} ) a series of branches that path to the. This path is a path for the code word of the convolutional code C. When it is necessary to avoid confusion with a partial path, it is referred to as a codeword path.

FIG. 7 shows a partial path in the trellis diagram of the symbol C. For convenience, a subset of codewords corresponding to this partial path is represented by C _s ¹ = (00 00 11) and C _s ² = (11 10
00). In Viterbi decoding, the path C _s ¹ and by comparing the likelihood of the path C _s ^2, for example, the path is more likelihood of C _s ¹ C _s ²
If it is not lower than the likelihood, C _s ² is rejected. Thus, all codewords path including the path C _s ² as a partial path will have been rejected from the candidate of the transmission codeword. C _s
A partial path that is not rejected as in ¹ is called a surviving path. Similar to the partial path that rejoins the parallel branch, the branch with low likelihood is rejected.

Referring to the trellis diagram of FIG. 4, it can be seen that each state has two partial paths having the same branch state as shown in FIG. In the steady state excluding the states at both ends of the codeword, always 2 at each time.
^It can be seen that there are ^K-1 surviving paths. Time t
_{After J-K + 2} , the number of surviving paths decreases by ず_つ , and at time t _j , there is only one surviving path. The surviving path is decoded as a transmission codeword.

[0011]

In such an error correction code circuit, the error correction capability increases as the Euclidean distance between the rejoining partial paths including the parallel branch increases. The minimum value of the Euclidean distance between the rejoining partial paths is referred to as the minimum Euclidean distance of the code word, and cannot be larger than the minimum value of the Euclidean distance between the parallel branches. Therefore, the Euclidean distance between the parallel branches is important, and it is an object of the present invention to increase the Euclidean distance.

[0012]

According to the present invention, in order to achieve the above object, a signal point corresponding to a parallel branch is expressed by:
Provided is a convolutional coding circuit that performs coding so as to be positioned diagonally to each other in a phase plane of π / 4 shift QPSK.

[0013]

Therefore, according to the present invention, it is possible to perform coding / decoding with higher error correction capability without lowering the coding rate.

[0014]

FIG. 1 shows the configuration of a convolutional encoding circuit according to an embodiment of the present invention, wherein 1 is a shift register circuit, 2 is a logical operation circuit, and 3 is an encoding circuit. FIG. 2 (a),
(B) and (c) are specific examples in one embodiment of the present invention, and F _{0 to} F ₃ are shift registers.

These encoding circuits shown in FIG.₀,
I₁, I_Two), (I₀', I₁', I_Two')
Outputs each (C₀, C₁, C_Two, C_Three),
(C₀', C ₁', C_Two', C_Three'). Internal shift register
TA F₀~ F_ThreeI ≠ I₀', I = I₁', I = I_Two', Then (C₀, C₁) And (C₀', C₁'), (C
_Two, C_Three) And (C_Two', C _Three') Are respectively shown in FIG.
Located diagonally.

Taking the encoding circuit of FIG. 2A as an example,
State S₀(F₀= F₁= F_Two= 0) and (I₀, I₁, I
_Two) = (0,1,0) or (I₀', I₁', I_Two') =
When (1, 1, 0) is input, both state S_Two(F
₀= F_Two= 0, F₁= 1). At this time, F₀= F₁= F_Two= 0, I₀= 0, I₀'= 1, I₁
= I₁'= 1, I_Two= I _Two'= 0. (I₀, I₁, I_TwoThe output for () is (C₀, C₁,
C_Two, C_Three) = (0,1,1,0) (I₀', I₁', I_Two') Is (C₀', C₁',
C_Two', C_Three') = (1,0,0,1). In FIG. 5, (C₀, C₁) = (0,1) = b and (C₀', C₁') =
(1,0) = d, (C_Two, C_Three) = (1,0) = d
(C_Two', C_Three') = (0,1) = b
Located at the corner.

As a result, in the trellis diagram of FIG. 6, the (square) Euclidean distance between two parallel branches, db and bd, which transits from one state S ₀ to the same state S ₂ becomes the first signal point: d The (squared) Euclidean distance between b and d is 4E, and the (squared) Euclidean distance between the second signal points b and d is 4E, which is 8E, which is the maximum distance between branches.

Therefore, a code having a large minimum Euclidean distance can be realized by coding such that the signal point arrangements are located diagonally to each other.

[0019]

As is apparent from the above embodiment, the present invention can realize a code having a large minimum Euclidean distance between codewords.
Communication with higher error correction capability can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a convolutional encoding circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a specific configuration according to an embodiment of the present invention.

FIG. 3 is a block diagram showing an example of a convolutional coding circuit in a conventional example.

FIG. 4 is a trellis diagram showing an example of an encoder state transition in a conventional example.

FIG. 5 is a schematic diagram showing an example of a signal point arrangement in π / 4 shift QPSK;

FIG. 6 is a partial trellis diagram showing an example of a parallel branch in a conventional example.

FIG. 7 is a partial trellis diagram showing an example of a partial path that rejoins in a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Shift register circuit 2 Logical operation circuit 3 Encoding circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H04L 27/00-27/38 H03M 13/12-3/23

Claims (1)

(57) [Claims] 1. An input 3 bits used for trellis coded modulation
To (I₀, I₁, I_Two), Output 4 bits (C₀, C₁,
C_Two, C_Three), The output of
Four bits are used for two signals using π / 4 shift QPSK modulation.
No. (C₀, C ₁), (C_Two, C_Three)
When transmitting, one of the input bits (I₀Toss
Only), and the other input bits I₁, I_TwoAnd
And the values in the shift register inside the encoder are equal.
In such a case, two sets of output
(C₀, C₁, C_Two, C_Three) And (C₀', C₁',
C_Two', C _Three') Two π / 4 shifted QPSK signals
No. set (C₀, C₁) And (C₀', C₁') And (C
_Two, C_Three) And (C_Two', C_Three') On the topological plane
Tatami that satisfies the layout conditions that are located diagonally to each other
Convolutional coding circuit.