JP3213485B2 - Current amplification factor compensation circuit and charge / discharge circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current amplification factor compensating circuit and a charging / discharging circuit using the same, and more particularly, for example, an IC.
TECHNICAL FIELD The present invention relates to a current amplification factor compensating circuit used as a base current compensating circuit of a conversion circuit and a charge / discharge circuit using the same.

[0002]

2. Description of the Related Art FIG. 3 shows a clamp circuit 1 formed in an IC. The capacity built into the IC is several tens of pF as is well known.
It is about a degree and cannot be enlarged. Therefore, in a circuit requiring a large time constant, the charge / discharge current of the capacitor must be extremely small. For this reason, the clamp circuit 1 of FIG. 3 charges and discharges the capacitor C1 with the base current of the transistor T1 and the collector current of the transistor T7.

[0005] The clamp circuit 1 shown in FIG. 3 will be briefly described. Note that the current amplification factor of each of the PNP transistor and the NPN transistor shown in FIGS. 1 to 4 is β.
The signal Vin from the signal source passes through the capacitor C1, the transistors T1, T2 and T3 and is input to the base of the differential pair 2 on the transistor T4 side. The reference voltage V _REF is applied to the base of the differential pair 2 on the transistor T5 side by the voltage source DC1. Since the collector current I _C5 of the transistor T5 is equal to the emitter current I _E6 of the transistor T6, the base current I _B6 of the transistor T6 is represented by _Expression 1.

[0004]

I _B6 = I _C5 / β The base current I _B6 is equal to the collector current I _C7 of the transistor T7 by the mirror circuit 3 composed of the transistors T7 and T8, and therefore, the collector current I _C7, that is, the base current It charges the capacitor C1 by I _B6.

On the other hand, the base current I _B1 of the transistor T1 is the discharge current, the collector current I of the transistor T9
_{Since C9} and the emitter current I _{E1 of the} transistor T1 are common, they are expressed by Equation 2.

[0006]

I _B1 = I _C9 / β The base current I _B2 of the transistor T2 is
Since the buffer circuit 4 composed of 2 and T3 has a double Darlington connection, it is negligible because it is extremely smaller than the base currents I _B1 and I _B6 .

The collector current I of the transistor T9_C9And to
Collector current I of transistor T10 _C10To 1:
If it is set to 2 in advance and the relation of Expression 3 is obtained,

[0008]

If the potential of the signal Vin is higher than the reference voltage V _{REF at} both ends of the differential pair I _C9 = (２) · I _C10 , the collector current I _C5 of the transistor T5 becomes become.

[0009]

I _C5 <(1/2) · I _{C10 From Equations} 1 to 4, Equation 5 is obtained.

[0010]

## _EQU5 ## I _B6 <I _B1 The discharge current of the capacitor C1 increases, and the potential of the signal Vin decreases. Conversely, at both ends of the differential pair 2, the reference voltage V
_If the potential of the signal Vin is lower than _REF , it becomes as shown in Equation 6.

[0011]

I _B6 > I _B1 The charging current of the capacitor C1 increases, and the potential of the signal Vin increases. Therefore, the differential pair 2 finally balances, and the relationship of Expression 7 holds,

[0012]

I _B6 = I _B1 The charge / discharge current (I _C7 and I _B1 ) of the capacitor C1 becomes equal, and the signal Vin is clamped to the reference voltage V _REF . As described above, in the clamp circuit 1 shown in FIG. 3, the charge / discharge current of the capacitor C1 is reduced by using β as shown in Expressions 1 and 2. However, although the relative accuracy of the value of β of the transistor in the IC is maintained, the absolute accuracy varies greatly by about half to twice. That is, the value of β of the transistor takes substantially the same value in the same IC, but the value of β itself varies. Therefore, in order to keep the time constant of the clamp circuit 1 constant, it is necessary to compensate for the variation of the charge and discharge current of the capacitor C1 due to β.

Conventionally, as a compensation circuit for β, there is a current amplification factor compensation circuit 5 as shown in FIG. In FIG. 4, the collector current of the transistor T11, which becomes a constant current, is I _C11 , the mirror ratio of the mirror circuit 6 composed of the transistors T12 and T13 is n ₁ : 1, and the mirror circuit composed of the transistors T14 and T15 7 mirror ratio of n _2: 1, the transistors T16 and T17 Metropolitan n ₃ the mirror ratio of the formed mirror circuit 8: 1 and when,
The collector current I _C17 of the transistor T17 is represented by _Expression 8.

[0014]

## _EQU8 ## I _C17 = I _C11 / (n ₁ · n ₂ · n ₃ ) That is, the collector current I _C11 is reduced to the collector current I _C17 by the mirror circuits 6 to 8. Since the collector current I _C17 becomes the base current I _B18 of the transistor T18, the collector current I _C18 of the transistor T18 becomes as shown in _Expression 9.

[0015]

I _C18 = (I _C11 · β) / (n ₁ · n ₂ · n ₃ ) This collector current I _C18 is given to the base current drive circuit of each section via the transistor T19 and the terminal 9b (FIG. 3). Now, the terminal 9a, the transistors T9 and T10
To the clamp circuit 1).

Here, since the transistors T19 and T9 form a mirror circuit, the collector currents I _C18 and I _C9 are equal. In a balanced state, since the collector currents I _C5 , I _C9 and I _C18 are equal, the capacitor C1
The currents I _B6 (= I _C7 ) and I _{B1 that} are the charge / discharge currents of
As can be seen from Equations 1, 2, and 9, the dependence due to β is eliminated. That is, if I _C5 = I _C9 = I _C18 = I, _Equation 1 is I _B6 = I / β, Equation 2 is I _B1 = I / β, Equation 9
Is I = (I _C11 · β) / (n ₁ · n ₂ · n ₃ ).
By substituting equation 9 into equation 1, I _B6 = I _C11 / (n ₁ · n ₂
N ₃ ), and substituting equation 9 into equation 2 gives I _B1 = I
_C11 / (n ₁ · n ₂ · n ₃ ). Therefore, the currents I _B6 (= I _C7 ) and I _B1 are not dependent on β.

[0017]

However, in the conventional current amplification factor compensating circuit 5 shown in FIG. 4, a small current is generated by connecting several stages of n: 1 mirror circuits. Therefore,
The mirror ratio varies due to the early voltage of each transistor constituting the mirror circuits 6 to 8 and the variation of β in the same IC. When this variation overlaps by several stages, the variation of the minute current cannot be ignored, and the effect decreases even though β is compensated. That is, the compensation current from the current amplification factor compensation circuit 5 varies, and the charge / discharge current of the charge / discharge circuit such as the clamp circuit 1 shown in FIG. 3 cannot be stabilized.

SUMMARY OF THE INVENTION Therefore, a main object of the present invention is to provide a current amplification factor compensating circuit and a charging / discharging circuit using the same, which can stabilize a charging / discharging current.

[0019]

A first invention provides a differential pair (1) including a first transistor (T21) and a second transistor (T22).
2), constant voltage source (DC2), the first that receives the voltage (V2) of the constant voltage source
A series circuit of a resistor (R1) and a constant current source transistor (T24),
A first input transistor (T26) for providing an input from the series connection point of the series circuit to the first transistor, a second resistor (R2) receiving a voltage from a constant voltage source in parallel with the first resistor, and a voltage drop of the second resistor. A second input transistor (T23) for providing an input to the second transistor, an output transistor (T29) for extracting an output of the differential pair from the first transistor, and a current mirror circuit (T32, T28, T27) for the output transistor. A negative feedback circuit (18) that feeds back the output of the differential pair to the first input transistor and the second input transistor in accordance with the current of the current mirror circuit; A current amplification factor compensation circuit for outputting a compensation current obtained by multiplying a minute current determined based on a ratio between the resistance and the second resistance by β by a second input transistor. A second invention provides a differential pair (242) including a first transistor (T39) and a second transistor (T40), a constant voltage source, and a first resistor (R3) receiving a voltage (V3) of a constant voltage source. A first input transistor for providing an input to the first transistor from a series circuit of the current source transistor (T37) and a series connection point of the series circuit
(T35), a second resistor (R4) receiving a voltage from a constant voltage source in parallel with the first resistor, a second input transistor (T36) for providing an input to the second transistor according to a voltage drop of the second resistor, An output transistor (T38) for extracting the output of the moving pair from the second transistor, a negative feedback circuit (22) for feeding back the output of the differential pair to the second input transistor, and a current mirror connected between the output transistor and a reference potential The current amplification factor compensating circuit includes a circuit (26) and a current amplification transistor (T34) that multiplies the output of the current mirror circuit by β and outputs the result as a compensation current. The charge / discharge circuit of the present invention includes a capacitor charged / discharged by the compensation current.

[0020]

The input set based on the first resistor and the constant current source is given to the first transistor of the differential pair by the first input transistor . Similarly, an input set based on the second resistor is provided to the second transistor of the differential pair by the second input transistor . Then, the output from the differential pair is negatively fed back to the differential pair by a negative feedback circuit.

In the case of the first invention in which the current feedback transistor is included in the negative feedback circuit, a minute current obtained by multiplying the current value of the constant current source by (first resistance / second resistance) is used for current amplification. the base current of the transistor (second input transistors), to obtain a collector current that base current by β multiplied by the transistor, and outputs the collector current as a compensation current through the current mirror circuit.

On the other hand, in the case of the second invention in which the current amplifying transistor is not in the negative feedback circuit, a very small current obtained by multiplying the current value of the constant current source by (first resistance / second resistance) is output. The current is output from the transistor and supplied to the current amplification transistor as a base current through another current mirror circuit. Then, the current amplifying transistor outputs a collector current obtained by multiplying the output from the current mirror circuit by β as a compensation current.

As described above, the compensation current from the current amplification factor compensating circuit is obtained by adding constant current × (first resistance / second resistance) to β
(Compensation current = constant current × (first resistance / second resistance) × β). This current amplification factor compensating circuit is used for a charging / discharging circuit that is charged / discharged based on a base current of a transistor. In this charge / discharge circuit, the base current (charge / discharge current) of the transistor is 1 / β times that of the collector (emitter) current of the transistor (base current = collector (emitter) current × 1 / β). Therefore, if the compensation current from the current amplification factor compensation circuit is supplied as the collector (emitter) current of the transistor of the charge / discharge circuit, the compensation current “β” and the base current of the transistor of the charge / discharge circuit “1 / β” Are offset. That is, base current = constant current × (first resistance / second resistance). As a result, the charge / discharge current of the charge / discharge circuit is not affected by β. Further, (first resistance / second resistance) has a stable value. Therefore,
The charge / discharge current has a stable value.

[0024]

According to the present invention, when this current amplification factor compensating circuit is used in a charging / discharging circuit for charging / discharging based on the base current of a transistor, β is canceled, so that charging / discharging of the charging / discharging circuit is performed. The current is not affected by β and a small current is obtained without using a mirror circuit, so that a stable charge / discharge current can be obtained.

The above objects, other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the drawings.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The current amplification factor compensating circuits 10 and 10 'of this embodiment include, for example, a clamp circuit, an APC circuit, and an ACC.
It is used in a charge / discharge circuit for charging / discharging a capacitor using a base current of a transistor, such as a circuit and a killer circuit. In this embodiment, a case will be described in which the current amplification factor compensating circuits 10 and 10 'are used for the clamp circuit of these charge / discharge circuits. However, it is needless to say that the present invention can be similarly applied to other charge / discharge circuits. Nor.

As the clamp circuit, the clamp circuit 1 shown in FIG. 3 described in the prior art is assumed. However, since the clamp circuit 1 has already been described, a duplicate description thereof will be omitted, and the current amplification factor compensation circuit 10 and 10 'will be described. First, in the current amplification factor compensation circuit 10 shown in FIG.
A minute current (current flowing through the resistor R2) is generated by the resistors R1 and R2, and β compensation is performed by the transistor T23.

The transistors T24 and T25 each constitute a constant current source, and each of the collector currents I _C24
And I _C25 . Assuming that the voltage of the DC power supply DC2 is V2, the base potential V _B26 of the transistor T26 is expressed by _Expression 10 by the collector current I _C24 , the resistor R1, and the base current I _{B26 of the} transistor T26.

[0029]

V _B26 = V2-R1 (I _C24 + I _B26 ) On the other hand, the base potential V _B23 of the transistor T23 is expressed by the following _equation 11 by the base current I _B23 of the transistor T23 and the resistance R2.

[0030]

Equation 11] for _{V B23 = V2-I B23 ·} R2 each collector current of the transistor T27 and T28 I _C27 and I _{C2 8} are equal, the base potential V
Potential difference between _B26 and V _B23 is transmitted to the transistors T21 and T22 of the differential pair 12.

Base potential V_B26And V_B23And the potential difference Δ
V (= V_B26-V_B23), When ΔV> 0,
The base current of transistor T29 decreases. That is, Δ
When V> 0, the collector current of the transistor T22
I_C22And the collector current of transistor T21
I_C21Should increase, but the collector current I_C22But
Since it is reduced, the transistors T30 and T31
The collector current I_C21Also
Will decrease. Therefore, I_C21Must increase
The transistor T29
Base current I _B29Can give enough current to
Therefore, the base current I_B29Decreases. Tran
Base current I of transistor T29_B29Due to a decrease in
Collector current I of transistor T29_C29Also decrease,
In the same manner, each of the transistors T27 and T28
Current I_C27And I_C28Also decreases. Therefore,
Base current I of transistor T23_B23Is decreasing
And the base potential V_B23Rises based on Equation 11
And moves in a direction to reduce the potential difference ΔV.

On the other hand, when ΔV <0, the transistor T
Since the base current I _B29 29 increases, so does the base current I _B23 resulting transistor T23. Therefore, the base potential V _B23 falls based on the _equation 11, and moves in a direction to reduce the base potential difference ΔV.
That is, in the current amplification factor compensation circuit 10, the mirror circuit 1 including the transistors T29, T28 and T32
6, and the negative feedback circuit 18 including the transistor T23.
Is formed, the respective base potentials V _B21 and V _{B22 of} the transistors T21 and T22 become equal, and the respective base potentials V _B26 and V _{B23 of the} transistors T26 and T23 become equal. Therefore, Expression 12 is established from Expression 10 and Expression 11.

[0033]

_R1１２ (I _C24 + I _B26 ) = R ・ I _B23 The collector current I _C29 of the transistor T29 is _converted by the mirror circuit 16 into the collector current I _C of the transistor T23.
_Since it is equal to _C23 , _Expression 13 is established.

[0034]

Since I _B23 · β = I _C23 = I _C29 , when _Expressions 12 and 13 are modified, Expression 14 is obtained.

[0035]

## EQU14 ## I_C29= (R1 / R2) · (I_C24+ I_B26) · Β From number 14, I_C29Is β compensation, that is, current amplification factor compensation.
It can be seen that the current becomes a compensated current. Collector power
Style I_C29Current for generating the current (flowing through the resistor R2)
Current), that is, (R1 / R2) · (I_C24+ I_B26)
Is the constant current I_{C2 Four}And the value of (R1 / R2)
Therefore, the accuracy is good and the variation is greatly reduced. Sand
C, I_C24Is a constant current, and the resistors R1 and R2 are
(R1 / R2) is a stable value.
This is because that. Note that the base current I _B26Is extremely small
So you can ignore it here. In addition, n: 1
Since there is no error circuit, the factors of variation are reduced. Ma
In FIG. 1, the transistor T33 is a transistor
This is for preventing T29 from being saturated.

Then, such a current amplification factor compensation circuit 1
When the terminal 20 is connected to the terminal 9a of the clamp circuit 1 of FIG. 3 and the current amplification factor compensating circuit 10 is applied to the clamp circuit 1, the transistors T32, T9 and T10 form a mirror circuit, so that the collector current I _C29 is equal to the respective collector currents I _C9 and I _C10 of the transistors T9 and T10 of the clamp circuit 1. Here, in the equilibrium state, the base currents I _B1 and I _C7, which are the charging and discharging currents of the capacitor C1, satisfy the relationship of Expression 15 from _Expression 14 from _Expression 14.

[0037]

(Equation 15)

From Equation 15, it can be seen that the base current I _B1 and the collector current I _{C7, which} are the charging / discharging current of the capacitor C1, are stable without depending on the current amplification factor β. Next, FIG. 2 shows a current amplification factor compensation circuit 10 'of another embodiment. In the current amplification factor compensating circuit 10 ', a small current (collector current I _C38 ) is generated by the ratio of the resistors R3 and R4 in the negative feedback circuit 22, and β
A compensated current (compensation current) is created.

The base potential V of the transistor T35_B35When
Base potential V of transistor T36 _B36Is a transi
The collector current of each of the transistors T37 and T38 is set to I
_C37And I_C38Then, expressed by Expression 16 and Expression 17
It is.

[0040]

## _EQU16 ## V _B35 = V3 + R3 · I _C37

[0041]

V _B36 = V3 + R4 · I _{C38 The} differential pair 24 is formed by the transistors T39 and T40, and a negative feedback loop is formed by the transistors T36 and T38. The negative feedback circuit 22 includes transistors T36 and T38, a resistor R3,
R4.

[0042]

V _B39 = V _B40 V _B35 = V _{B36 Equations} 16 to 18 are transformed to _Equation 19.

[0043]

Because the [number 19] _{I C38 = I C37 · (R3} / R4) the collector current I _C37 is a constant current, as can be seen from the number 19, the transistor T38 of the collector current I _C38
Is determined by the ratio of the resistors R3 and R4. Here, the transistors T41 and T42 are connected to the mirror circuit 26.
, The collector current I _C38 is equal to the base current I _B34 of the transistor T34. Accordingly, minute current as a base current I _B34 of the transistor T34 is found to be determined by the ratio of resistors R3 and R4. Therefore, the collector current I _C34 of the transistor T34 is expressed by _Expression 20, and the collector current I _C34
C34 is output via the transistor T43.

[0044]

Equation 20 can be seen from _{I C34 = I C37 · (R3} / R4) · β number 20, the collector current I _C37 is and resistance ratio constant current (R3 / R4) is a stable value, the collector The current I _C34 is determined by β.

The terminal 28 of the current amplification factor compensating circuit 10 'constructed as described above is connected to the terminal 9a of the clamp circuit 1 shown in FIG. Is applied to the clamp circuit 1, the capacitor C
The base current I _B1 and the collector current I _C7, which are the charge / discharge currents of 1, satisfy the relationship of Formula 21.

[0046]

(Equation 21)

From Equation 21, it can be seen that the charge / discharge current of the capacitor C1 is stabilized without being affected by the current amplification factor β. According to each of the above-described embodiments, in order to suppress the variation in the charging / discharging current, a minute current is generated by a relatively accurate resistance ratio in an IC instead of generating a minute current by a mirror configuration as in the related art. In addition, since the compensation current is obtained by the current compensation transistor, it is possible to minimize the variation in the charge / discharge current. That is, the charge / discharge current of the charge / discharge circuit for charging / discharging the capacitor using the base current of the transistor can be stabilized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

FIG. 2 is a circuit diagram showing another embodiment of the present invention.

FIG. 3 is a circuit diagram illustrating an example of a clamp circuit.

FIG. 4 is a circuit diagram showing an example of a conventional current amplification factor compensation circuit.

[Explanation of symbols]

 10, 10 '... current amplification factor compensation circuit 1 ... clamp circuit 2, 12, 24 ... differential pair 3, 14, 16, 26 ... mirror circuit 18, 22 ... feedback amplifier circuit R1-R4 ... resistance T1-T43 ... transistor

Claims (3)

(57) [Claims] 1. A differential pair (12) including a first transistor (T21) and a second transistor (T22), a constant voltage source (DC2), and a first resistor receiving a voltage (V2) of the constant voltage source. R1) and a constant current source transistor (T24), a first input transistor (T26) for providing an input to the first transistor from a series connection point of the series circuit, and the constant voltage source in parallel with the first resistor. A second resistor (R2) for receiving a voltage from the second transistor, a second input transistor (T23) for providing an input to the second transistor in accordance with a voltage drop of the second resistor, and an output of the differential pair from the first transistor. An output transistor (T29) to be taken out, and a current mirror circuit (T32, T28, T27) for the output transistor, wherein the output of the differential pair is output to the first transistor according to the current of the current mirror circuit.
A negative feedback circuit (18) for feeding back to an input transistor and the second input transistor, wherein the current mirror circuit provides a negative feedback circuit based on a current value of the constant current source transistor and a ratio between the first resistance and the second resistance. A current amplification factor compensating circuit for outputting a compensation current obtained by multiplying the determined small current by β by the second input transistor; 2. A differential pair (242) including a first transistor (T39) and a second transistor (T40); a constant voltage source; a first resistor (R3) receiving a voltage (V3) of the constant voltage source; A series circuit with a constant current source transistor (T37); a first input transistor (T35) for providing an input to the first transistor from a series connection point of the series circuit; a voltage from the constant voltage source in parallel with the first resistor A second resistor (R4) for receiving an input signal, a second input transistor (T36) for providing an input to the second transistor in accordance with a voltage drop of the second resistor, and an output transistor for extracting an output of the differential pair from the second transistor. (T38), a negative feedback circuit (22) for feeding back the output of the differential pair to the second input transistor, a current mirror circuit (26) connected between the output transistor and a reference potential, and the current mirror The output of the circuit is multiplied by β and output as compensation current. Current amplification transistor that
A current amplification factor compensating circuit comprising (T34). 3. A charge / discharge circuit comprising a capacitor charged / discharged by the compensation current from the current amplification factor compensation circuit according to claim 1.