JP3200021B2 - Output circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an output circuit device suitable for driving a low-impedance load such as a laser diode with a high-speed current.

[0002]

2. Description of the Related Art A circuit for driving a laser diode for high-speed optical communication of the 10 Gbps class is a transistor in an output stage for converting a high-speed signal having a short rise and fall time into a large current output and supplying the large current output to the laser diode. Large size is required. Normally, the output stage forms a differential circuit with a pair of transistors for speeding up,
This is a so-called open collector type in which the collector side of the transistor is connected to a laser diode as a load. The differential circuit at the output stage is driven by receiving a signal from the differential circuit at the preceding stage via a buffer circuit.

A differential transistor pair forming an output stage differential circuit is switched by a fluctuation of a base potential of several tens mV according to an input signal. On the other hand, in order to secure a noise margin, the circuit has an internal signal amplitude of several hundred mV.
It is designed to be. Therefore, at the time of high-speed switching, the fluctuation of the base potential gives a potential fluctuation of several hundred mV to the common emitter of the differential transistor pair in the output stage differential circuit. This potential variation acts on the parasitic capacitance of the transistor of the large-sized output stage differential circuit, causing a transient current and causing unstable operation.

[0004] Further, the potential fluctuation of the common emitter of the differential transistor pair is fed back to the base. However, since the output impedance of the circuit at the preceding stage from the base is a finite value,
The potential fluctuation returned to the base is amplified again by the differential transistor pair. This phenomenon is an oscillation phenomenon that occurs in the differential circuit,
That is, this is a ringing phenomenon, which degrades the output current waveform.

In order to cope with this ringing phenomenon, conventionally, the waveform of a signal input to the base of the differential transistor pair of the output stage differential circuit is blunted by an integrating circuit or the like, and the rise and fall times are lengthened. A method of preventing ringing from occurring or reducing the output impedance of a circuit preceding the output stage differential circuit as much as possible has been employed to reduce the ringing phenomenon.

However, the former method inevitably impairs the high-speed operation, and impairs the original function of the output circuit device that generates a current output in response to the input of a high-speed signal. The latter method increases the current consumption of the circuit, causing problems such as an increase in power consumption and an increase in heat generation.

[0007]

As described above, in an output circuit device which drives a load such as a laser diode with a current at high speed, a transistor in an output stage generates a transient current due to the intrinsic characteristics of the transistor and generates ringing. There is a problem that an unstable state such as a phenomenon occurs. In order to avoid this, a method of dulling the waveform of a signal input to the base of the transistor in the output stage using an integrating circuit or the like has a problem that high-speed performance is impaired. The method of reducing the power consumption has a problem that power consumption increases and heat generation increases.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an output circuit device capable of driving a low impedance load such as a laser diode stably without impairing high-speed performance and without increasing power consumption.

[0009]

In order to solve the above-mentioned problems, the present invention relates to an output circuit device using a transistor having a control electrode as an input terminal and a first main electrode as an output terminal in an output stage. When the control electrode from the first
Driving the transistor so that the voltages seen at the main electrode and the second main electrode respectively have the same polarity, preferably further, the voltage between the first main electrode and the second main electrode is near the saturation voltage of the transistor. It is characterized by having means for performing.

Further, the present invention is characterized in that such an output circuit device has adjusting means for adjusting the potential of at least one of the control electrode and the first main electrode of the transistor.

As the transistor at the output stage in the present invention, a transistor having a different junction potential difference between the control electrode and the first main electrode and a different junction potential difference between the control electrode and the second main electrode,
For example, it is desirable to use a heterojunction bipolar transistor (HBT).

The present invention further provides an output stage differential circuit having a second main electrode connected in common to form a differential transistor pair, and a current source connected to the common second main electrode of the differential transistor pair. And means for driving the differential transistor such that the voltages of the first main electrode and the second main electrode viewed from the control electrode of the on-side transistor of the differential transistor pair have the same polarity. And

The transistor used in this output circuit device may be either a bipolar transistor or a field effect transistor (FET). In the case of a bipolar transistor, the base is a control electrode, the collector is a first main electrode, and the emitter is a first main electrode. FET corresponds to two main electrodes respectively
In this case, the gate corresponds to the control electrode, the drain corresponds to the first main electrode, and the source corresponds to the second main electrode.

The operation of the output circuit device according to the present invention will be described by taking as an example the case where a bipolar transistor is used as the transistor in the output stage. When the transistor in the output stage is on, the base-emitter voltage Vbe and the base-collector voltage Vbc are the same. It is driven to have polarity.
For example, if the transistor in the output stage is an NPN transistor, this transistor is Vb in a conventional output circuit device.
While e is driven under the condition of positive polarity and Vbc is driven under the condition of negative polarity, in the present invention, Vbe and Vbc are driven so that both have a positive voltage.

At this time, the transistor is brought into a saturated state, that is, the collector-emitter voltage Vce
It is desirable that Vbe and Vbc are set so that the voltage is close to the saturation voltage, and the transistor is brought into a saturated state. In this state, an input signal to the base may escape to the collector side, so that the amplification factor of the transistor deteriorates.

Here, like a heterojunction bipolar transistor (HBT), a base-collector current Ibc
In a transistor in which the term which does not contribute to the amplification of the collector current Ic is dominant, Ibc is only a component flowing from the base to the emitter through the collector, and does not appear in the output as the collector current Ic. In this case, the change in the emitter potential accompanying the switching of the transistor in the output stage is fed back to the base as in the conventional output circuit device, but the change in the collector current Ic due to the change in the base potential is caused by the base-emitter voltage. A term that is exponentially proportional to the variation of Vbe;
It is approximated by the sum with the base-collector current Ibc.

When ringing occurs, the solution of the base-emitter voltage Vbe has an oscillating term, and it is impossible in principle to eliminate this term. Therefore, the collector current Ic tends to follow the oscillatory fluctuation of Vbe in an oscillatory manner.
When the transistor is driven such that both e and Vbc have a positive voltage, the values of Ic, Vbe, and Vbc are appropriately adjusted to compensate for the change in collector current Ic due to the change in base-collector current Ibc. It is possible,
Fluctuations in the output current waveform due to ringing are reduced or prevented.

In this case, if the transistor is further brought into a saturation state when it is turned on, the magnitude of the fluctuation of Ibc is reduced by Ic
Can be large enough to offset fluctuations in
It will be more effective.

As described above, in the output circuit device of the present invention, the stability at the time of high-speed operation can be increased, so that oscillation phenomena such as ringing are suppressed, and a high-speed output current waveform having a short rise and fall time is obtained. It is possible to output.

[0020]

Embodiments of the present invention will be described below with reference to the drawings. In the following embodiments, a case will be described in which an NPN-type bipolar transistor is used as a transistor. However, a PNP-type bipolar transistor may be used, and an N-channel or P-channel FE may be used.
T may be used.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
FIG. 4 is a circuit diagram of an output circuit device according to the embodiment. This output circuit device is roughly divided into an output stage differential circuit 1, a preceding stage differential circuit 2, and a buffer circuit 3 inserted between the output stage differential circuit 1 and the preceding stage differential circuit 2.

The output stage differential circuit 1 includes a differential transistor pair composed of transistors Q1 and Q2 whose emitters are commonly connected, a common emitter of the transistors Q1 and Q2, and a low potential side (in this example, a negative side) of the circuit power supply V1. Is connected to the constant current source I1. Transistor Q
1 and Q2 have a pair of output terminals OUT1 and OUT2.
2, the output terminal OUT1 is directly connected to the high potential side (ground side in this example) of the circuit power supply V1 via the terminating load resistor R4, and the output terminal OUT2 is the terminating load resistor R5 and a load. It is connected to the high potential side of the circuit power supply V1 via a laser diode LD. As the transistors Q1 and Q2, for example, a heterojunction bipolar transistor (HBT) is used.

The pre-stage differential circuit 2 includes a differential transistor pair including transistors Q7 and Q8 whose emitters are commonly connected, a constant current source I6 connected to a common emitter of the transistors Q7 and Q8, and a transistor Q7 and Q8. Load resistors R1, R2 each having one end connected to the collector
And a level shift resistor R3 connected between the other ends of the load resistors R1 and R2 and the ground side of the circuit power supply V1, and a differential input signal input to a pair of input terminals IN1 and IN2. Is amplified and supplied to the buffer circuit 3. The differential input signal is, for example, several Gbps to 10 Gb.
It consists of a high-speed pulse train on the order of ps.

The level shift resistor R3 is provided for shifting the potential of the load resistors R1 and R2 on the circuit power supply V1 side (ground side in this example) in the negative direction. Transistor Q of output stage differential circuit 1
It has a function of shifting the base potentials of Q1 and Q2 in the negative direction.

The buffer circuit 3 is a circuit for reducing the signal level and the output impedance of the output signal of the preceding-stage differential circuit 2 by a predetermined amount and supplying the output signal to the output-stage differential circuit 1, and includes a transistor and a constant current source as its emitter load. And a plurality of emitter followers composed of That is, the output from the collector of the transistor Q7 of the preceding-stage differential circuit is supplied to the transistor Q1 of the output-stage differential circuit 1 via the two-stage emitter follower including the transistor Q5 and the constant current source I5 and the transistor Q3 and the constant current source I3. Supplied to the base. Also, the transistor Q8 of the preceding-stage differential circuit
Output from the output stage differential circuit 1 via a two-stage emitter follower comprising a transistor Q6 and a constant current source I6 and a transistor Q4 and a constant current source I4.
Of the transistor Q2.

Next, the operation of the output circuit device of this embodiment will be described. Transistors Q1, Q of an output stage differential circuit when a differential input signal is input to input terminals IN1, IN2
The potential of the signal input to the base of the second-stage differential circuit 2
, And the voltage drop at the emitter follower of the buffer circuit 3.

For example, under the condition that the circuit power supply V1 is 0 / -7V (0V on the high potential side and -7V on the low potential side), the level shift resistor R when the transistors Q7 and Q8 are on respectively.
3 is 1V, and the load resistance R of the pre-stage differential circuit 2 is
1, the signal amplitude generated at both ends of R2 is 0.5 V, and the potential drop per emitter follower stage is 1.3 V, respectively.
Assuming that the voltage is V, the high level of the signal input to the bases of the transistors Q1 and Q2 (the level when Q1 and Q2 are on) is-(1 + 0 + 1.3 + 1.3) =-3.6.
V, the low level (the level when Q1 and Q2 are off) are −
(1 + 0.5 + 1.3 + 1.3) =-4.1V.

On the other hand, the collector potentials of the transistors Q1 and Q2 are determined by signal amplitudes generated at both ends of the terminating load resistors R4 and R5, and the saturation voltage of Q1 and Q2 (collector-base voltage at the time of saturation) is set to 0.5V. Then, the base-emitter voltage when Q1 and Q2 are turned on is set to 1.3 V, and the collector potential is at a low level (the level when Q1 and Q2 are turned on).
Is less than or equal to -3.6-1.3 + 0.5 = -4.4 V, Q1 and Q2 are saturated.

FIG. 2 shows an equivalent circuit model of a single transistor of the output stage differential circuit 1 under this condition. In this model, a transistor is represented by a junction diode D1 between the base and collector, a junction diode D2 between the base and emitter, and a constant current source Ia between the collector and emitter.

When there is no current amplification by the base-collector voltage Vbc, the value of the constant current source Ia can be expressed by Ia = Isexp (Vbe / Vt) + Ibc. Here, Vbe is a base-emitter voltage, Vt = kT / q (k: Boltzmann constant, T:
Absolute temperature, q: elementary charge), Is is junction saturation current, Ibc
Is the base-collector current. If a fluctuation due to instability of the emitter potential occurs in this model, this fluctuation is fed back to the base potential, and the base-emitter voltage V
It contributes to the variation of be and affects the value of Ia, causing the collector current to vary, and the instability of the transistor is maintained.

However, according to the present invention, by appropriately adjusting the value of the base-collector current Ibc, the fluctuation of the collector current Ic caused by the fluctuation due to the ringing of the base-emitter voltage Vbe can be reduced. Can be compensated for.

In particular, as shown in FIG. 3, when the transistors Q1 and Q2 of the output stage differential circuit 1 are operated in the region A, that is, in the saturation region when the transistors are turned on, Ibc is reduced to an appropriate value for compensating the fluctuation of Ic. Can be bigger. Incidentally, in the conventional output circuit device, when the transistor of the output stage differential circuit is turned on, it operates in the active region shown in the region B of FIG. When the transistor is an HBT, as shown in FIG. 3, the collector-emitter voltage Vce in the saturation region A is about 0.2 to 0.3 V, and the Vce in the active region B is about 2 to 3 V. is there.

On the other hand, for the differential input signal from the input terminals IN1 and IN2, the collector-emitter potential Vce of the transistors Q1 and Q2 is under the condition that the base potential is turned on, that is, the base-emitter voltage When Vbe becomes positive, the transistor becomes saturated and the transistors Q1 and Q
At the time of switching transition due to the input of signal No. 2, the condition before saturation is reached, and therefore Ibc = 0. Therefore, the output current waveform at the time of the rising and the falling of the switching does not deteriorate at all.

Therefore, the fluctuation of the collector current viewed from outside the collector is output as a good waveform which faithfully reproduces the input signal waveform. FIG. 4 shows the time variation of the signal output current of the output circuit device according to the present embodiment, and FIG. 5 shows the measurement results of the time variations of the collector-base voltage Vcb, the base potential Vb and the emitter potential Ve at this time. . As shown in FIG. 4, the signal output current waveform does not generate vibration due to linking or the like, and is a good rectangular wave. As shown in FIG. 5, the collector-base voltage Vcb at this time is reduced to about -1.2 V when the base potential Vb is at a high level, that is, when the transistor is turned on. It is clear that there is.

On the other hand, FIG. 6 shows the time variation of the signal output current when a potential condition is applied to the condition that the collector-emitter voltage Vce is always in the active region as in the conventional output circuit device. 5 shows the measurement results of the time variations of the collector-base voltage Vcb, the base potential Vb, and the emitter potential Ve at this time. As shown in FIG. 6, a continuous oscillation waveform having a large amplitude, that is, ringing occurs in the signal output current waveform. Further, as shown in FIG. 7, the collector-base voltage Vcb at this time does not reach the saturated state, and the voltage waveform oscillates in the active region. Further, the base potential Vb is in a state where a true signal waveform cannot be determined due to ringing.

As described above, according to the output circuit device of the present embodiment, even when a load such as the laser diode LD is driven at a high speed with a current, it is possible to avoid an unstable phenomenon such as ringing. And a good rectangular wave output current can be supplied.

Further, since it is not necessary to dull the signal waveform input to the transistor by an integrating circuit or the like in order to avoid the occurrence of ringing, the high speed operation is not impaired.

Further, since it is not necessary to extremely lower the output impedance of the buffer circuit 3 for supplying a signal to the output stage differential circuit 1 in order to eliminate ringing, current consumption is reduced, power consumption is increased, and heat generation is thereby caused. The problem of increase in the number does not occur.

(Second Embodiment) FIG. 8 shows a second embodiment of the present invention.
FIG. 4 is a circuit diagram of an output circuit device according to the embodiment. In the present embodiment, the transistors Q7, Q
8 in that a variable voltage source V2 is inserted in parallel with the level shift resistor R3 on the ground side of the load resistors R1 and R2 connected to the collector of the eighth embodiment.

According to the present embodiment, by adjusting the voltage of the variable voltage source V2, the load resistance R
1, R2 on the ground side, that is, transistors Q7, Q
8, the potential of the signal applied to the bases of the transistors Q1 and Q2 of the output-stage differential circuit 1 from the preceding-stage differential circuit 2 via the buffer circuit 3 can be adjusted. .

Therefore, even when the collector potentials of the transistors Q1 and Q2 change due to fluctuations in the output conditions of the output circuit device or the like, both the base-emitter voltage and the base-collector voltage become positive when Q1 and Q2 are turned on. And Q1 and Q2 can be kept in a saturated state.

(Third Embodiment) FIG. 9 shows a third embodiment of the present invention.
FIG. 4 is a circuit diagram of an output circuit device according to the embodiment. In the present embodiment, the output terminal OUT is connected to the collector of the output stage differential circuit 1.
This embodiment differs from the previous embodiments in that a variable voltage source V3 is inserted on the ground side of the terminating load resistors R4, R5 and the laser diode LD, which are loads connected via the terminals OUT1 and OUT2.

According to the present embodiment, by adjusting the voltage of the variable voltage source V3, the potentials on the ground side of the terminating load resistors R4, R5 and the laser diode LD, that is, on the collector sides of the transistors Q1 and Q2 are changed. It is possible to adjust the collector potentials of the transistors Q1 and Q2 of the output stage differential circuit 1 in an efficient manner.

Therefore, as in the second embodiment, the transistors Q1 and Q1
2, the base-emitter voltage and the base-collector voltage are both kept positive when Q1 and Q2 are turned on, and Q1 and Q2 can be kept in a saturated state. Can be

The present invention is not limited to the above embodiment, but can be implemented in various modifications. For example, the variable voltage source V2 described in the second embodiment and the third embodiment will be described. The configuration may be such that both the base potential and the collector potential of the transistors Q1 and Q2 of the output stage differential circuit 1 can be adjusted by using the variable voltage sources V3 in combination. Also, the base potentials of the transistors Q1 and Q2,
The means for adjusting the collector potential is not limited to the variable voltage sources V2 and V3 shown in FIGS.

Further, in the above embodiment, the case where the output stage and the circuits preceding the output stage are all constituted by differential circuits has been described. However, the present invention relates to an output circuit device in which the output stage is constituted by a single transistor. It is also possible to apply. As the output stage transistor, as described above, P
An NP transistor may be used, or an FET may be used. When an FET is used, a MESFET or HEMT is particularly effective in satisfying the conditions of the present invention.

[0047]

As described above, according to the present invention, it is possible to provide an output circuit device which does not impair the high-speed operation, does not increase the power consumption, and does not deteriorate the output current waveform due to ringing or the like. Therefore, the output circuit device of the present invention is suitable as a driver circuit of a low impedance load requiring high-speed operation, such as a laser diode for high-speed optical communication.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of an output circuit device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing an equivalent circuit model of a single transistor of the output stage differential circuit according to the embodiment;

FIG. 3 is a diagram showing a comparison of operation regions of transistors of an output stage differential circuit between the output circuit device of the present invention and a conventional output circuit device.

FIG. 4 is a view showing an output current waveform of the output circuit device according to the embodiment;

FIG. 5 is a diagram showing time variations of a base-collector voltage, a base potential, and an emitter potential of a transistor of the output stage differential circuit in the output circuit device according to the embodiment;

FIG. 6 is a diagram showing an output current waveform of a conventional output circuit device under a condition that an active state of a transistor of an output stage differential circuit is maintained.

FIG. 7 is a diagram showing a time variation of a base-collector voltage and a base potential and an emitter potential of a transistor of an output stage differential circuit in a conventional output circuit device.

FIG. 8 is a circuit diagram showing a configuration of an output circuit device according to a second embodiment of the present invention.

FIG. 9 is a circuit diagram showing a configuration of an output circuit device according to a third embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Output stage differential circuit 2 ... Previous stage differential circuit 3 ... Buffer circuit Q1, Q2 ... Differential transistor pair of output stage differential circuit Q3, Q4, Q5, Q6 ... Emitter follower transistor Q7, Q8 ... Front stage differential circuit Differential transistor pair IN1, IN2 Differential signal input terminal R1, R2 Load resistance of preceding differential circuit R3 Level shift resistance R4, R5 Termination load resistance LD Laser diode I1 to I6 Constant current source V1 Circuit Power supply V2: Variable voltage source for adjusting base potential V3: Variable voltage source for adjusting collector potential

Claims (5)

(57) [Claims] 1. An output circuit device using a transistor having a control electrode as an input terminal and a first main electrode as an output terminal in an output stage, comprising: a control electrode when the transistor is on; An output circuit device, comprising: means for driving the transistor such that voltages at the respective electrodes have the same polarity. 2. An output circuit device using, as an output stage, a transistor having a control electrode as an input terminal and a first main electrode as an output terminal, comprising: a control electrode when the transistor is on; Output means for driving the transistors so that the voltages seen at the respective electrodes are of the same polarity and the voltage between the first main electrode and the second main electrode is close to the saturation state voltage of the transistors. Circuit device. 3. The output circuit device according to claim 1, further comprising adjusting means for adjusting the potential of at least one of the control electrode and the first main electrode of the transistor. 4. A control electrode and a first electrode as the transistor.
The output circuit device according to any one of claims 1 to 3, wherein a transistor having a different junction potential difference between the main electrodes and a junction potential difference between the control electrode and the second main electrode is used. 5. An output stage differential circuit comprising a differential transistor pair by connecting said second main electrodes in common, and having a current source connected to said common second main electrode of said differential transistor pair. Means for driving the pair of differential transistors so that the voltages of the first main electrode and the second main electrode viewed from the control electrode of the on-side transistor of the differential transistor pair have the same polarity. The output circuit device according to claim 1.