JP3191952B2 - IC oscillator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit oscillator.
In particular, a microwave band IC that operates with an external dielectric resonator
Oscillator.

[0002]

2. Description of the Related Art In a conventional IC oscillator, as shown in FIG. 4, the gate of an oscillation FET Q1 is directly connected to a connection terminal 6 of an IC.
Is connected to the transmission line 9 formed on another substrate through the Bd in the PKG and the transmission line 7. When this is used as an oscillator, the dielectric resonator 10 is installed so as to be coupled with the transmission line 9, but the position is (2n +) from the gate of the FET Q1 in the IC.
1) λ / 4 (here, the guide wavelength at the oscillation frequency, n
Are integers greater than or equal to 0).

Here, as n increases, the IC becomes λ / 2 at a time.
The dielectric resonator 10 will be placed away from the IC, but the further away from the IC, the longer the transmission line 9 will be. When this transmission line becomes longer, 1) the transmission loss in the transmission line increases, and the oscillation level decreases.

2) Since the wave number on the transmission line increases,
The frequency characteristics deteriorate, and the fluctuations in the oscillation level and the oscillation frequency due to the temperature change increase.

[0005] 3) The position of the dielectric resonator becomes sensitive to the frequency, and the position adjustment becomes difficult.

Because of the above problems, n is selected as small as possible. In a conventional circuit, n =
1 is commonly used.

[0007]

In this conventional IC oscillator, as shown in FIG. 5, the distance from the gate 5 of the oscillation FET Q1 to the substrate on which the external transmission line is formed is already determined with respect to the oscillation frequency. Since there was a phase rotation of λ / 4, n = 0 could not be physically set, and miniaturization was difficult. Further, since the gate 5 of the FET Q1 is directly connected, there is a problem that the gate is weak against electrostatic breakdown.

SUMMARY OF THE INVENTION An object of the present invention is to solve such a problem, reduce the size of a circuit, and achieve stable oscillation.
An object of the present invention is to provide an integrated circuit oscillator that is resistant to electrostatic breakdown.

[0009]

Means for Solving the Problems The configuration of the present invention, F ET
The connection terminal connected to the gate of Toko the FET gate resistor and before Symbol FET connected between the ground is provided
Includes a first substrate and a second substrate on which the transmission line connected to the connection terminal is formed and Yuden body cavity to the plate on close to the transmission line is installed, the dielectric IC that oscillates by coupling a resonator with the transmission line
In the oscillating oscillator, by connecting a phase adjusting capacitor between the gate of the FET and the connection terminal on the first substrate, the FET and the dielectric resonator are connected to each other.
The electrical length between them is set to a quarter wavelength of the oscillation frequency .

[0010]

FIG. 1 is a circuit diagram of an embodiment of the present invention. The basic configuration of the oscillator of this embodiment is the same as that of the conventional example, but differs from the conventional example in that a capacitor C1 is inserted.

As shown in FIG. 2 (a), the impedance of the impedance viewed from the connection terminal of the IC to the IC is shifted from the point A of the impedance originally viewed from the gate of the FET to the IC by the capacitor C1. B. The amount θ of the return of the phase is determined by the capacitance of the capacitor C1, but in the case of the frequency in the X band, it can be obtained at 90 ° or more at 0.2 to 0.5PF.

Therefore, as shown in FIG. 2B, the phase rotation from the point A to the connection point 8 with the transmission line 9 is λ even if the phase rotation due to the Bd in the package and the transmission line 7 is included.
/ 4, and the dielectric resonator 10 is
It can be installed at a position of λ / 4 from the gate 5 of the ETQ1.

Further, since the capacitor C1 is inserted, the capacitor C1 becomes electrostatically strong, so that it is possible to improve from about 20 V to 30 V or more in an electrostatic breakdown test by C charge.

FIG. 3 is a circuit diagram of a second embodiment of the present invention. In this embodiment, a variable capacitance element (varactor) D1 is inserted in place of the inserted capacitor C1 in the first embodiment. By inserting the varactor D1, the dielectric resonator 10 can be installed at a position of λ / 4 from the gate 5 of the FET Q1 as in the first embodiment, and the electrostatic strength is increased.

Further, in the case of the present embodiment, the capacitance value of the varactor D1 can be varied by controlling the voltage from the outside.
Can be changed by an external voltage, and the oscillation frequency can be finely adjusted.

[0016]

As described above, according to the present invention, a dielectric resonator is connected to an oscillation FET by inserting a capacitor between the gate of the oscillation FET and a connection terminal in the IC.
Can be installed at a position of λ / 4 from the gate of the present invention, and an oscillator advantageous in terms of oscillation level and temperature stability can be constructed, and the effect of inserting a capacitor makes the device more resistant to electrostatic breakdown.

Further, if the capacitor to be inserted is a variable capacitance element, in addition to having the same effect, there is an effect that the oscillation frequency can be controlled by an external voltage.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention.

FIGS. 2A and 2B are a Smith chart and an explanatory diagram illustrating an effect of FIG.

FIG. 3 is a circuit diagram of a second embodiment of the present invention.

FIG. 4 is a circuit diagram of an example of a conventional IC oscillator.

FIG. 5 is an explanatory view for explaining a problem of the IC oscillator shown in FIG. 4;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Inside of IC 2, 3 Internal matching circuit 5 Gate of FET 6 Connection terminal of IC 7 Bd in PKG and transmission circuit 8 Connection point between PKG and external transmission line 9 Transmission line 10 Dielectric resonator C1 Capacitor D1 Varactor Q1 Oscillation FET for

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-164702 (JP, A) JP-A-63-138805 (JP, A) JP-A-58-137314 (JP, A) 155514 (JP, U) Fully open 61-143319 (JP, U)

Claims (2)

(57) [Claims] [Claim 1] between the ground and the gate of F ET Toko of FET
Connections that are connected to the connection to the resistance and the gate of the previous Symbol FET
A first substrate provided with terminals and a connection to the connection terminals;
Is the transmission line is formed to be and in proximity to the transmission line
Yes a second substrate Yuden body cavity is installed on the plate
In the integrated circuit oscillator, which oscillates by coupling the dielectric resonator and the transmission line, a phase between the gate of the FET and the connection terminal on the first substrate.
By connecting an adjustment capacitor, the FET and
The electrical length between the dielectric resonator and the dielectric resonator is １ ／ of the oscillation frequency.
An IC oscillator having a wavelength . 2. The integrated circuit oscillator according to claim 1, wherein the capacitor is a variable capacitance element whose capacitance value changes according to an externally applied voltage.