JP3186645B2 - Semiconductor laser and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser suitable for use in optical communication, a light source for optical measuring instruments, a fiber amplifier, a light source for exciting a solid-state laser, optical information processing, and the like, and a method of manufacturing the same.

[0002]

2. Description of the Related Art A semiconductor laser used for optical communication and optical information processing is required to have a high-temperature characteristic and the like so as to be able to operate without temperature control, for example, as well as to reduce the cost of the device itself. In addition, semiconductor lasers used as light sources for optical measuring instruments, excitation light sources for fiber amplifiers and fixed lasers include:
Higher light output continues to be required.

[0003] For example, Japanese Patent Application Laid-Open No. 6-104527 discloses a method for manufacturing an organic semiconductor element having excellent high-temperature characteristics and optical output characteristics with good uniformity and reproducibility on a large-area substrate. A method has been proposed in which an active layer and a block layer having a PNPN thyristor structure are formed by using a selective growth technique of a growth method (MOVPE) to manufacture a semiconductor laser having high output characteristics and excellent uniformity.

FIG. 5 and FIG.
FIG. 27 is a cross-sectional view showing main steps of a method of manufacturing a semiconductor laser described in Japanese Patent Publication No. 27 in order of steps. FIGS. 5 and 6 are merely separated for convenience of drawing.

The surface of the (100) n-InP substrate 1 is made of Si
The O ₂ film 21 is formed in two parallel stripes in the [011] direction (see FIG. 5A), the n-InP cladding layer 2, the active layer 3 composed of multiple quantum wells, and the p-InP cladding layer 4 is selectively grown (see FIG. 5).
(B)).

Next, the SiO ₂ film 21 is patterned so as to leave only the active region of the p-InP cladding layer (see FIG. 5C), and the p-InP block layer 5 and the n-type
The InP block layer 6 is selectively buried and grown (FIG. 5).
(D)).

Finally, the SiO ₂ film is removed and p-InP
The cladding layer 9 and the p-InGaAs contact layer 11 are grown (see FIG. 6E).

After the crystal growth is performed three times, electrodes 31 and 32 are formed to complete the semiconductor laser (FIG. 6).
(F)).

According to this manufacturing method, since a semiconductor etching step is not involved in forming a waveguide, a wafer excellent in controllability and yield can be manufactured, and both sides of the active layer 3 have a thyristor structure. Because of this block structure, the structure has a high level of high output characteristics.

[0010]

However, this conventional method for manufacturing a semiconductor laser cannot increase the thickness of the p-InP block layer and the n-InP block layer, and thus cannot be used at the time of large current injection or high-temperature operation. Sometimes, there was a problem that the thyristor turned on. The reason why the thickness of the block layer cannot be increased will be described below.

In the case of a semiconductor laser of a refractive index guide type, such as the semiconductor laser described in JP-A-6-104527, the width of the active layer is not more than about 1.5 μm in order to oscillate in a stable fundamental transverse mode. It is desirable that

In order to perform patterning so as to leave the SiO ₂ film only on the active layer, it is desirable that the flat portion on the active layer has a thickness of 1.2 μm or more.

Further, when an active layer is formed using selective growth, it is necessary to take into account that the controllability deteriorates because the effective mask width changes as the selective growth progresses, and the growth rate and composition change. The position of the active layer is 0.1 mm from the substrate.
It is desirably about 0.2 μm.

Therefore, the height of the waveguide composed of the n-InP cladding layer 2, the active layer 3, and the p-InP cladding layer 4 is about 0.3 to 0.4 μm.

Here, the p-InP block layer and the n-InP
Each of the P block layers is about 0.8 μm or more, and a total of about 1.6 μm
After the growth of m or more, the n-InP block layer 6 protrudes above the active layer and starts growing (see FIG. 6 (g)).

Accordingly, there is a problem in that the cross-sectional area through which holes flow becomes small, the series resistance of the element increases, and as a result, heat is generated when a high current is injected, and a high output cannot be obtained.

Further, in the worst case, the n-InP block layer is connected on the active layer, so that an element in which no current flows at all is manufactured, and the yield is greatly reduced. ing.

Therefore, if the thickness of the block layer is kept small, the thyristor cannot withstand the breakdown voltage, and is turned on at the time of high current injection. If the thickness of the block layer is large, the resistance increases and heat is generated, so that high output cannot be obtained. It turns out that.

On the other hand, if the concentration of each block layer is increased without increasing the thickness of the block layer to increase the withstand voltage of the thyristor, the junction capacitance increases and high-speed response cannot be performed. there were.

Therefore, the present invention has been made in view of the above problems, and an object of the present invention is to reduce the thickness of a current blocking layer of a semiconductor laser in which an optical waveguide is formed by selective growth without etching a semiconductor. It is an object of the present invention to provide a semiconductor laser which is thickened, improves a breakdown voltage of a thyristor in a block structure, and realizes high output and high temperature characteristics, and a method of manufacturing the same.

[0021]

In order to achieve the above object, a semiconductor laser according to the present invention comprises a current blocking layer on both sides of an optical waveguide layer including an active layer, wherein the current blocking layer comprises a plurality of current blocking layers. Stacked semiconductor layers
At least one of the plurality of stacked semiconductor layers.
Another semiconductor layer has a different composition from the other semiconductor layers.
In the flow blocking layer, the one semiconductor layer having a different composition
Is the composition and conductivity type of said other semiconductor layer of the current blocking layer is interposed between the same semiconductor layer,且
The one semiconductor layer having a different composition is etched at the time of manufacturing.
A stopper layer .

Further, the method for manufacturing a semiconductor laser according to the present invention comprises the steps of (a) forming an optical waveguide layer including an active layer on a first conductivity type semiconductor substrate by using selective growth; and (b) forming the optical waveguide layer. forming a second conductivity type semiconductor blocking layer and the first conductivity type semiconductor blocking layer on both ends only by forming selectively grown growth blocking mask directly layers, (c) the
Removing the growth inhibition mask immediately above the optical waveguide layer , a semiconductor of a different composition from the semiconductor block layer in the first conductivity type, and a semiconductor of the same composition, continuously laminating the entire surface,
(D) a step of selectively removing the semiconductor of the first conductivity type immediately above the optical waveguide layer ; and (e) a step of embedding the entirety with the semiconductor of the second conductivity type.

[0023]

Next, embodiments of the present invention will be specifically described with reference to the drawings. 1 and 2
FIG. 5 is a manufacturing process diagram for describing the best embodiment of the present invention. FIGS. 1 and 2 are merely separated for convenience of drawing.

In the embodiment of the present invention, a waveguide layer including an active layer is directly formed on a first conductivity type semiconductor substrate by selective growth (see FIG. 1B), and growth is stopped only on the waveguide layer. A mask is formed, and a part of the second conductivity type semiconductor block layer and the first conductivity type semiconductor block layer is formed (FIG. 1).
(D)).

Next, the growth blocking mask immediately above the waveguide layer is removed, an etching stopper layer of a first conductivity type made of a semiconductor having a composition different from that of the semiconductor block layer, and a semiconductor block of the first conductivity type made of the semiconductor block layer. A semiconductor having the same composition as the layer is continuously laminated on the entire surface (see FIG. 2F).

The first conductivity type semiconductor block layer and the etching stopper layer immediately above the waveguide layer are selectively removed and filled with a second conductivity type cladding layer (see FIG. 2 (i)).

By adopting such a structure and method, it is possible to make the block layer beside the active layer sufficiently thick.

[0028]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention;

FIGS. 1 and 2 are views for explaining a first embodiment of the present invention, and are cross-sectional views schematically showing main manufacturing steps in the order of steps. FIGS. 1 and 2 are merely separated for convenience of drawing.

On the surface of the (100) n-InP substrate 1, Si
An O ₂ film 21 is deposited, and the SiO ₂ film 21 is patterned so that the stripes face in the [011] direction (FIG. 1).
(A)). At this time, the mask interval is 1.5 μm and the mask width is 5 μm.

Using the MOVPE, the n-InP cladding layer 2 and the MQW (Multiple Quan)
active layer 3, composed of a multi quantum well (tum Well), p-I
The nP cladding layer 4 was selectively grown (see FIG. 1B).

Here, the n-InP cladding layer 2 has a thickness of 1
00 nm, the carrier concentration is 1 × 10 ¹⁷ cm ⁻³ ,
The InP cladding layer 4 has a thickness of 150 nm, a carrier concentration of 5 × 10 ¹⁷ cm ⁻³ , and the MQW active layer 3 has a thickness of SC
The H (Separate Confinement Heterostructure) layer is made of InG having a wavelength composition of 1.13 μm.
aAsP thickness 33 nm, barrier layer 1.2 μm wavelength composition
About 0.5% in InGaAsP having a wavelength composition of 1.5 μm when the thickness of the InGaAsP is 7 nm and the quantum well layer is unstrained.
And a quantum well layer with a thickness of about 5 nm in which the compressive strain was introduced.

The n-side SCH layer has a thickness of 1 nm up to a thickness of 20 nm.
Doping of × 10 ¹⁸ cm ⁻³ was performed, and thereafter, the p-side SCH layer was non-doped.

Then, the stripe mask SiO ₂ film is removed, and the SiO ₂ mask 2 is formed immediately above the p-InP cladding layer 4.
1 (see FIG. 1 (c)), and a p-InP block layer 5 (thickness 1 μm, carrier concentration 6 × 10 17 cm)
^-3 ) and the n-InP block layer 6 (0.4 .mu.m thick, carrier concentration 1.times.10@18 cm @ ^-3 ) are buried and selectively grown (see FIG. 1D).

Subsequently, the SiO ₂ mask 21 is removed (see FIG. 1E), and p-In having a wavelength composition of 1.13 μm is formed.
GaAsP etching stopper layer 7 (0.1 μm thick)
m, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) and n-InP block layer 6 (thickness 0.6 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ).
cm ⁻³ ) is grown over the entire surface (see FIG. 2F).

Next, using conventional photolithography to pattern the resist 22 as a window is opened only in a portion of the waveguide layer on side including the active layer 3 (Fig. 2
(G)).

Next, only the n-InP block layer 6 is removed using a hydrochloric acid-phosphoric acid-based etchant, and then only the InGaAsP etching stopper layer 7 is removed using a sulfuric acid hydrogen peroxide-based etchant (FIG. 2 ( h)).

Subsequently, the resist is removed and p-InP
Cladding layer 9 (2 μm thick, carrier concentration 1 × 10 ¹⁸ c
m ^-3 ), p-InGaAsP layer 1 having a wavelength composition of 1.2 μm
0 (thickness 0.2 μm, carrier concentration 1 × 10 ¹⁸ c
m ⁻³ ) and a p-InGaAs layer 11 (thickness 0.2 μm, carrier concentration 5 × 10 ¹⁸ cm ⁻³ ) are stacked in this order.

Thus, an n-side electrode 31 and a p-side electrode 32 are formed on the wafer surface formed by the four crystal growths (see FIG. 2 (i)).

A resonator length of 1200 μm was cut out, and a 4% AR (AntiRefrective) film (λ / 4 of SiON) was formed forward.
Film) and a 95% highly reflective film (SiO ₂ (λ / 4)
Film) / a-Si (λ / 4 film)) / (SiO ₂ (λ / 4
Film) / a-Si (λ / 4 film) / SiO ₂ (λ / 2 film))
I attached.

When 200 elements were measured on the coated chip, the average value of the oscillation threshold current was 18.
At 5 mA, the deviation was 2.1 mA, and the average value of the slope efficiency was 0.42 W / A, and the deviation was 0.02 W / A.

When assembled on a diamond heat sink with a junction down, the IL characteristics are as follows.
No saturation was observed up to 00 mA, and the optical output at a drive current of 500 mA was about 190 mW and the oscillation wavelength was 1.478 μm.

Further, no sharp decrease in light output due to turn-on of the PNPN thyristor in the block structure was observed up to a drive current of 1.4 A.

In a conventional thyristor-structured block structure having a block layer thickness of about 0.6 μm and a total of about 1.2 μm,
The light output started to be saturated at a drive current of about 300 mA, and the thyristor was turned on at a drive current of 800 mA.

Next, a second embodiment of the present invention will be described in detail with reference to the drawings. 3 and 4 are views for explaining the second embodiment of the present invention, and are diagrams schematically showing main manufacturing steps in the order of steps. Note that FIGS. 3 and 4 are merely separated for convenience of drawing.

The (100) p-InP substrate 51 has p-type
After growing the InP buffer layer 52 (thickness 0.5 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ), a period of 20 for the [011] direction is obtained by interference exposure and wet etching.
A 2.7 nm λ / 4 shift diffraction grating is formed.

On top of this, SiO ₂ 21 is deposited and patterned so that the stripes face in the [011] direction (see FIG. 3A). At this time, the mask interval is 1.5
μm, and the mask width is 3 μm.

In this opening, InGa is formed using MOVPE.
AsP guide layer 53, active layer 3 made of MQW, nI
The nP cladding layer 2 was selectively grown (see FIG. 3B).

The InGaAsP guide layer 53 has a wavelength composition of 1.00 μm, a thickness of 120 nm, and a carrier concentration of 1 × 1.
0 ¹⁷ cm ^-3 and the height of the embedded diffraction grating is about 25 nm.

The MQW active layer 3 serves as a p-side SCH layer.
InGaAsP having a wavelength composition of 1.05 μm is formed to a thickness of 30 nm.
(10 nm on the p side is doped to 7 × 10 ¹⁷ cm ⁻³ ), and the barrier layer is made of InGa having a wavelength composition of 1.05 μm.
A layer of about 4.5 nm thick obtained by introducing about 0.7% compressive strain into InGaAsP having a wavelength composition of 1.29 μm when the quantum well layer is 8 nm thick and the quantum well layer is strain-free, and the number of quantum well layers is 10 And an n-side SCH layer having a wavelength composition of 1.05 μm
Of InGaAsP having a thickness of 40 nm and a carrier concentration of 1 ×
It was 10 ¹⁸ cm ^-3 .

The n-InP cladding layer 2 has a thickness of 100 n
m, and the carrier concentration was 1 × 10 ¹⁸ cm ⁻³ .

Next, the stripe mask SiO ₂ is removed, and the SiO ₂ mask 21 is patterned just above the active layer (see FIG. 3C), and the p-InP block layer 59 (having a thickness of 0.
1 μm, carrier concentration of 6 × 10 ¹⁷ cm ⁻³ ) and n-In
P block layer 6 (thickness 0.6 μm, carrier concentration 1 × 1
0 ¹⁸ cm ⁻³ ) and the non-doped InP layer 54 (thickness of 0.18 cm ⁻³ ).
4 μm) and the p-InP block layer 5 (0.4 μm in thickness,
6 × 10 ¹⁷ cm ⁻³ ) and buried selective growth (FIG. 3)
(D)).

Next, the SiO ₂ mask 21 is removed (see FIG. 3E), and p-InGa having a wavelength composition of 1.13 μm is obtained.
AsP etching stopper layer 57 (0.1 μm thick,
Carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) and p-InP block layer 52 (thickness 0.6 μm, carrier concentration 6 × 10 ¹⁷ c)
m ⁻³ ) is grown over the entire surface (see FIG. 4F).

Next, only the portion of the upper side of the waveguide layer including the active layer 3 using conventional photolithographic techniques to pattern the resist 22 as a window is opened (Fig. 4 (g)
reference).

Using a hydrochloric acid-phosphoric acid type etchant, p-I
After removing only the nP block layer 5, only the etching stopper layer 57 of InGaAsP is removed using a sulfuric acid hydrogen peroxide-based etchant (see FIG. 4H).

After removing the resist, the n-InP cladding layer 60 (thickness 2 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ),
An n-InGaAs layer 56 (thickness 0.2 μm, carrier concentration 5 × 10 ¹⁸ cm ⁻³ ) is laminated.

A high-speed mesa groove is formed on the wafer surface formed by the five crystal growths in this manner, and the n-side electrode 3 is formed.
1. A p-side electrode 32 was formed (see FIG. 4 (i)).

At this time, the width of the upper part of the mesa is 8 μm, and the contact width of the n-side electrode is 6 μm.

A cavity length of 300 μm was cut out, and AR films (λ / 4 film of SiN: reflectance of 1% or less) were provided on both end surfaces.

When the coated chip was measured for 200 devices, the average value of the oscillation threshold current was 11.2.
The deviation in mA was 1.5 mA, and the average value of the slope efficiency was 0.33 W / A deviation 0.02 W / A. A device having an oscillation threshold current of 10.2 mA and a slope efficiency of 0.35 W / A was assembled on a boron nitride heat sink by junction-up and the characteristics at 85 ° C. were examined. As a result, a threshold efficiency of 35 mA was found to be 0.28 W / A. It showed very good high temperature properties.

In the device of this example, the temperature was from -40 ° C. to + 90 ° C.
In the range, an extremely stable single-axis mode oscillation with an SMSR of 45 dB or more was obtained up to a drive current of 80 mA.

Further, by interposing an i-InP layer (intrinsic InP layer) in the block layer and forming a high-speed mesa groove at the time of forming the electrode, the capacitance of the device of this embodiment is reduced to 6 pF. By using the p-substrate, the resistance immediately above the active layer was reduced to about 4Ω, and stable transmission of 2.5 Gb / s was realized in the range of −40 ° C. to + 90 ° C.

[0063]

As described above, according to the semiconductor laser of the present invention, since the semiconductor wet etching is not used for forming the optical waveguide layer, there is an effect that extremely uniform characteristics can be obtained.

Further, according to the present invention, since the blocking layer can be made thicker, the withstand voltage of the thyristor having the block structure can be increased, and even if a large current is injected, the light output does not become saturated. High output can be obtained.

Further, according to the present invention, even if an i-layer is inserted, a sufficient thickness of the block layer can be obtained, so that a high-speed element having excellent high-temperature characteristics and a small junction capacitance can be manufactured. To play.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining a manufacturing process and a structure according to a first embodiment of the present invention.

FIG. 2 is a sectional view for explaining a manufacturing process and a structure of the first embodiment of the present invention.

FIG. 3 is a cross-sectional view for explaining a manufacturing process and a structure according to a second embodiment of the present invention.

FIG. 4 is a cross-sectional view for explaining a manufacturing process and a structure according to a second embodiment of the present invention.

FIG. 5 is a cross-sectional view for explaining a manufacturing process and a structure of a conventional semiconductor laser.

FIG. 6 is a cross-sectional view for explaining a manufacturing process and a structure of a conventional semiconductor laser.

[Explanation of symbols]

Reference Signs List 1 n-type InP substrate 2 n-type InP cladding layer 3 active layer 4 p-type InP cladding layer 5 p-type InP block layer 6 n-type InP block layer 7 n-type InGaAsP etching stopper layer 10 p-type InGaAsP cap layer 11 p-type InGaAs cap Layer 21 SiO ₂ film 22 Resist 31 n-side electrode 32 p-side electrode 51 p-type InP substrate 52 p-type InP buffer layer 52 I-InP layer 53 p-type InGaAsP etching stopper layer 54 n-type InGaAs cap layer

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H01S 5/00-5/50

Claims (4)

(57) [Claims] An optical waveguide layer including an active layer is formed on a substrate by selective growth, and a current blocking layer is formed on both sides of the optical waveguide layer by selective growth while leaving a mask only on the optical waveguide layer. in the semiconductor laser that, the current blocking layer comprises a plurality of layers stacked semiconductor layers, at least one semiconductor layer of said plurality of layers stacked semiconductor layer is different in composition to the other semiconductor layer in said current blocking layer The one semiconductor layer having a different composition is the same as the other semiconductor layer of the current blocking layer.
That is, the composition and conductivity type are inserted between the same semiconductor layers .
And the one semiconductor layer having a different composition,
A semiconductor laser , which is an etching stopper layer . (A) forming an optical waveguide layer including an active layer on the first conductivity type semiconductor substrate by using selective growth; and (b) forming a growth inhibition mask only directly on the optical waveguide layer. Forming a second conductivity type semiconductor block layer and a first conductivity type semiconductor block layer at both ends thereof by selective growth; and (c) removing the growth inhibition mask immediately above the optical waveguide layer, A step of continuously laminating a semiconductor having a composition different from that of the semiconductor block layer and a semiconductor having the same composition over the entire surface; and (d) selectively removing the semiconductor of the first conductivity type immediately above the optical waveguide layer. (E) a step of burying the whole with a semiconductor of the second conductivity type. 3. An optical waveguide layer including an active layer is formed on a substrate by using selective growth, and a current blocking layer is formed by selective growth while leaving a mask only on the optical waveguide layer. A semiconductor laser comprising a plurality of stacked semiconductor layers, at least one of which has a different composition from other semiconductor layers, wherein the current blocking layer includes at least a first to fourth semiconductor layer; The fourth to fourth semiconductor layers have the same first conductivity type as the substrate, the first semiconductor layer has the second conductivity type, and the first, second, and fourth semiconductor layers have the same composition. Wherein the third semiconductor layer having a different composition is an etching stopper layer during manufacturing. 4. A semiconductor device comprising: (a) a waveguide layer including an active layer directly formed on a first conductivity type semiconductor substrate by selective growth; and (b) a growth blocking mask formed only directly on the waveguide layer. Forming a part of the two-conductivity-type semiconductor block layer and the first-conductivity-type semiconductor block layer; and (c) removing the growth-blocking mask immediately above the waveguide layer, and then forming the first-conductivity-type semiconductor block layer with the semiconductor block layer. (E) the semiconductor layer of the first conductivity type and the etching stopper layer immediately above the waveguide layer, wherein an etching stopper layer made of a semiconductor different from the semiconductor and a semiconductor having the same composition as the semiconductor block layer are continuously laminated on the entire surface. Is selectively removed and embedded with a second conductivity type cladding layer.