JP3186035B2 - Laminated thin film for field effect element and field effect transistor using the laminated thin film - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated thin film for a field effect transistor (hereinafter referred to as an FET) using a novel combination of materials.

[0002]

2. Description of the Related Art After discovering a copper oxide superconductor, attempts have been made to fabricate a Josephson device and a microwave circuit has been fabricated.

On the other hand, after the discovery of copper oxide superconductors, these superconductors (for example, YBa ₂ Cu ₃ O ₇ , La _2-x S
It has been shown that r _x CuO ₄ , Bi ₂ Sr ₂ CaCu ₂ O _{8 + δ} ) changes from an insulator to a superconductor by chemical doping (for example, changing the amount of oxygen). For this reason, a sample that is not chemically doped with these superconducting substances is used as a semiconductor layer by the electric field effect, an electric field is applied to the sample through an insulating layer, and carriers are accumulated at the interface between the semiconductor layer and the insulating layer. Although the possibility of superconductivity was considered, it has not yet been verified. Similar to such an attempt, a semiconductor layer made of YBa ₂ Cu ₃ O ₆ and Sr
There is an example of fabricating an FET using TiO ₃ as an insulator layer (A. Levy et al., Applied Physics Letter, 1990).

[0004]

However, it is difficult to design an integrated circuit having a sufficient function using only a conventional superconducting element such as a Josephson element. In particular, there is a disadvantage that the Josephson element is a two-terminal element. For this reason,
Attempts have been made to fabricate these oxide superconductor elements on a conventional semiconductor substrate such as Si or GaAs via a buffer layer, but no satisfactory characteristics have been obtained.

On the other hand, an FET having a semiconductor layer of YBa ₂ Cu ₃ O ₆ and an insulating layer of SrTiO ₃ not only has a very low mobility of 700 cm ² / V / sec at room temperature, but also has a low mobility as the temperature decreases. However, there is a drawback that is significantly reduced. The present inventors have found that this is based on the disorder of the interface between the semiconductor layer and the insulator layer, and have reached the present invention.

According to the following analysis, 1000
It can be understood that the interface disturbance below A (angstrom) affects the electric field effect.

That is, the depletion layer thickness W in the normal MIS Diode theory is approximately (2εsψs (inv) / qN _A ) ^1/2 N _A : the number of acceptors q: the charge ψs (inv): the potential εs of the inversion layer : Given by dielectric constant

When the typical number of acceptors (N _A ) of Si or GaAs is substituted into the above equation and the depletion layer thickness W is estimated at a temperature of 300 K, it is about 1000 A.

[0009] However, the semiconductor phase of the oxide superconductor (for example _{La 2 CuO 4, YBa 2 Cu} 3 O 6) In general, it is the degree N _A ~10 ¹⁹ cm ^-3 is by hole measurement found experimentally Was. For this reason, the thickness W of the depletion layer is 10 to
It becomes extremely thin at about 0A. For this reason, control of the interface becomes even more important.

[0010]

That is, in the present invention, an FET suitable for this substrate is manufactured on a substrate suitable for manufacturing a copper oxide superconductor element. That is, the same material as that of the copper oxide superconductor is used as the material for the FET. Thereby, disturbance of the interface can be suppressed, and a good electric field effect can be obtained.

LnBa ₂ Cu ₃ is used as a copper oxide superconductor.
O ₇ (Ln is a rare earth element other than Ce and Pr such as Y, Nd, Dy, and Yb), Bi ₂ Sr ₂ Can _-1 Cu ₂ O _{6 + 2n + δ}
(N = 1, 2, 3) or Tl-based superconductor Ln _2-x Mx
CuO _{4 + δ} (x to 0.05 to 0.3) (usually T, T ′,
Called T ^* phase. Ln is a rare earth such as La or Nd, M
Is an alkaline earth element such as Sr, Ca, Ba or Nd;
Pr).

[0012]

Next, the semiconductor layer and these substances will be described. Substances with reduced oxygen content of these substances (eg, YBa
₂ Cu ₃ O ₆ ) or a substance not chemically doped with a metal element (eg, Ln ₂ CuO ₄ ; Ln is a trivalent rare earth),
Or that eliminate the free carrier by chemical doping _{(e.g., Bi 2 Sr 2 (Ca 1} -x Ln x) Cu 2 O
_{8 + δ} ; Ln is a rare earth such as Y or Nd, x to 1) or a copper oxide superconductor in which copper is replaced by another element, particularly a transition metal (eg, YBa ₂ (Cu _1-x T _x ) ₃ O ₇ , Bi ₂ S
r ₂ Ca (Cu _1-x T _x ) ₂ O _{8 + δ} , Bi ₂ Sr ₂ (C
_{u 1-x T x) 2} O 6 + δ, La 2-y Sr y (Cu
_1-x T _x ) O ₄ , T = Co, Ni, Mn, Fe, Al,
x> 〜0.3) can be a semiconductor, and the above-mentioned group of substances will hereinafter be referred to as the same type as the oxide superconductor. Furthermore,
Some of these substance groups can form good insulators.

That is, the above-mentioned Cu is replaced with another element. In addition, replacement of alkaline earth (for example, Ca) with rare earth or the like, or reduction of the number of carriers by reducing the amount of oxygen may be used together with these. Examples of these are Bi ₂ (S
r, Ca) CoO _{6 + δ} , Bi ₂ (Sr, Ca) ₂ MnO
_{6 + δ} , Bi ₂ Sr ₃ Fe ₂ O _{9 + δ} , YBa ₂ (Cu _{1- x}
(Fe, Co) _x ) ₃ O _{6 + δ} (x = 1 to 0.8), Bi
₂ Sr ₂ Cu _1-x (Cr, W) _x O _{6 + δ} , (La _2-x S
r _x ) CoO ₄ (x = 0 to 1), (La _2−x Sr _x ) F
A material in which Cu is replaced by another transition metal, such as eO ₄ (x = 0 to 1), is effective. Nd ₂ (Cu,
For T) O ₄ and Pr ₂ (Cu, T) O ₄ (T is a transition metal such as Co), a film having a high resistance can be easily obtained.

In the above substance group, oxide superconductors composed of rare earth, alkaline earth and copper, and superconductors composed of Bi, copper and alkaline earth (and Tl, copper and alkaline earth) The group and the Bi oxide superconductor group containing no copper have a large difference in the manufacturing method and structure. In addition, there is also a very large difference in the chemical structure between the same substance groups of these substance groups, and it is generally difficult to stack these different substance groups.

However, even if the structure is different between the same substance groups, the embodiment shown in FIGS. 4A and 4B and the YBa ₂ CuO
_It is easy to obtain a laminated film such as _{6 + δ} / (La _2-x Sr _x ) CoO ₄ .

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, these embodiments will be described in detail with reference to the drawings.

FIG. 1 shows an example of an FET structure used in the present invention. In the embodiment of the present invention, the above-described materials are used for the insulator layer and the semiconductor layer.

In order to obtain a good interface as described above, it is preferable that each film is epitaxially grown on a substrate.

As a substrate used for this, as shown in FIG. 5, SrTiO ₃ , NdGaO ₃ , MgO,
A substrate having good matching with the lattice constant of the oxide superconductor such as LaAlO ₃ is used. Further, in order to improve the flatness of the substrate surface, a substrate material such as SrTiO ₃ or an oxide superconductor which easily grows epitaxially and a type of substance (eg, PrBa ₂ Cu ₃ O ₇ ) is formed as a buffer layer. May be used.

Further, as shown in FIG. 3A, a single crystal substrate of the same structural material as the above-described oxide superconductor may be used. The substrates shown in the embodiments of FIGS. 4A, 4B and 4C are easier to obtain than the oxide superconductivity itself, and have the advantage that large crystals can be obtained by the flux method or the floating zone (or TZFZ). .

The surfaces of these substrates are selected so as to minimize the mismatch with the lattice constant of the surface of the thin film to be laminated (for example, SrT in a copper oxide superconductor and a c-axis oriented film).
(100) plane of iO ₃ and MgO).

In the Bi-based oxide single crystals shown in FIGS. 4A and 4B, it is easy to use the (001) plane. Also,
Regarding the orientation of the film, since the current easily flows in the ab plane, it is preferable that the ab-axis direction of the semiconductor layer be substantially the direction connecting the drain and the source. As for the orientation of the insulating layer, it is easier to form a film having higher insulating properties when the c-axis direction is oriented in the film thickness direction.

In addition to the general FET structure shown in FIG. 1, the normal FET structure shown in FIG. 2 may be reversed. FIG. 3B shows a case where the electrode layer itself is used as a substrate in this structure.

FIG. 6 shows the embodiment.

The above-mentioned oxide superconductor may be used for the source, drain and bias electrode. Further, conventionally used metals such as gold and silver may be used.

Next, a method for manufacturing these devices will be described.

First, when the substrate is used as it is as the semiconductor layer, the surface of the substrate is sufficiently polished and flattened. This is not necessary if the cleavage surface of the surface is sufficiently flat. However, in the case of polishing, annealing is performed in an atmosphere containing oxygen, and preferably, an insulator layer is deposited without exposure to the air. It is also effective to make the ion beam obliquely incident on the substrate and perform ion milling before depositing the insulating layer.

The above substrate treatment is also effective when using an oxide superconductor as a substrate. Also, as usual,
In the case where the semiconductor layer is formed over an oxide single crystal substrate, oxygen or oxygen can be obtained by a known vapor deposition method, for example, a laser ablation method, a sputter deposition method, a reactive deposition method, or MO-CVD. Sources (ozone, N ₂ O, NO
₂ ) atmosphere.

Incidentally, when a semiconductor layer is obtained by reducing the oxygen content, or when La ₂ CuO ₄ , NdCuO ₄ , BiSr
_When the metal element on the Cu—O surface is only Cu, such as 2CuO _{6 + δ} , a reduction treatment is required to reduce carriers. This temperature is usually about 300 to 500 ° C., and is performed by annealing in an inert gas or vacuum.

Next, the insulating layer is formed in the same manner as the semiconductor layer, but it is more preferable to form the film without exposing it to the air from the vacuum chamber where the semiconductor layer thin film is formed. They are,
This is for reducing disorder at the semiconductor-insulator interface of the FET and reducing the state density.

The shape shown in FIGS. 1 and 2 can be obtained by vapor deposition through a mask during the above-mentioned film formation. Further, the structure shown in FIGS. 1 and 2 is manufactured by performing etching after forming an insulating layer or a conductive layer by photolithography.

When the semiconductor layer and the insulator layer are formed by a thin film layer as described above, the thin film manufacturing method described in the above-mentioned thin film manufacturing method (particularly, a thin film manufacturing method using a superlattice manufacturing technology (Japanese Patent Application No. 2-15 / 1990))
No. 2178) may be used to produce a better interface.

By using such an element, a Josephson element and a microwave passive element (phase shifter, filter, etc.) using a copper oxide superconductor can be manufactured on the same substrate.

The superconducting properties of the copper oxide superconductor, such as the critical temperature, vary greatly depending on the carrier concentration. This is used to change the superconductivity due to the electric field effect (superconducting FE
T) is being considered. It is also conceivable to use the structure described above for this purpose. In this case, the copper oxide of the semiconductor layer of the present invention may have a small number of carriers as a semiconductor or a superconductor having a lower critical temperature by increasing the number of carriers.

Example 1 A target of YBa ₂ (Cu _0.7 Co _0.3 ) ₃ O ₇ sintered body was subjected to SrTiO ₃ (00
1) 3000 laser ablation on the surface
A was formed and kept in an oxygen atmosphere of 100 mtorr for 5 hours. When this was subjected to X-ray diffraction, c-axis-oriented YBa ₂ C
It was found that the structure of u ₃ O ₇ was obtained. It was evaluated by four-probe method the electrical properties, ¹⁰⁵ at room temperature
It was found that a resistance value of Ω or more was obtained (voltage terminal interval: 5 mm).

Example 2 A thin film was formed on a SrTiO ₃ (100) surface by laser ablation method using YBa ₂ Cu ₃ O ₇ as a target at an oxygen pressure of 100 mtorr and a substrate temperature of 720 ° C. at 200 A.
Deposited. This was filled with oxygen to the atmospheric pressure in the same vacuum and kept at 600 ° C. for 3 hours. Next, it was kept at 500 ° C. for 10 hours at 5 × 10 ⁻⁶ torr in the same vacuum chamber and reduced. The substrate temperature is raised to 650 ° C.
The _{2 (Cu 0. 7 Co 0.3)} 3 O 7 as a target, to prepare an insulating layer 3000A by laser ablation method with an oxygen pressure 100mtorr through a mask and held for 5 hours at 100mtorr to 500 ° C.. This was replaced with a mask in another vacuum chamber, and 2000 A of gold was deposited as a source, drain and bias electrode.

When this was measured by X-ray diffraction, Y
Ba ₂ Cu ₃ O _{6 + δ} , YBa ₂ (Cu _0.7 Co _0.3 ) ₃
A c-axis oriented film corresponding to O _{7 ± δ} was obtained.

When a bias voltage was applied up to 10 V at room temperature, it was confirmed that the resistance between the source and the drain could be reduced as compared with the case without a bias.

[0039]

As described above, according to the present invention,
This device has no problem as in the prior art, and the present device makes it possible to easily integrate a superconducting device using a copper oxide superconductor and an FET on the same substrate. In addition, a device which has a possibility of manufacturing a superconducting transistor by an electric field effect by improving a manufacturing process can be obtained.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing an example of a field effect transistor (FET) structure used in the present invention.

FIG. 2 is an explanatory view showing another example of a field effect transistor (FET) structure used in the present invention.

FIG. 3 is an explanatory view showing still another example of a field effect transistor (FET) structure used in the present invention.

FIG. 4 is an explanatory diagram showing the embodiment of FIG.

FIG. 5 is an explanatory diagram showing the embodiment of FIG. 1;

FIG. 6 is an explanatory diagram showing the embodiment of FIG. 3 (b).

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 39/22-39/24 H01L 39/00

Claims (4)

(57) [Claims] 1. An oxide conductor layer or a superconducting layer on a substrate.
Laminated thin film with body layer, insulator layer and semiconductor layer laminated in this order
The insulator layer is a layer whose crystal structure is the same as that of the copper oxide superconductor, and in which at least a part of Cu of the copper oxide superconductor is substituted with another transition metal element. Wherein the semiconductor layer is an oxide layer having the same crystal structure as that of the copper oxide superconductor. 2. The semiconductor layer is an oxide single crystal substrate,
The multilayer thin film for a field effect device according to claim 1 , wherein an insulator layer is formed on the semiconductor layer . 3. An oxide superconductor single crystal wherein the oxide conductor layer is
Comprising an insulator layer and a semiconductor layer on the oxide conductor layer.
Are sequentially laminated, and an electrode is formed on the oxide conductor layer.
The multilayer thin film for a field effect element according to claim 1 or 2 . 4. The method according to claim 1, wherein
-Effect Transistors Using Multi-Layered Thin Films for Field-Effect Devices
Tar.