JP3183345B2 - Image storage device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image storage device used for performing visual recognition for mounting, assembling, and inspecting products and semi-finished products in various production facilities. It is.

2. Description of the Related Art In recent years, accuracy required for visual recognition in mounting, assembling, and inspecting products and semi-finished products has been increasing. Therefore, as one means for improving the accuracy of visual recognition, a camera having a higher resolution than before has been used. That is, while the conventionally used cameras have a horizontal resolution of about 512, high-resolution cameras having a horizontal resolution of 768 have come to be used.

By the way, in visual recognition, a video signal obtained from a camera is input to an image processing device. In the image processing device, the video signal is generally converted into image data, temporarily stored in an image memory, and the image data is read and processed. Recognize by doing.

A conventional configuration example of an image storage device in which a video signal obtained by the high-resolution camera is stored in an image memory will be described with reference to FIG.

In FIG. 4, reference numeral 1 denotes a reference clock signal serving as a time reference in the image processing apparatus. Reference numeral 2 denotes a horizontal address generator which generates a horizontal address of the image memory 4 and is constituted by a 10-bit counter. The horizontal address generator 2 counts up from 0 by one by a reference clock signal.
Is reset to 0 by the one-line end signal output from. Reference numeral 3 denotes a vertical address generation unit for generating a vertical address of the image memory 4, which is constituted by a 10-bit counter. Specifies the vertical address of the line. Reference numeral 4 denotes an image memory for storing image data. The number of horizontal addresses is 512 and the number of vertical addresses is 480. Reference numeral 5 denotes an image memory controller which outputs a one-line end signal indicating the end of one horizontal line of the video signal based on the horizontal address generated by the horizontal address generator 2. Reference numeral 6 denotes a high-resolution camera having a resolution of 768 for the effective period in the horizontal direction, and outputs a video signal. Reference numeral 7 denotes a video signal sampling unit that samples a video signal obtained from the high-resolution camera 6 and converts it into image data.

The operation of the image storage device configured as described above will be described with reference to FIG. 4 and FIG. The video signal shown in FIG. 5 shows one horizontal line of the video signal by the high resolution camera 6, and the video signal in the effective period has a resolution of 768. This video signal has 51 horizontal addresses.
In order to store the image data in the image memory 4, the image signal is sampled by the video signal sampling unit 7 into 512 pixels from 0 pixel to 511 pixel in synchronization with the horizontal addresses 0 to 511 generated from the horizontal address generating unit 2, and The image data is stored in the image memory 4 as image data.

However, in the image storage device having the above configuration, even when a high-resolution camera is used, when converting a video signal into image data in accordance with an image memory having 512 addresses in the horizontal direction. There is a problem that the resolution is lowered due to sampling in pixels, and a high-resolution video signal cannot be used effectively.

The present invention has been made in view of the above-described conventional problems, and has as its object to provide an image storage device capable of storing high-resolution image data using an image memory having a normal number of horizontal addresses.

Means for Solving the Problems The present invention, in order to achieve the above object, a conversion unit that converts the video signal of the input image into image data, the number of horizontal addresses is smaller than the number of horizontal effective pixels of the input image, A horizontal address corresponding to a horizontal pixel address of an input image is allocated so as to have a continuous number in each image memory,
A plurality of image memories for storing input image data at specified addresses; a horizontal address generator for outputting a horizontal address to each image memory; and a vertical address generator for outputting a vertical address to each image memory And an image memory control unit that receives a signal from the horizontal address generation unit and outputs an operation period signal for operating each image memory to store image data of a corresponding horizontal address. It is characterized by.

According to the above configuration of the present invention, the video signal from the high-resolution camera is converted into image data of the number of pixels corresponding to the resolution, and the image data is controlled by the image memory control unit for each operation period. Can be distributed and stored in a plurality of image memories.

(Embodiment) An embodiment of the present invention will be described below with reference to FIGS.

In FIG. 1, 1 is a reference clock signal, 2 is a horizontal address generator, 3 is a vertical address generator, 6 is a high resolution camera, and 7 is a video signal sampling unit, which is described in the conventional example of FIG. , And the description is omitted here. However, the horizontal address generator 2 is configured by a 10-bit counter in the conventional example, but is configured by an 11-bit counter in the present embodiment. Reference numerals 4a and 4b denote first and second image memories respectively storing the same image data as the conventional image memory 4 having 512 horizontal addresses and 480 vertical addresses. A 9-bit horizontal address is input to each of the generators 2. The resolution of the high-resolution camera 6 during the effective period in the horizontal direction is n (512 <n ≦ 1).
024), and the video signal sampling unit 7 is also configured to perform sampling at a resolution corresponding to the resolution of the high-resolution camera 6. In other words, the high-resolution camera 6
And the number of horizontal effective pixels of the input image sampled by the video signal sampling unit 7 is n (for example, n =
768), and the horizontal pixel address of this input image is from address 0 to address (n-1).

Reference numeral 8 denotes an image memory controller, which includes a pulse generator 9 and an operation period signal generator 10.

As shown in FIG. 2, the pulse generator 9 includes first to fourth
, And a register 25. The first comparator 21 outputs the 0 count pulse signal 11 when the horizontal address input from the horizontal address generator 2 is 0. The second comparator 22 has a horizontal address
When the value is 512, a 512 count pulse signal 12 is output. In the register 25, the value n of the resolution of the high-resolution camera 6 is set in advance from the CPU of the image processing apparatus (not shown). The third comparator 23 outputs the n count pulse signal 13 when the horizontal address is the resolution n of the high resolution camera. The fourth comparator 24 outputs the one-line end signal 14 when the horizontal address is the end address of one horizontal line.

The operation period signal generator 10 receives the 0 count pulse signal 11, the 512 count pulse signal 12, and the n count pulse signal 13 from the pulse generator 9, and outputs a horizontal address from 0.
During the period of 511, the first image memory operation period signal 15 indicating the period for storing the image data in the first image memory 4a is stored, and during the period of the horizontal address from 512 to n-1, the image data is stored in the second image memory 4b. A second image memory operation period signal 16 indicating a period is output. These image memory operation period signals 1
According to 5 and 16, after the image data of 512 pixels is stored in the first image memory 4a, the remaining image data can be continuously stored in the second image memory 4b. 4a and 4b can be combined and used as one image memory.

Next, the operation of the image storage device configured as described above will be described with reference to FIG. The video signal shown in FIG. 3 shows one horizontal line of a video signal obtained by a high-resolution camera having a horizontal resolution of n (512 <n ≦ 1024), and the video signal in the valid period has n resolutions. are doing. The video signal is sampled by the video signal sampling unit 7 into n pixels from 0 pixel to (n-1) pixel in synchronization with the horizontal addresses 0 to (n-1) generated from the horizontal address generation unit 2. , N pixel image data.

In the image data of addresses 0 to 511, the first image memory operation period signal 15 is input to the first image memory 4a from the operation period signal generator 10 during this period. It is stored at the horizontal address 0 to 511 of 4a. Next, from the 512 pixel address of the image data, (n-
1) For the pixel address, since the second image memory operation period signal 16 is input to the second image memory 4b during this period,
It is stored in the second image memory 4b. At this time, the image memory
The horizontal address input to 4b has 9 bits (0 to 51).
Since 1), the image data is stored in the horizontal addresses 0 to (n-512) of the second image memory 4b.

As described above, according to this embodiment, a video signal obtained by a high-resolution camera having a horizontal resolution of n (512 <n ≦ 1024) is stored in the first and second image memories without being reduced in resolution. Can be stored continuously.

Moreover, even for high-resolution cameras with different resolutions, CP
It can be easily handled only by changing the value of the register 25 from U, and there is no need to change hardware or the like.

According to the present invention, a video signal from a high-resolution camera can be converted into image data having the number of pixels corresponding to the resolution, and the image data can be dispersed and stored in a plurality of image memories. A high-resolution video signal can be stored in an ordinary inexpensive image memory without lowering the resolution. Further, by using the high-resolution image data stored in the image memory, it is possible to achieve an effect that highly accurate visual recognition becomes possible.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an image storage device according to an embodiment of the present invention, FIG. 2 is a block diagram showing a detailed configuration of a pulse generator in the image storage device, and FIG. FIG. 4 is an operation explanatory diagram, FIG. 4 is a block diagram showing a configuration of a conventional image storage device, and FIG. 5 is an operation explanatory diagram of the image storage device. 2 horizontal address generating unit 3 vertical address generating unit 4a first image memory 4b second image memory 6 high resolution camera 7 video signal sampling unit 8 image memory control unit 15 ... First image memory operation period signal 16... Second image memory operation period signal

──────────────────────────────────────────────────の Continued on the front page (72) Inventor Kazuhisa Sano 1006 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-57-78253 (JP, A) JP-A-60-162287 (JP, A) JP-A-63-214887 (JP, A) JP-A-63-239542 (JP, A) Shokai 62-89696 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06T 1/00-1/60

Claims (1)

(57) [Claims] A converter for converting a video signal of an input image into image data; and a horizontal address corresponding to a horizontal pixel address of the input image, wherein a horizontal address number is smaller than a horizontal effective pixel number of the input image. A plurality of image memories that are allocated to have continuous numbers in the image memory and store input image data at designated addresses, a horizontal address generator that outputs a horizontal address to each image memory, A vertical address generator for outputting a vertical address to each image memory; and an operation period in which a signal is input from the horizontal address generator and the image memory is operated to store the image data of the corresponding horizontal address for each image memory An image storage device, comprising: an image memory control unit that outputs a signal.