JP3178281B2 - Automatic frequency control demodulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a digital mobile communication system.
The present invention relates to a demodulator having an automatic frequency control (AFC) function having a wide acquisition range and high stability for satellite communication / mobile satellite communication.

[0002]

2. Description of the Related Art FIG. 9 shows a conventional AFC differential detection demodulator shown in a document (Shimakata et al .: PSK baseband differential detection demodulator configuration and characteristics, 1991 IEEJ Spring Spring University, B-360). The detection means 1 converts the differentially coded phase shift keying (PSK) signal 401 band-limited at the intermediate frequency into complex baseband signals 402 and 403 of in-phase and quadrature components by the quadrature detector 11, and performs A / D conversion. The converter 12 performs A / D conversion on the complex digital signals 404 and 405. The complex digital signals 404 and 405 are converted into phase (angle) data 406 by the complex / angle converter 13, and are converted to 1 by the delay detector 14.
A difference from the phase data 406 before the symbol is obtained, and phase difference data 407 is generated. The phase deviation correction means 2 receives feedback from the hard decision data 409 from the decision unit 22 on the phase difference data 407 from the detection means 1 and corrects the phase deviation corresponding to the reception angular frequency deviation from the automatic frequency controller 21. Is hard-decided by the decision unit 22 and output as hard-decision data 409.

The conventional AFC differential detection and demodulation device described above
An AFC method is used in which angular frequency deviation after detection is corrected on the basis of multiplication.

The quadrature detector 11 is, as shown in FIG.
Band-limited π / 4 shift quadrature phase modulation (QPSK)
The multiplier 401 multiplies the signal 401 by the in-phase and quadrature components from the phase shifter 113 for branching the reference signal from the oscillator 112.
1 for quasi-synchronous detection, and the complex baseband signal 40
2 and 403 are generated.

[0005] The A / D converter 12 performs A / D conversion on the complex baseband signals 402 and 403 from the quadrature detector 11, and outputs complex digital signals S (nT) 404 and 405.
Generate S (nT) = {I (nT) + jQ (nT)} × {cos
(ΔωnT + θi) + jsin (ΔωnT + θi)｝ = A (nT) × exp [j ｛θm (nT) + ΔωnT +
θi｝] where I (nT) and Q (nT) are real and imaginary part modulation components (indicating ± 1, ± ^{1/2 1/2} , 0 at the Nyquist point), T is a symbol period, and Δω is The residual angular frequency deviation of the quasi-synchronous detection, θi is the initial phase difference, A (nT) is the envelope component (indicating 1 at the Nyquist point), θm (nT) is the modulation component (in the case of a π / 4 shift QPSK signal, n Is an even number, {0, ± π / 2, π}, and n is an odd number, {± π / 4, ±
3π / 4}).

The complex / angle converter 13 is an A / D converter 1
The phase (angle) data Sa (nT) 406 is generated by referring to the table using the complex digital signals S (nT) 404 and 405 from the table as addresses. For simplicity, assuming that the envelope component A (nT) of the complex digital signal S (nT) is 1, when Δω = 0, Sa (nT) = θm (nT) + θi When Δω ≠ 0 Sa (nT) = θm ( nT) + θi +
ΔωnT

[0007] As shown in FIG.
Phase data Sa (nT) 4 from the complex / angle converter 13
For 06, the phase data Sa ((n−1) T) one symbol before from the shift register 141 is subtracted by the subtractor 142 to generate phase difference data Da (nT) 407. When Δω = 0, Da (nT) = θm (nT) −θm
((N−1) T) When Δω ≠ 0, Da (nT) = θm (nT) −θm
When ((n−1) T) + ΔωT Δω = 0 (ideal π / 4 shifted QPSK signal), the detected phase difference takes one of {± π / 4 and ± 3π / 4}. (1, 1), (1, 0), (0,
1), (0, 0)
Correct digital phase demodulation is performed (the principle of operation of differential detection). When Δω ≠ 0, the detected phase difference is shifted from the normal phase difference {θm (nT) −θm ((n−1) T)} by a phase deviation ΔωT. Will do.

The automatic frequency controller 21 first receives the demodulated data 408 from the first subtractor 211 as shown in FIG.
The second subtracter 212 subtracts the hard decision data 409 from the decision unit 22 to generate phase deviation information. Next, with respect to the phase difference data 407 from the delay detector 14, the phase deviation information from the second subtractor 212 is averaged and integrated by an averaging circuit 213 to remove noise components.
The demodulated data 408 is reduced by one. Further, the phase deviation information is a phase deviation ΔωT corresponding to the angular frequency deviation Δω.
When the feedback is applied so as to converge to the above, the deviation of the phase deviation ΔωT of the demodulated data 408 is corrected (the operation principle of the automatic frequency control).

[0011] As shown in FIG. 11, when the transmission signal point A rotates in phase by ΔωT to the reception signal point B due to the angular frequency deviation on the phase plane of the π / 4 shifted QPSK signal as shown in FIG. ), The phase of A is output when (ΔB | <π / 4) (when B is in the same quadrant as A).
Demodulated data 408 from automatic frequency controller 21 converges from phase B to phase A, and correct hard decision data Db (n
T) 409 is output. Db (nT) = θm (nT) −θm ((n−1) T) When π / 4 <ΔωT <3π / 4 shown in FIG. 11B (when B moves to a different quadrant from A), an error occurs. Since the phase of the decision signal point C is output, the demodulated data 408 from the automatic frequency controller 21 converges from the phase of B to the phase of C, and outputs erroneous hard decision data Db (nT) 409. Db (nT) = θm (nT) −θm ((n−1) T) +
When π / 2 π / 4 <ΔωT <3π / 4, the original output digital data (In, Qn) is erroneously synchronized and shifted by + π / 2 (−
Qn, In). Similarly, -3π / 4 <ΔωT <−π
/ 4, the shift is -π / 2 (Qn, -In), and 3
When π / 4 <ΔωT <−3π / 4, π shift (−In,
−Qn).

[0010]

SUMMARY OF THE INVENTION The above conventional A
The FC demodulator employs the AFC method based on multiplication to correct the angular frequency deviation after detection, so that when the angular frequency deviation is a large value, there is a problem in that synchronization is erroneous and demodulated data is erroneous. .

The problem to be solved by the present invention is that AF
An AFC system that compensates for correct synchronization even when the angular frequency deviation is a large value in the C demodulator (erroneous synchronization compensation AFC
Method).

[0012]

An automatic frequency control demodulator according to the first aspect of the present invention includes a detecting means for detecting a received signal, and a receiving means for receiving feedback by hard decision data generated for the detected data from the detecting means. An automatic frequency control demodulator comprising frequency deviation correction means for controlling angular frequency and correcting angular frequency deviation, wherein a hard data determined from the frequency deviation correction means is set in advance to a known data pattern sequence included in a received signal. And a plurality of known data pattern correlators for generating a known data detection signal by correlating with a reference pattern to be used.

An automatic frequency control demodulator according to a second aspect of the present invention converts and selects hard decision data from a frequency deviation correcting means according to a known data detection signal from a known data pattern correlator by an erroneous synchronization compensating means. A data converter for output data is provided.

In the automatic frequency control demodulator according to the third aspect of the present invention, the erroneous synchronization compensating means rotates the phase of the detection data from the detection means in accordance with the known data detection signal from the known data pattern correlator to obtain desired output data. A phase rotator is provided.

According to a fourth aspect of the present invention, there is provided an automatic frequency control demodulator for generating a control voltage corresponding to a control angular frequency deviation calculated by a false synchronization compensator in accordance with a known data detection signal from a known data pattern correlator. A generator;
A frequency converter for converting the angular frequency of the received signal with an oscillation angular frequency controlled according to the control voltage signal from the control voltage generator and outputting the low-frequency component signal to the detection means.

According to a fifth aspect of the present invention, there is provided an automatic frequency control demodulation apparatus, wherein a control voltage generator corrects a frequency deviation correction for a phase rotation amount due to a detected angular frequency deviation generated according to a known data detection signal from a known data pattern correlator. Is subtracted from the phase deviation information, the phase rotation amount based on the reception angular frequency deviation is obtained, and a control voltage signal corresponding to the reception angular frequency deviation is generated.

[0017]

[0018]

[0019]

The AFC demodulator according to the present invention first detects a received signal, performs automatic frequency control on the detected data, corrects a reception angular frequency deviation, and generates hard decision data. Next, the hard decision data is correlated with a preset reference pattern, and known data periodically inserted into the received signal is detected to generate a known data detection signal. Further, according to the known data detection signal, the hard decision data is converted and selected, or the detected data is rotated in phase to obtain desired output data. Alternatively, the angular frequency of the received signal is converted by an oscillation angular frequency controlled according to a control voltage frequency deviation generated according to the known data detection signal or a control voltage signal corresponding to the received angular frequency deviation, and the generated low-frequency component signal is detected. Input of means.

[0020]

FIG. 1 shows an AFC differential detection and demodulation apparatus according to one embodiment of the present invention. FIG. 1 shows a detection means 1 and a phase deviation correction means 2 corresponding to FIG. False synchronization compensation means 3
Is a known data pattern that is correlated with the hard decision data 409 from the phase deviation correcting means 2 and a preset reference pattern and is periodically inserted into the received signal and used for frame synchronization or the like (FIG. 2 ( c) a known data detection signal 4 from a known data pattern correlator 31 for detecting
10, the hard decision data 409 is converted by the data converter 3
In step 2, the data is converted and selected, and output as a correct data series 411.

The AFC differential detection and demodulation device of the above embodiment
An AFC system (mis-sync compensation AFC system) that takes a correlation with a known data pattern and compensates for correct synchronization even when the frequency deviation is a large value is adopted.

The known data pattern correlator 31 is shown in FIG.
As shown in (a), each of the first to fourth correlators 311 and 311
a, 311b and 311c. Each correlator 311
311a, 311b, and 311c, first, as shown in FIG. 2B, hard decision data ((I
n, Qn), (-Qn, In), (-In, -Qn) and (Qn, -In)) 409 is a pattern sequence of known data included in the received signal shown in FIG. Length L
Is held by the shift register 312 of FIG. Also, I and Q channel known data pattern sequences (SIn, SQn) (n is 0, 1,..., L-1) are expressed as {0, π / 2, π, −π /
Reference pattern ((SIn, SQn) rotated by 2 °
And (-SQn, SIn), (-SIn, -SQn), and (SQn, -SIn) in the known data pattern memory 313. Next, the exclusive OR operation unit 314 obtains the exclusive OR of each bit of the shift register 312 and the known data pattern memory 313. Further, the discriminator 316 compares the number of mismatch bits to be added by the adder 315 with the number of mismatch bits “1”, and outputs a known data detection signal 410 if the number is equal to or smaller than a preset allowable error bit number ε. For example, π / 4 <ΔωT <
At 3π / 4, the hard decision data 409 becomes an output (−Qn, In) when converging to an erroneous decision signal point shifted by + π / 2, and the known data pattern sequence included in the received signal is also (−SQn, SIn). ) Is output as (−SQ
n, SIn) as a reference pattern. For example, the second correlator 311 outputs, as the known data detection signal 410, information indicating that the phase deviation correction means 2 has erroneously synchronized with a signal point shifted by + π / 2.

As shown in FIG. 3, the data converter 32 first converts the hard decision data 409 from the phase deviation correcting means 2 into first to fourth internal data converters 321, 321 a, 321 b, and 3.
21c, the output data series (-Qn, In), (In, Qn), (Qn, -In), and (-In, -Q
n). Next, the known data pattern correlator 31
The output data series of each of the internal data converters 321, 321 a, 321 b, and 321 c is selected by the selector 322 in accordance with the known data detection signal 410 from
It is assumed to be 11. For example, the hard decision data 409 (−Qn, I
n), the known data detection signal 410 (−SQn, S
In), the output data sequence (In, Qn) of the second internal data converter 321a is selected as output data 411, and correct data demodulation is performed.

In the above embodiment, the false synchronization compensating means 3 outputs the output hard decision data (-Qn, In) 4 of the phase deviation correcting means 2.
It has been described that the data converter 32 converts and selects 09 to compensate for erroneous synchronization. However, as shown in FIG. 4, the phase rotation of the input phase difference data 407 of the phase deviation correction means 2 is performed by the phase rotator 33. Is also good. As shown in FIG. 5, the phase rotator 33 first obtains ｛0, −π / 2, π, π / according to the known data detection signal 410 from the known data pattern correlator 31.
The selector 331 selects one of the values of 2｝. Next, the output of the selector 331 and the input phase difference data 407 of the phase deviation correcting means 2 are added by an adder 332 to obtain output data 411. For example, π / 4 <ΔωT <3π / 4
In the case of, the phase difference data 407 has a phase deviation of “+ π / 2”, and when the hard decision data (−Qn, In) 407 converges to the erroneous decision signal point shifted by + π / 2, the known data detection signal (− SQn, SIn) 410 and “−π / 2”
The output of the selector 331 for selecting the input phase difference data 40
7 and “+ π / 2” to cancel each other to obtain output data 411 and perform correct data demodulation.

Further, in the above embodiment, the erroneous synchronization compensating means 3 corresponds to FIG.
As shown in (a), a frequency converter 35 that controls an oscillation angular frequency by a control voltage signal 412 from a control voltage generator 34 that is generated in accordance with a known data detection signal 410 from a known data pattern correlator 31 receives a received PSK signal. The angular frequency may be output to the detection means 1 after conversion with respect to 401. The frequency converter 35, as shown in FIG.
First, according to the control voltage signal 412 corresponding to the control angular frequency deviation Δωv calculated from the control voltage generator 34, the oscillation angular frequency is controlled by the voltage controlled oscillator 351 and the output signal Cv
(T) is generated. Next, the received PSK signal 401C
(T) is detected by the multiplier 352 as a low-frequency component signal ML (t) 413 obtained by removing a harmonic component from the product M (t) of the product M (t) of the output signal Cv (t) from the voltage controlled oscillator 351. Output to For example, when | ΔωT | <π / 4, M (t) = C (t) × Cv (t) = cos ｛ωc + ωv) t + Δωt + θm (t) + θo
+ Θv｝ + ML (t) C (t) = cos ｛(ωc + Δω) t + θm (t) + θ
o｝ Cv (t) = 2 cos (ωvt + θv) ML (t) = cos ｛(ωc−ωv) t + Δωt + θm
(T) + θo−θv｝ Here, ωc is a normal center angular frequency, ωc−ωv is a normal intermediate angular frequency after frequency conversion, Δω is a residual angular frequency deviation, θo is an initial phase, and θm (t) is a modulation. Represents a component. π
When / 4 <ΔωT <3π / 4, the hard decision data 409 from the phase deviation correction means 2 indicates a hard decision result which is erroneously synchronized with a signal point shifted by + π / 2, so that Cv (t) = 2 cos ｛(ωv + Δωv ) T + θv｝ Δωv = (+ π / 2) / TML (t) = cos ｛(ωc−ωv) t + (Δω−Δω)
v) t + θm (t) + θo−θv｝ Accordingly, the residual angular frequency deviation is | Δω−Δωv | <π / 4.
To the phase deviation after differential detection,
The phase deviation correction means 2 does not erroneously synchronize. -3π / 4 <Δω
The same compensation is performed as described above when synchronizing with another quadrant of T <−π / 4 and 3π / 4 <ΔωT <−3π / 4.

In the above embodiment, the control voltage generator 34 calculates the control angular frequency deviation Δωv from the known data pattern correlator 31 in accordance with the phase rotation amount detection information (known data detection signal 410) of the phase deviation correcting means 2, and calculates the control voltage. Signal 412
Has been described as output to the frequency converter 35,
As shown in FIG. 7, the control voltage signal 412 may be generated by the control voltage generator 34a in accordance with the phase deviation information 414 from the automatic frequency controller 21a. The angular frequency deviation can be compensated with higher accuracy. The automatic frequency controller 21a is shown in FIG.
As shown in FIG. 10A, FIG. 10C corresponds to FIG. However, the phase deviation information ΔθAF from the averaging circuit 213
C414 is output to the control voltage generator 34a. As shown in FIG. 8B, the control voltage controller 34a first detects the phase rotation amount (phase rotation due to the detected angular frequency deviation) from the Δθ total detector 341 generated in accordance with the known data detection signal 410 from the known data pattern correlator 31. Amount) Δθto
tal, the automatic frequency controller 34a
Is subtracted from the phase deviation information Δθ AFC414, and the received phase rotation amount (the phase rotation amount due to the reception angular frequency deviation) Δθi
Find n. Next, an internal voltage generation circuit 3 for obtaining and generating a reception angular frequency deviation Δω from the Δθin, that is, ΔωT.
The control voltage signal 412 from 43 is output to the frequency converter 35. For example, when π / 4 <ΔωT <3π / 4, FIG.
As shown in (c), the original transmission signal point A after the delay detection is phase-rotated by the angular frequency deviation Δω, detected at the reception signal point B, erroneously synchronized with the erroneously determined signal point C, and converged.
The relationship of tal = Δθin + ΔθAFC is established. At this time, the low-frequency component signal ML (t) 413 of the frequency converter 35
Then, the residual angular frequency deviation becomes zero as in the following equation, and the received angular frequency deviation Δω is compensated. The same is true when synchronizing to another quadrant. ML (t) = cos ｛(ωc−ωv) t + θm (t) +
θo-θv｝

In the above embodiment, the erroneous synchronization compensating means 3 has been described by focusing on the case of the delay detection and demodulation device. However, it is needless to say that the erroneous synchronization compensation means 3 can be applied to the case of the synchronization detection and demodulation device.

[0028]

As described above, the AFC demodulator of the present invention employs an erroneous synchronization compensation AFC system which correlates with a known data pattern and compensates for correct synchronization even when the angular frequency deviation is large. Compared with the conventional AFC system in which the angular frequency deviation after detection is corrected based on multiplication, even if there is a large angular frequency deviation with respect to the received signal, there is an effect that erroneous synchronization is compensated and demodulation can be performed correctly.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of an AFC differential detection and demodulation device according to an embodiment of the present invention.

FIG. 2 is a functional block diagram of a known data pattern correlator shown in FIG. 1 and a format diagram illustrating a known data pattern sequence in a received signal.

FIG. 3 is a functional block diagram of the data converter shown in FIG.

FIG. 4 is a functional block diagram of another embodiment showing the present invention.

FIG. 5 is a functional block diagram of the phase rotator shown in FIG. 4;

FIG. 6 is a functional block diagram of another embodiment showing the present invention, the control voltage generator and the frequency converter.

FIG. 7 is a functional block diagram of another embodiment showing the present invention.

8 is a functional block diagram of the automatic frequency controller and the control voltage generator shown in FIG. 7, and a diagram for explaining signal point arrangement on a phase plane in the embodiment.

FIG. 9 is a functional block diagram of a conventional AFC differential detection and demodulation device.

FIG. 10 is a functional block diagram of a quadrature detector, a delay detector, and an automatic frequency controller shown in FIG. 9;

FIG. 11 is a diagram illustrating a signal point arrangement on a phase plane according to a conventional example.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 detection means, 2 phase deviation correction means, 3 false synchronization compensation means, 11 quadrature detector, 12 A / D converter, 13
Complex / angle converter, 14 delay detector, 21, 21a
Automatic frequency controller, 22 determiner, 31 known data pattern correlator, 32 data converter, 33 phase rotator, 34, 34a control voltage generator, 35 frequency converter, 401 band-limited phase modulation (PSK) signal, 40
2,403 complex baseband signals (in-phase, quadrature components),
404, 405 complex digital signal (in-phase and quadrature components), 406 phase data, 407 phase difference data, 4
08 demodulated data, 409 hard decision data, 410 known data detection signal, 411 output data, 412 control voltage signal, 413 low frequency component signal, 414 phase deviation information. In the drawings, the same reference numerals indicate the same or corresponding parts.

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Toshiharu Kojima 5-1-1, Ofuna Kamakura City Mitsubishi Electric Corporation Communication Systems Laboratory (72) Inventor Makoto Miyake 5-1-1, Ofuna, Kamakura City Mitsubishi Electric (72) Inventor Tadashi Fujino 5-1-1 Ofuna, Kamakura City Mitsubishi Electric Corporation Communication Systems Laboratory (56) References JP-A-7-212429 (JP, A) JP JP-A-7-221803 (JP, A) JP-A-8-23361 (JP, A) JP-A-7-176994 (JP, A) JP-A-7-297871 (JP, A) (58) Fields investigated (Int) .Cl. ⁷ , DB name) H03J ^7/ 00-7/02 H04L 27/22-27/38

Claims (5)

(57) [Claims] 1. A method for receiving a differentially encoded phase modulated received signal.
Converting means for converting the phase into a phase, and delay detecting the phase to output phase difference data;
Wave determination means and hard decision data based on the phase difference data from the delay detection means.
Is generated, and the hard decision data is fed back to obtain the reception angle.
Frequency deviation for correcting the phase difference corresponding to the frequency deviation
Correction means, for the hard decision data from the frequency deviation correction means,
A known data pattern included in the received signal and stored in advance
Frequency deviation based on the reference pattern
Is detected, and based on this specific range,
An automatic frequency control demodulator, comprising: an erroneous synchronization compensator for compensating erroneous synchronization of a signal . 2. The erroneous synchronization compensating means includes a plurality of presets.
Any one of the different reference patterns and the
Exclusive logic with known data pattern sequence hard decision data
Take the sum and obtain the sum of the number of 1 from the preset threshold.
If the reference pattern is smaller than
A plurality of known data paths for generating the known data detection signal shown in FIG.
The automatic frequency control demodulator according to claim 1 , further comprising a turn correlator . 3. A phase rotator, wherein a phase rotator is provided by the erroneous synchronization compensating means in accordance with a known data detection signal from a known data pattern correlator to rotate the detected data from the detecting means into a desired output data. Item 2. The automatic frequency control demodulator according to Item 1. 4. A control voltage generator for generating a control voltage signal corresponding to a control angular frequency deviation calculated by a false synchronization compensating means in accordance with a known data detection signal from a known data pattern correlator; 2. The automatic frequency converter according to claim 1, further comprising a frequency converter that converts the angular frequency of the received signal with an oscillation angular frequency controlled according to a control voltage signal and outputs the low-frequency component signal to a detection unit. Control demodulator. 5. A control voltage generator subtracts phase deviation information from a frequency deviation correction means from a phase rotation amount due to a detected angular frequency deviation generated in accordance with a known data detection signal from a known data pattern correlator, and receives a reception angle. 5. The automatic frequency control demodulator according to claim 4, wherein a phase rotation amount based on the frequency deviation is obtained, and a control voltage signal corresponding to the reception angular frequency deviation is generated.