JP3175307B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for electrically connecting an impurity diffusion layer formed on a surface of a semiconductor substrate to a polysilicon electrode.

[0002]

2. Description of the Related Art In a semiconductor device, there is a method called an embedded contact as a method for electrically connecting an impurity diffusion layer and a polysilicon layer.

FIGS. 12 and 13 are cross-sectional views in a conventional embedded contact forming step.

In a conventional buried contact forming step, first, a field oxide film 2 is formed on a silicon substrate 1 by an insulation separation method as shown in FIG. Next, thermal oxidation is performed to form a gate oxide film 3 on the silicon substrate 1 and then, using photolithography, to a region other than the buried contact formation region having a width of about 0.5 μm as shown in FIG.
As shown in (a), a resist pattern 14a is formed.

Next, using the resist pattern 14a shown in FIG. 12A as a mask, the gate oxide film 3 is partially removed by wet etching. Next, a gate polysilicon film 19 is formed on the entire upper surface of the silicon substrate 1 by a CVD (chemical vapor deposition) method as shown in FIG.
Next, as shown in FIG. 12 (c), in order to prevent the gate oxide film 3 from overlapping above the gate oxide film 3, the position inside the buried contact formation region is set to about 0.1 μm in consideration of the mask positioning error. A resist pattern 14b is formed.

Next, as shown in FIG. 13A, using the resist pattern 14b as a mask, the gate polysilicon film 19a is removed by RIE (reactive ion etching), and the gate polysilicon film is formed in the buried contact formation region. 19a is formed. At this time, as shown in FIG. 13A, the surface of the silicon substrate 1 is shaved off to a thickness of about 0.1 μm.

Next, as shown in FIG. 13B, the gate oxide film 3 is removed by wet etching, and then the resist pattern 14b is removed.

Next, as shown in FIG. 13C, when an N-type impurity is ion-implanted using the gate polysilicon film (polysilicon electrode) 19a as a mask, the N-type impurity diffusion layer 18 is formed.
Then, the impurity implanted into the polysilicon electrode 19a is diffused into the silicon substrate 1, and an N-type impurity diffusion layer 18a is formed. At the same time, the polysilicon electrode 19a becomes conductive. Therefore, the N-type impurity diffusion layer 18
b, N-type impurity diffusion layer 18a, polysilicon electrode 19a
Are electrically connected.

[0009]

In the above-described conventional method, as shown in FIG.
In the step of patterning 9a, the gate oxide film 3
The silicon substrate 1 in the region outside the above is scraped off to a thickness of about 0.1 μm, which causes crystal defects in the silicon substrate 1 and easily causes leakage current, which is a problem.

When the resist pattern 14b shown in FIG. 13A overlaps over the gate oxide film 3, polysilicon remains on the gate oxide film 3, and as a result, as shown in FIG. When the N-type impurity is ion-implanted as shown in (1), the remaining polysilicon and the gate oxide film 3 act as a mask, and under this region, the diffusion of the impurity becomes insufficient and the impurity diffusion layer 18a and the impurity diffusion layer 1
8b is not connected, which is a problem.

Accordingly, the present invention provides a method of manufacturing a semiconductor device in which a polysilicon electrode is electrically connected to an impurity diffusion layer of the same size as a conventional one without shaving a semiconductor substrate. Aim.

[0012]

[0013]

According to a first method of manufacturing a semiconductor device according to the present invention, a first impurity diffusion layer is formed on a semiconductor substrate, and a second impurity diffusion layer is formed adjacent to the first impurity diffusion layer. Forming a first oxide film by selectively oxidizing a predetermined region of a semiconductor substrate to form a first oxide film. Thermal oxidation of the semiconductor substrate,
A first step of forming a second oxide film in a region other than the first oxide film, and further forming a first silicon film serving as a polysilicon electrode over the entire surface of the semiconductor substrate covered with the first oxide film and the second oxide film; A second step of forming an insulating film selectively etchable with respect to the silicon film on the entire surface of the semiconductor substrate having the silicon film formed thereon, and selectively forming a second step on the entire surface of the semiconductor substrate having the insulating film formed thereon. Forming a first resist pattern;
Using at least the first resist pattern as a mask,
A third step of forming a contact hole by removing the insulating film, the first silicon film and the second oxide film on a predetermined region where the oxide film and the second oxide film are adjacent to each other, and a semiconductor having the contact hole formed therein A fourth step of forming a second impurity diffusion layer on the semiconductor substrate by introducing impurities using the first resist pattern on the substrate as a mask, and a first resist pattern on the semiconductor substrate on which the second impurity diffusion layer is formed. To remove
Thereafter, a fifth step of forming a second silicon film serving as a polysilicon electrode over the entire surface of the semiconductor substrate including the contact hole, and forming a second silicon film in a region other than the contact hole on the semiconductor substrate where the second silicon film is formed, under the second silicon film. A sixth step of removing the entire surface of the second silicon film until the insulating film is exposed; and removing the insulating film on the semiconductor substrate where the insulating film is exposed in a region other than the contact hole to form a contact hole. Forming a step between the formed second silicon film and the first silicon film on the second oxide film, and then selectively forming a second resist pattern over the entire surface of the semiconductor substrate having the step formed thereon And selectively removing the second silicon film on a predetermined region of the first silicon film and the second impurity diffusion layer other than on the first oxide film of the semiconductor substrate on which the second resist pattern is formed, An eighth step of forming a polysilicon electrode including remaining on the second impurity diffusion layer and the second silicon film,
After removing the second resist pattern of the semiconductor substrate on which the polysilicon electrode including the remaining second silicon film has been formed,
The method includes a ninth step of forming a third resist pattern on the polysilicon electrode, introducing an impurity using the third resist pattern as a mask, and forming a first impurity diffusion layer on the semiconductor substrate.

The insulating film may be a SiO ₂ film or a silicon nitride film, the first silicon film may be polysilicon, and the second silicon film may be polysilicon.

In a second method of manufacturing a semiconductor device according to the present invention, a first impurity diffusion layer is formed on a semiconductor substrate, and a second impurity diffusion layer is formed adjacent to the first impurity diffusion layer. Further, in a method of manufacturing a semiconductor device in which a polysilicon electrode is connected on a second impurity diffusion layer, an oxide film is formed on the entire surface of a semiconductor substrate, and then an insulating film selectively etchable with respect to silicon is formed on the oxide film. Forming the first
A step of selectively forming a first resist pattern on the entire surface of the semiconductor substrate on which the insulating film is formed;
A third step of forming a contact hole by removing the insulating film and the oxide film using the first resist pattern of the semiconductor substrate having the resist pattern formed thereon as a mask, and a first step of forming the contact hole in the semiconductor substrate. A fourth step of introducing an impurity into the semiconductor substrate below the contact hole using the resist pattern as a mask to form a second impurity diffusion layer; and a first resist pattern of the semiconductor substrate having the second impurity diffusion layer formed thereon. After the removal, a fifth step of forming a silicon film to be a polysilicon electrode over the entire surface of the semiconductor substrate including the contact hole, and until the insulating film is exposed in a region other than the contact hole of the semiconductor substrate on which the silicon film is formed A sixth step of removing the silicon film; and removing the insulating film of the semiconductor substrate where the insulating film is exposed in a region other than the contact hole. A seventh step of forming a step between the silicon film formed in the contact hole and the oxide film under the insulating film; and removing the oxide film of the semiconductor substrate having the step formed on the entire surface to form a polysilicon electrode. A second resist pattern is selectively formed on the entire surface of the formed or stepped semiconductor substrate, and using the second resist pattern as a mask, the oxide film and the silicon film in a predetermined region are removed. An eighth step of forming a residual silicon film on the silicon electrode and the predetermined region, and thereafter removing the second resist pattern, and selectively forming a third resist pattern on the entire surface of the semiconductor substrate on which the polysilicon electrode has been formed. Forming a first impurity diffusion layer by using the third resist pattern as a mask to introduce an impurity into a predetermined position adjacent to the polysilicon electrode and the second impurity diffusion layer; That it is intended to include a method for manufacturing a semiconductor device which comprises a ninth step.

Further, in a third method of manufacturing a semiconductor device according to the present invention, a first impurity diffusion layer is formed on a semiconductor substrate.
Forming a second impurity diffusion layer adjacent to the first impurity diffusion layer and connecting a polysilicon electrode on the second impurity diffusion layer; forming an oxide film on the entire surface of the semiconductor substrate; Then, a first step of forming an insulating film selectively etchable with respect to silicon on the oxide film, and a first step on the entire surface of the semiconductor substrate on which the insulating film is formed.
A second step of selectively forming a first resist pattern; and a first step of forming a first resist pattern on the semiconductor substrate.
A third step of removing the insulating film and the oxide film by using the resist pattern as a mask to form a contact hole, and removing the first resist pattern of the semiconductor substrate in which the contact hole is formed, and then removing the semiconductor substrate including the contact hole A fourth step of forming a silicon film to be a polysilicon electrode on the entire surface; a fifth step of removing the silicon film until an insulating film is exposed in a region other than the contact hole of the semiconductor substrate on which the silicon film has been formed; A sixth step of removing the insulating film of the semiconductor substrate in which the insulating film is exposed in a region other than the hole and forming a step between the silicon film formed in the contact hole and the oxide film below the insulating film; The oxide film of the semiconductor substrate on which is formed is entirely removed to form a polysilicon electrode, or a step is formed on the entire surface of the semiconductor substrate. Alternatively, a second resist pattern is formed, and using the second resist pattern as a mask, the oxide film and the silicon film in a predetermined region are removed to form a remaining silicon film on the polysilicon electrode and the predetermined region. A seventh step of removing the second resist pattern, and then introducing an impurity into the entire surface of the semiconductor substrate on which the polysilicon electrode has been formed to form a first impurity diffusion layer in a self-aligned manner; The method includes a method of manufacturing a semiconductor device, including an eighth step of forming a second impurity diffusion layer adjacent to the first impurity diffusion layer via the first impurity diffusion layer.

[0017]

According to the first method of manufacturing a semiconductor device according to the present invention, as shown in FIG.
After the second oxide film 3 is formed on the entire surface of the semiconductor substrate 1 excluding the predetermined region, the first polysilicon film 6 and the insulating film 7 are formed, and then the region other than the region where the polysilicon electrode is formed is formed. A resist pattern 4a (first resist pattern) is formed, and the first polysilicon film 6, the insulating film 7, and the gate oxide film 3 are removed by using the resist pattern 4a as a mask. As shown in FIG. A hole is opened. Next, the resist pattern 4a
When the impurity is introduced into the contact hole by using as a mask, a second impurity diffusion layer 8a is formed as shown in FIG. Next, as shown in FIG. 2B, a second polysilicon film 9 is formed on the entire upper surface of the semiconductor substrate 1, and the insulating film 7a is formed by utilizing the difference in etching ratio between the insulating film 7a and the polysilicon. Can be used as a stopper to etch back the second polysilicon film.

Next, an insulating film 7a and a second polysilicon film 9a
By utilizing the difference in the etching ratio, only the insulating film 7a can be selectively removed. Then, as shown in FIG. 3B, the second polysilicon film 9a and the first polysilicon film 6 are formed.
Steps can be provided between the layers a by the thickness of the insulating film 7a.

Next, as shown in FIG. 3B, a resist pattern 4c is formed on the first polysilicon film 6a on the first oxide film 2.
And a resist pattern 4c (second resist pattern) is formed except for a predetermined region of the second polysilicon film 9a, and the first polysilicon film except on the first oxide film 2 is formed using the resist pattern 4c as a mask. Predetermined regions of the silicon film 6a and the second polysilicon film 9a are removed. At this time, as shown in FIG. 4A, the polysilicon 10 has a thickness obtained by adding the thickness of the insulating film 7a and the second oxide film 3 to a predetermined region.
Is formed. Next, as shown in FIG. 4B, the second oxide film 3 is removed so that the polysilicon 10 remains as the remaining polysilicon 10a. Then, the polysilicon electrode 9b can be formed without damaging the semiconductor substrate 1.

Next, a resist pattern 4d is formed on the polysilicon electrode 9b. When impurities are introduced using the resist pattern 4d as a mask, a first impurity diffusion layer 8b is formed, and a first impurity diffusion layer 8b is formed adjacent to the polysilicon electrode 9b. 1
Since the impurity introduced into the first polysilicon film 6a on the oxide film 2 diffuses into the polysilicon electrode 9b, the polysilicon electrode 9b can have conductivity.

Therefore, the first impurity diffusion layer 8b, the second impurity diffusion layer 8a and the polysilicon electrode 9b are electrically connected.

Further, according to the present invention, it is possible to preferably perform selective etching with polysilicon by using a silicon nitride film or a silicon oxide film as the insulating film.

According to the second method of manufacturing a semiconductor device according to the present invention, as shown in FIG. 6A, after an oxide film 3 and an insulating film 11 are formed on the entire surface of the semiconductor substrate 1, FIG. )
As shown in FIG. 5, a resist pattern 4a is formed in a region other than a region where a polysilicon electrode is to be formed, and the insulating film 11 and the oxide film 3 can be removed using the resist pattern 4a as a mask.

Next, when impurities are introduced using the resist pattern 4a as a mask, a second impurity diffusion layer 8a is formed. As shown in FIG. 7A, after a polysilicon film 9 is formed on the entire surface of the semiconductor substrate 1, the polysilicon film 9 is formed by utilizing the etching ratio between the polysilicon film 9 and the insulating film 11. Etchback can be performed using 11 as a stopper.

Next, when the insulating film 11 is removed by using the etching ratio of the oxide film 3 and the polysilicon 9a, the thickness of the polysilicon 9a is reduced.
Is the sum of the respective thicknesses. Next, a resist pattern 4b (second resist pattern) is formed except for a predetermined region of the oxide film 3 and the polysilicon 9a. Then, a part of the polysilicon 9a in a predetermined region and the oxidation When the film 3 is removed, the polysilicon 10a can be left in a predetermined region, so that the polysilicon electrode 9b can be formed without damaging the semiconductor substrate 1. Next, when an impurity is introduced, a first impurity diffusion layer 8b is formed as shown in FIG. 8C, and the polysilicon electrode 9b can be made conductive. As a result, the first impurity diffusion layer 8b, the first impurity diffusion layer 8a, and the polysilicon electrode 9b can be electrically connected.

Further, according to the third method of manufacturing a semiconductor device according to the present invention, as shown in FIG. 11C, an impurity is introduced into the polysilicon electrode 9b and the region where the first impurity diffusion layer 8b is to be formed. Then, the impurities introduced into first impurity diffusion layer 8b and polysilicon electrode 9b are diffused, and second impurity diffusion layer 8a is formed.
Has conductivity. As a result, the first impurity diffusion layer 8b,
Second impurity diffusion layer 8a and polysilicon electrode 9b are electrically connected.

[0027]

Embodiments of the present invention will be described below with reference to the drawings.

FIGS. 1 to 5 are sectional views showing a buried contact forming step according to a first embodiment of the present invention.

In order to form a buried contact according to the present invention, first, as shown in FIG. 1A, after a field oxide film 2 is formed to a thickness of several hundred nm on a silicon substrate 1 by an isolation method. Thermal oxidation is performed to form a gate oxide film 3 with a thickness of 10 nm.

Next, as shown in FIG. 1A, a polysilicon film 6 as a first polysilicon film is formed to a thickness of 100 nm over the entire surface of the silicon substrate 1 by CVD (chemical vapor deposition). . Next, as shown in FIG. 1B, an S film as an insulating film is formed on the polysilicon film 6 by a CVD method.
An iO ₂ film 7 is formed to a thickness of 100 nm.

Next, as shown in FIG. 1C, a resist pattern 4 is formed in a region other than a region where a polysilicon electrode is to be formed.
is formed, and using this resist pattern 4a as a mask, SiO ₂ is formed by RIE (reactive ion etching).
The film 7 and the polysilicon film 6 are removed, a contact hole is opened, and a SiO ₂ film 7 is formed around the contact hole.
a and a polysilicon film 6a are formed (FIG. 2A).
Next, an N-type impurity is ion-implanted using the resist pattern 4a as a mask to form an N-type impurity diffusion layer 8a as a second impurity diffusion layer. It is needless to say that impurity introduction is not limited to ion implantation, and the same applies to impurity introduction described later.

Next, after removing the resist pattern 4a,
As shown in FIG. 2B, polysilicon is deposited by a CVD method to a thickness that completely fills the contact hole, thereby forming a gate polysilicon film 9 as a second polysilicon film. Next, the gate polysilicon film 9 is removed until the surface of the SiO ₂ film 7a appears, thereby forming a gate polysilicon film 9a as shown in FIG. The gate polysilicon film 9 is removed by removing the gate polysilicon film 9 and SiO _2.
Utilizing the etching ratio of the film 7a, the etching can be performed using an etch-back method by RIE.

[0033] Then, as shown in FIG. 3 (b), SiO ₂ film 7
is removed by wet etching, an SiO ₂ film 7 is interposed between the gate polysilicon film 9a and the polysilicon film 6a.
A step is formed by the thickness of a.

Next, as shown in FIG. 3B, a portion of the first polysilicon film above the field oxide film 2 as the first oxide film and a portion of the gate polysilicon film 9a as the second silicon film. A resist pattern 4c is formed in a portion excluding a predetermined range from the end side opposite to the field oxide film 2 side, and as shown in FIG. 4A, a predetermined region is formed by RIE using the resist pattern 4c as a mask. Gate polysilicon film 9a and polysilicon film 6a on gate oxide film 3
Is removed, the polysilicon electrode 9b and the polysilicon 10 having a predetermined region width are formed outside the polysilicon electrode 9b.
Remain in a thickness obtained by adding the respective thicknesses of the SiO ₂ film 7a and the gate oxide film 3.

Next, as shown in FIG. 4B, a portion of the polysilicon 10 and the gate oxide film 3 are removed at an etching ratio in which the polysilicon 10 remains as the remaining polysilicon 10a, and then the resist pattern 4c is removed. I do.

Next, as shown in FIG. 4B, a resist pattern 4d is formed on the polysilicon electrode 9b, and N-type impurities are ion-implanted using the resist pattern 4d as a mask. Type impurity diffusion layer 8
b is formed.

The impurity and N-type impurity diffusion layer 8a implanted in the polysilicon film 6a on the field oxide film 2 are formed.
Is diffused into the polysilicon electrode 9b, and the polysilicon electrode 9b becomes conductive.

Next, as shown in FIG.
When d is removed, the N-type impurity diffusion layer 8b, the N-type impurity diffusion layer 8a, and the polysilicon electrode 9b are electrically connected.

In this embodiment, the SiO ₂ film is used as the insulating film, but a silicon nitride film can be used.

Next, FIGS. 6 to 8 are cross-sectional views in a buried contact forming step showing the second embodiment.

In this embodiment, first, as shown in FIG. 6A, after forming a field oxide film 2 and a gate oxide film 3 on a silicon substrate 1, a silicon nitride film 11 as an insulating film is formed by a CVD method. I do.

Next, as shown in FIG. 6B, a resist pattern 4a is formed in a region other than a region where a polysilicon electrode is to be formed.
Then, as shown in FIG. 6C, the silicon nitride film 11 and the gate oxide film 3 are patterned using the resist pattern 4a as a mask to form the gate oxide film 3 and the silicon nitride film 11a. Next, as shown in FIG. 6C, N-type impurities are ion-implanted using the resist pattern 4a as a mask, and an N-type impurity diffusion layer 8 as a second impurity diffusion layer is formed.
a is formed.

Next, as shown in FIG. 7A, a gate polysilicon film 9 is formed by CVD so as to have a thickness such that the surface thereof is substantially flat. Next, utilizing the etching ratio between the silicon nitride film 11a and the gate polysilicon film 9,
As shown in FIG. 7B, the gate polysilicon film 9 is etched back by RIE until the surface of the silicon nitride film 11a appears, and a gate polysilicon film 9a is formed in a region where a polysilicon electrode is to be formed.

Next, as shown in FIG. 7C, when the silicon nitride film 11a is removed, a step occurs between the gate polysilicon film 9a and the gate oxide film 3. Next, as shown in FIG. 8A, when the gate oxide film 3 is removed, a polysilicon electrode 9b is formed. At this time, the gate polysilicon film 9
forming a resist pattern about 0.1 μm inside a,
Using this resist pattern as a mask, as shown in FIG. 4B, the gate oxide film 3 and a part of the gate polysilicon film 9a are formed into R so that the remaining polysilicon 10a is formed.
It may be removed by IE.

Next, as shown in FIG. 8B, after a resist pattern 4b is formed, an N-type impurity is ion-implanted using the resist pattern 4b as a mask, thereby forming an N-type impurity diffusion layer as a first impurity diffusion layer. 8b are formed, and the polysilicon electrode 9b has conductivity. Then, FIG.
As shown in (c), the N-type impurity diffusion layer 8b, the N-type impurity diffusion layer 8a, and the polysilicon electrode 9b are electrically connected.

Next, FIGS. 9 to 11 are sectional views showing a buried contact forming process according to a third embodiment.

In this embodiment, a field oxide film 2 and a gate oxide film 3 are first formed as shown in FIG. 9A, and then a silicon nitride film 11 is formed by a CVD method.

Next, as shown in FIG. 9B, a resist pattern 4a is formed in a region other than the region where the polysilicon electrode is to be formed.
Then, as shown in FIG. 9C, the silicon nitride film 11 and the gate oxide film 3 are patterned using the resist pattern 4a as a mask to form the gate oxide film 3 and the silicon nitride film 11a.

Next, as shown in FIG. 10A, a gate polysilicon film 9 is formed by a CVD method to a thickness such that the surface thereof is substantially flat. Next, the silicon nitride film 11a
The gate polysilicon film 9 is etched back until the surface of FIG. 3A appears, and a gate polysilicon film 9a is formed as shown in FIG. Next, as shown in FIG. 10C, the silicon nitride film 11a is removed.

Next, as shown in FIG. 11A, when the gate oxide film 3 is removed by wet etching, a polysilicon electrode 9b is formed. At this time, a resist pattern is formed about 0.1 μm inside the gate polysilicon film 9a, and the resist pattern is used as a mask in FIG.
As shown in (b), a part of the gate polysilicon film 9a and the gate oxide film 3 may be removed by RIE so that a part of the gate polysilicon film 9a remains as the remaining polysilicon 10a.

Next, as shown in FIG. 11B, when an N-type impurity is ion-implanted using the polysilicon electrode 9b as a mask, an N-type impurity diffusion layer 8a as a first impurity diffusion layer is formed. Implanted polysilicon electrode 9b
Has conductivity. Further, the impurities implanted into polysilicon electrode 9b diffuse into silicon substrate 1, and an N-type impurity diffusion layer 8a as a second impurity diffusion layer is formed.

As a result, N-type impurity diffusion layer 8b, N-type impurity diffusion layer 8a, and polysilicon electrode 9b are electrically connected.

[0053]

As described above, according to the first method of manufacturing a semiconductor device of the present invention, the insulating film which can be selectively etched with respect to the silicon film is formed over the entire surface of the semiconductor substrate on which the silicon film is formed. Forming a film, then forming a contact hole, forming a second impurity diffusion layer in the semiconductor substrate, and forming a second silicon film to be a polysilicon electrode to form a second silicon film A semiconductor substrate in which the entire surface of the second silicon film is removed until an insulating film under the second silicon film is exposed in a region other than the contact hole of the semiconductor substrate, and the insulating film is exposed in a region other than the contact hole Forming a step between the second silicon film formed in the contact hole and the first silicon film on the second oxide film by removing the insulating film on the semiconductor film; It is such as to form on the whole surface selectively the second resist pattern plate. With this configuration,
Since the polysilicon electrode and the impurity diffusion layer can be connected without scraping the silicon substrate, the leakage current between the impurity diffusion layer and the silicon substrate can be suppressed, and at the same level as a conventional buried contact. Therefore, the contact area can be reduced. Further, according to the second method of manufacturing a semiconductor device of the present invention, an oxide film is formed on the entire surface of a semiconductor substrate, and thereafter, an insulating film that can be selectively etched with respect to silicon is formed on the oxide film. Forming a resist pattern, forming a contact hole, forming a second impurity diffusion layer, and forming a silicon film to be a polysilicon electrode. The silicon film is removed until the insulating film is exposed in a region other than the contact hole of the semiconductor substrate, and the insulating film of the semiconductor substrate where the insulating film is exposed in the region other than the contact hole is formed in the contact hole. A step is formed between the formed silicon film and the oxide film below the insulating film. With this configuration, the polysilicon electrode and the impurity diffusion layer can be connected without scraping the silicon substrate, so that the leak current between the impurity diffusion layer and the silicon substrate can be suppressed, and the conventional embedded The contact area can be reduced to the same extent as the contact. Further, according to the third method of manufacturing a semiconductor device of the present invention, an oxide film is formed on the entire surface of the semiconductor substrate, and then an insulating film that can be selectively etched with respect to silicon is formed on the oxide film. Through a step of selectively forming a resist pattern, a step of forming a contact hole, and a step of forming a silicon film to be a polysilicon electrode, the insulating is performed in a region other than the contact hole of the semiconductor substrate on which the silicon film is formed. The silicon film is removed until the film is exposed, and the insulating film of the semiconductor substrate where the insulating film is exposed in a region other than the contact hole is removed, and the silicon film formed in the contact hole and the oxide film under the insulating film are removed. To form a step between them. With this configuration, the polysilicon electrode and the impurity diffusion layer can be connected without scraping the silicon substrate, so that the leak current between the impurity diffusion layer and the silicon substrate can be suppressed, and the conventional embedded The contact area can be reduced to the same extent as the contact.

[Brief description of the drawings]

FIG. 1 is a sectional view (part 1) of a buried contact forming step shown in a first embodiment.

FIG. 2 is a sectional view (part 2) of a buried contact forming step shown in the first embodiment.

FIG. 3 is a sectional view (part 3) of a buried contact forming step shown in the first embodiment;

FIG. 4 is a sectional view (part 4) of a buried contact forming step shown in the first embodiment.

FIG. 5 is a sectional view (part 5) of a buried contact forming step shown in the first embodiment;

FIG. 6 is a sectional view (part 1) of a buried contact forming step shown in a second embodiment.

FIG. 7 is a sectional view (part 2) of a buried contact forming step shown in the second embodiment.

FIG. 8 is a sectional view (part 3) of a buried contact forming step shown in the second embodiment.

FIG. 9 is a sectional view (part 1) of a buried contact forming step shown in a third embodiment.

FIG. 10 is a sectional view (part 2) of a buried contact forming step shown in the third embodiment.

FIG. 11 is a sectional view (part 3) of a buried contact forming step shown in the third embodiment;

FIG. 12 is a sectional view of a buried contact forming step (part 1) according to a conventional example.

FIG. 13 is a sectional view of a buried contact forming step (part 2) according to a conventional example.

[Explanation of symbols]

Reference Signs List 1 silicon substrate 2 field oxide film (first oxide film) 3 gate oxide film (second oxide film) 4a, 4b, 4c, 4d, 14a, 14b resist pattern 6, 6a polysilicon film (first polysilicon film) 7 , 7a SiO ₂ film 8a N-type impurity diffusion layer (second impurity diffusion layer) 8b N-type impurity diffusion layer (first impurity diffusion layer) 18a, 18b N-type impurity diffusion layer 9, 9a Gate polysilicon film (second polysilicon) 9b polysilicon film 10 polysilicon 10a residual polysilicon 11, 11a silicon nitride film

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/28-21/288 H01L 21/44-21/445 H01L 29/40-29/43 H01L 29 / 47 H01L 29/872 H01L 21/3205 H01L 21/3213 H01L 21/768

Claims (7)

(57) [Claims] 1. A first impurity diffusion layer is formed in a semiconductor substrate, a second impurity diffusion layer is formed adjacent to the first impurity diffusion layer, and a polysilicon electrode is further connected on the second impurity diffusion layer. In the method for manufacturing a semiconductor device, a predetermined region of the semiconductor substrate is selectively oxidized to form a first oxide film, and thereafter, the semiconductor substrate is thermally oxidized to a region other than the first oxide film. A first step of forming a second oxide film, and further forming a first silicon film serving as the polysilicon electrode over the entire surface of the semiconductor substrate covered with the first oxide film and the second oxide film; Forming an insulating film selectively etchable with respect to the silicon film on the entire surface of the semiconductor substrate on which the insulating film is formed; and selectively forming the first film on the entire surface of the semiconductor substrate on which the insulating film is formed. Form resist pattern Using the first resist pattern as a mask, at least the insulating film on a predetermined region where the first oxide film and the second oxide film are adjacent to each other;
A third step of forming a contact hole by removing the first silicon film and the second oxide film; and a first step of forming a contact hole on the semiconductor substrate on which the contact hole is formed.
Forming a second impurity diffusion layer on the semiconductor substrate by introducing an impurity using the resist pattern as a mask; and forming a first impurity diffusion layer on the semiconductor substrate on which the second impurity diffusion layer is formed.
A fifth step of removing the resist pattern, and thereafter forming a second silicon film serving as the polysilicon electrode on the entire surface of the semiconductor substrate including the contact hole; and excluding the contact hole of the semiconductor substrate on which the second silicon film is formed. A sixth step of removing the entire surface of the second silicon film until the insulating film under the second silicon film is exposed in a region of the semiconductor substrate; Removing the insulating film, forming a step between the second silicon film formed in the contact hole and the first silicon film on the second oxide film, and then forming a step on the entire surface of the semiconductor substrate on which the step is formed; A seventh step of selectively forming a second resist pattern; a first silicon film other than on the first oxide film of the semiconductor substrate on which the second resist pattern is formed; An eighth step of selectively removing the second silicon film on a predetermined region of the second impurity diffusion layer to form a polysilicon electrode including the remaining second silicon film on the second impurity diffusion layer; After removing the second resist pattern on the semiconductor substrate on which the polysilicon electrode including the remaining second silicon film has been formed, a third resist pattern is formed on the polysilicon electrode, and the third resist pattern is removed. A method of manufacturing a semiconductor device, comprising: a ninth step of introducing an impurity as a mask to form the first impurity diffusion layer on the semiconductor substrate. 2. The method according to claim 1, wherein said insulating film is a SiO ₂ film. 3. The method according to claim 1, wherein the insulating film is a silicon nitride film. 4. The method according to claim 1, wherein said first silicon film is made of polysilicon. 5. The method according to claim 1, wherein said second silicon film is made of polysilicon. 6. A first impurity diffusion layer is formed on a semiconductor substrate, a second impurity diffusion layer is formed adjacent to the first impurity diffusion layer, and a polysilicon electrode is connected on the second impurity diffusion layer. A method of manufacturing a semiconductor device, comprising: forming an oxide film on the entire surface of the semiconductor substrate; and thereafter, forming an insulating film on the oxide film that can be selectively etched with respect to silicon; and forming the insulating film. A second step of selectively forming a first resist pattern on the entire surface of the formed semiconductor substrate; and using the first resist pattern of the semiconductor substrate on which the first resist pattern is formed as a mask to form the insulating film and the insulating film. A third step of removing the oxide film and forming a contact hole, and using the first resist pattern of the semiconductor substrate in which the contact hole has been formed as a mask to remove impurities from the semiconductor substrate. A fourth step of introducing the second impurity diffusion layer into the semiconductor substrate below the contact hole, and removing the first resist pattern of the semiconductor substrate on which the second impurity diffusion layer is formed. A fifth step of forming a silicon film to be the polysilicon electrode over the entire surface of the semiconductor substrate including: forming the silicon film until the insulating film is exposed in a region other than the contact hole of the semiconductor substrate on which the silicon film is formed. A sixth step of removing; removing the insulating film of the semiconductor substrate in which the insulating film is exposed in a region other than the contact hole; and removing the insulating film between the silicon film formed in the contact hole and the oxide film below the insulating film. A seventh step of forming a step on the semiconductor substrate; and removing the entire oxide film of the semiconductor substrate on which the step is formed to form the polysilicon electrode. A second resist pattern is selectively formed on the entire surface of the semiconductor substrate having the step formed thereon, and the oxide film and the silicon film in a predetermined region are removed by using the second resist pattern as a mask; An eighth step of forming a residual silicon film on the silicon electrode and the predetermined area, and thereafter removing the second resist pattern; and forming a third resist pattern on the entire surface of the semiconductor substrate on which the polysilicon electrode is formed. Selectively forming and using the third resist pattern as a mask, introducing an impurity into a predetermined position adjacent to the polysilicon electrode and the second impurity diffusion layer to form the first impurity diffusion layer. 9
A method for manufacturing a semiconductor device, comprising the steps of: 7. A first impurity diffusion layer is formed on a semiconductor substrate, a second impurity diffusion layer is formed adjacent to the first impurity diffusion layer, and a polysilicon electrode is connected on the second impurity diffusion layer. A method of manufacturing a semiconductor device, comprising: forming an oxide film on the entire surface of the semiconductor substrate; and thereafter, forming an insulating film on the oxide film that can be selectively etched with respect to silicon; and forming the insulating film. A second step of selectively forming a first resist pattern on the entire surface of the formed semiconductor substrate; and using the first resist pattern of the semiconductor substrate on which the first resist pattern is formed as a mask to form the insulating film and the insulating film. A third step of removing an oxide film and forming a contact hole; and removing the first resist pattern of the semiconductor substrate in which the contact hole is formed. Forming a silicon film to be the polysilicon electrode on the entire surface of the semiconductor substrate including the silicon film; and forming the silicon film until the insulating film is exposed in a region other than the contact hole of the semiconductor substrate on which the silicon film is formed. A fifth step of removing the film; removing the insulating film of the semiconductor substrate in which the insulating film is exposed in a region other than the contact hole; and removing a silicon film formed in the contact hole and an oxide film below the insulating film. A sixth step of forming a step between the steps; and removing the oxide film of the semiconductor substrate having the step formed thereon to form the polysilicon electrode, or selecting the entire surface of the semiconductor substrate having the step formed therein. Forming a second resist pattern, using the second resist pattern as a mask, removing the oxide film and the silicon film in a predetermined region; A seventh step of forming a residual silicon film on the polysilicon electrode and the predetermined region, and thereafter removing the second resist pattern; and introducing an impurity into the entire surface of the semiconductor substrate on which the polysilicon electrode is formed; An eighth step of forming the first impurity diffusion layer in a consistent manner and forming the second impurity diffusion layer adjacent to the first impurity diffusion layer via the polysilicon electrode and the first impurity diffusion layer; A method for manufacturing a semiconductor device, comprising: