JP3169350B2 - Packet transmission system and packet transmission method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a packet transmission system and a packet transmission method for converting data into packets of equal length, and more particularly to a method of using a plurality of lines when the required transmission capacity cannot be obtained. And bulk transmission for performing packet transmission.

[0002]

2. Description of the Related Art In recent years, data communication for packetizing and transmitting media data such as video and audio has been widespread due to the development of digital compression coding. When performing these packet transmissions, the transmission capacity required for video packets is large, so that the capacity of the conventional transmission path may be insufficient. In such a case, the transmission capacity generally allocated to the video is often reduced, and in this case, the deterioration of the transmitted video is inevitable.

On the other hand, even when the transmission capacity of a line is insufficient, when a plurality of low-rate lines can be prepared, there has been a method of performing bulk transmission using these transmission lines in a bundle. FIG. 12 is a configuration diagram on the transmission side of a conventional packet transmission system performing bulk transmission, FIG. 13 is a configuration diagram on the reception side, and FIG. 14 shows a frame format applied in the conventional bulk transmission.

In FIG. 12, reference numeral 22 denotes transmission data, 18
Is a rate conversion means for performing a rate conversion such as a clock accompanying frame synchronization and insertion of a frame number (see FIG. 14) described later, 19 is a rate conversion control means for controlling the rate conversion, and 20 is a frame synchronization. Frame synchronization insertion means for insertion, 21 is a frame number insertion means for inserting a frame number, 7 is a transmission interface with a communication line, and 23 is a transmission frame (communication line).

In FIG. 13, reference numeral 8 denotes a transmission interface with a communication line, 9 denotes frame synchronization detecting means for detecting frame synchronization, 10 denotes frame number separating means for separating frame numbers, 11 denotes memory, and 12 denotes memory control means. , And 24 are received data.

[0006] In these systems, in order to absorb the line delay difference in the case of transmission over a plurality of lines, the bulk transmission corresponding to the two lines shown in FIG. Is assigned to the payload,
The transmission frame is formed and transmitted by adding the frame synchronization and the frame number to the payload.

On the receiving side of the bulk transmission shown in FIG. 13, the frame number separating means 10 is used for each of the two lines.
Separates the frame numbers. Memory control means 1
2 performs writing in transmission frame units, and compares two separated frame numbers to obtain a time difference between the two, and the maximum delay correctable time in which the time difference corresponds to half of the cycle of a multi-frame in which this frame number makes one round. Can be detected. The memory control unit 12 alternately reads the packets of the transmission frame having the same frame number, thereby making it possible to match the phases of the data to be read. Thus, the two data are superimposed, and the original transmission data 22 Is obtained as received data 24.

[0008] In the case of a bidirectional transmission system in which the PARQUE transmission is performed, the frame synchronization and the frame number are transmitted only at the start of the operation and the transmission side or the reception side is performed only at the start of the operation in order to reduce the additional overhead such as the frame synchronization. There is also a method in which phase adjustment is performed, and after phase adjustment is completed, overhead such as frame synchronization from the transmission side is removed and transmission is performed.
However, in this case, when an error occurs in the transmission line, the phase cannot be re-established immediately, and furthermore, the one-way transmission system cannot cope with the error.

[0009]

The conventional packet transmission system for performing bulk transmission is configured as described above, and includes frame synchronization and frame number added to match the phases of data received from a plurality of transmission paths. Causes overhead and transmission efficiency is reduced. In addition, there is a problem that the rate conversion of the input clock and the output clock accompanying the frame synchronization and the insertion of the frame number is required, and the processing becomes complicated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and realizes bulk transmission without adding overhead, and simplifies processing by eliminating a rate conversion process associated with addition of overhead. It is another object of the present invention to provide a packet transmission system and a packet transmission method that can add a user data transmission function and an error correction function.

[0011]

SUMMARY OF THE INVENTION In view of the above objects, the present invention is a packet transmission system for dividing a continuous stream of equal length packets into a plurality of transmission frames and transmitting data over a plurality of communication lines. , The packet transmitting side converts the packet to be transmitted into the transmission frame m
A packet counting means for counting in units of packets, a timing generating means for outputting a frame synchronization insertion timing, a frame number insertion timing and a memory control timing according to a packet position outputted from the packet counting means, and a frame synchronization from the timing generation means Frame synchronization allocating means for replacing the packet synchronization part with frame synchronization at m packet periods according to the insertion timing, and frame number for replacing the packet synchronization part after the frame synchronization with all or part of the frame number according to the frame number insertion timing from the timing generation means Allocating means; write control of a packet to be transmitted in accordance with memory control timing from the timing generating means so as to be distributed to the plurality of communication circuits;
A memory control means for performing read control in units of a frame of a packet length, a memory means controlled by the memory control means, and a plurality of transmission interfaces connected between the memory means and each communication circuit; The receiving side includes: a transmission interface for each communication circuit that receives data from the communication circuit; frame synchronization detection means for detecting frame synchronization from data output from these transmission interfaces; and Frame number separating means for separating a frame number; memory controlling means for controlling writing to a memory and reading in the order of frame numbers in units of the separated frames; memory means operating in accordance with the memory controlling means; The frame sync part of the emitted frame A packet synchronization adding means for replacing the frame number portion to the packet synchronization, the packet transmission system characterized in that a certain.

Further, according to the present invention, the packet transmitting side is provided with user data inserting means for inserting user data into a packet synchronization portion in accordance with the timing from the timing generating means, and the packet receiving side is provided with a user data separating means for separating user data. Means for providing packet synchronization, wherein said packet synchronization adding means inserts packet synchronization into a portion where user data is separated.

Further, according to the present invention, the packet transmitting side includes:
The frame number assigning means replaces the next n packet synchronizations after the packet synchronization replaced with the frame synchronization with all or a part of the frame number in accordance with the timing from the timing generation means, and the memory control means Control not to write the packet synchronization part after the frame synchronization and the packet synchronization replaced with n frame numbers according to the timing from the means,
Further, an error correction addition means for adding an error correction code to the end of the frame continuously read out from the memory means is provided, and the packet receiving side has an error correction code added to the frame after the frame synchronization detection. An error correction means for performing correction is provided in the packet transmission system.

The present invention is also characterized in that the memory control means on the packet transmitting side performs a read control for arranging a frame synchronization at a head of a frame and immediately thereafter arranging a frame number of the frame. It is in.

Further, according to the present invention, the memory control means on the packet transmitting side controls the transmission frame length according to the line frame length by outputting packet data corresponding to the line frame of the communication line to be used. There is provided a packet transmission system.

The present invention is also a packet transmission method for dividing a continuous stream of equal length packets into a plurality of transmission frames and transmitting data over a plurality of communication lines.
At the time of packet transmission, a step of counting packets to be transmitted in units of m constituting the transmission frame, a step of generating a frame synchronization insertion timing, a frame number insertion timing, and a memory control timing according to the counted packet position; Replacing the packet synchronization part with all or part of the frame synchronization at m packet periods according to the frame synchronization insertion timing, replacing the packet synchronization part with the frame number after the frame synchronization according to the frame number insertion timing, Writing a packet to be transmitted in accordance with the memory control timing, and reading out the packet in units of m-packet-length frames. Detecting the frame synchronization, separating the frame numbers in accordance with the detected frame synchronization, writing the data to the memory in units of the separated frames, and reading out the frames in the order of the frame numbers. Replacing the frame synchronization part and the frame number part of the obtained frame with packet synchronization.

Further, the present invention includes a step of inserting user data into a packet synchronization portion in accordance with the timing when transmitting a packet, and a step of separating user data when receiving a packet. A packet transmission method is characterized in that packet synchronization is inserted into a portion where user data is separated.

In the present invention, at the time of transmitting the packet, in the step of replacing with the frame number, the next n packet synchronizations after the packet synchronization replaced with the frame synchronization are replaced with all or a part of the frame number in accordance with the timing, In the writing and reading steps, the frame synchronization and the packet synchronization part after the packet synchronization replaced with n frame numbers are not written in accordance with the timing, and an error correction code is added to the end of the continuously read frame. And a step of performing error correction on the frame by the error correction code added to the frame after the detection of the frame synchronization when the packet is received.

Further, the present invention provides a packet transmission method characterized in that, in the writing and reading steps at the time of transmitting the packet, read control is performed in which a frame synchronization is arranged at the head of the frame and a frame number of the frame is arranged immediately after that. It is in.

Further, according to the present invention, at the time of transmitting the packet, in the writing and reading steps, the packet data is output in accordance with the line frame of the communication line to be used, so that the transmission frame length is controlled in accordance with the line frame length. A packet transmission method is characterized in that:

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A packet transmission system and a packet transmission method according to the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a block diagram of a transmitting side of a packet transmission system for performing bulk transmission of equal length packets using, for example, two lines according to an embodiment of the present invention, FIG. 2 is a block diagram of a receiving side, and FIG. 2 shows a frame format applied in bulk transmission according to this embodiment. In the figure, the same or corresponding parts as those of the conventional one are denoted by the same reference numerals.

On the packet transmitting side of FIG. 1, 1 is a packet counting means for counting the packets of the transmission data 22 in m units, 2 is a frame synchronization insertion timing, a frame number according to a packet position outputted from the packet counting means 1. Timing generating means for outputting insertion timing and memory control timing; 3 means frame synchronizing allocating means for replacing the packet synchronous part with frame synchronizing at m packet periods in accordance with the frame synchronous inserting timing from the timing generating means 2; Frame number assigning means for replacing the packet synchronization part with a frame number according to the frame number insertion timing from 2.

Reference numeral 6 designates distribution to a plurality of communication circuits (transmission frames 23) to perform writing control of packets to be transmitted in accordance with the memory control timing from the timing generation means 2 and read control in frame units of m packet length. The memory control means 5 and the memory control means 6
, A plurality of transmission interfaces connected between the memory 5 and each communication circuit.

On the packet receiving side of FIG. 2, reference numeral 8 denotes a plurality of transmission interfaces for each communication circuit for receiving data from the communication circuit, and 9 denotes a frame for detecting frame synchronization from data output from these transmission interfaces 8, respectively. Synchronization detecting means 10 is a frame number separating means for separating frame numbers in accordance with the detected frame synchronization, 12 is a memory controlling means for controlling writing to a memory in units of separated frames, and reading in the order of frame numbers, and 11 is a memory for this memory. A memory (memory means) 13 operated according to the control means 12 is a packet synchronization adding means for replacing the frame synchronization part and the frame number part of the frame read from the memory 11 with packet synchronization.

The packetized transmission data 22 input to the transmission side in FIG. 1 is converted by the packet counting means 1 into the number m of packets constituting the transmission frame shown in FIG.
Count the pieces. The timing generation means 2 generates timing from the counted packet positions, and controls the frame synchronization allocating means 3, the frame number allocating means 4, and the memory control means 6.

The frame synchronization allocating means 3 replaces the packet synchronization part at the head of the transmission frame shown in FIG. 3 with the frame synchronization of the transmission frame. The frame number assigning means 4 replaces the second and subsequent packet synchronization portions of the transmission frame shown in FIG. 3 with the frame number of the transmission frame. The data in which the packet synchronization portion has been rewritten is written in the memory 5, separated into two transmission frames by the read control of the memory control means 6, and output to the respective communication lines (23) through the two transmission interfaces 7.

The frame number assigned by the frame number assigning means 4 is set to 0, 0, 1, 1, 2, 2, or 2, ... or 0,1,2, ...
, M, 0, 1, 2,..., M.

The two transmission frames 23 input to the receiving side in FIG. 2 are input as the transmission frames shown in FIG. The frame number added to the transmission frame is counted up from 0 to 255, and forms one multi-frame. The frame synchronization detecting means 9 detects the input frame synchronization. The frame number separating means 10 outputs the frame number of the transmission frame from the frame synchronization timing to the memory control means 12.

The memory control means 12 writes data to the memory 11 in transmission frame units, further compares the two frame numbers input from the frame number separation means 10 to obtain a phase difference, and reads the packet read from the memory 11 Reading is performed alternately so that the order is the same as that at the time of transmission. The frame synchronization portion and the frame number portion of the packet read as one stream are replaced by packet synchronization by the packet synchronization adding means 13 and the packet is output.

In the above-described embodiment, one frame number is assigned to one packet synchronization. However, one frame number may be assigned to a plurality of packet synchronizations. The frame period can be lengthened, and the maximum detectable arrival time difference (maximum delay correctable time) can be lengthened.

In the above embodiment, the case where two communication lines are used has been described. However, the present invention can be applied to a case where there are two or more lines.

As described above, in this embodiment, the packet transmitting side counts the packets constituting the transmission frame, and sets the packet synchronization portion of the first packet of the plurality of packets constituting the transmission frame to the frame synchronization of the transmission frame. The packet synchronization portion of the packet after the assignment is assigned to a frame number, and transmission is performed in units of transmission frames from a plurality of communication lines. On the packet receiving side, data in units of transmission frames received from the plurality of communication lines is transmitted in a transmission packet. The order is rearranged so that the order is the same as that at the time of transmission, and the frame synchronization part and the frame number part are replaced with packet synchronization to return to the original data. Frame synchronization and frame numbers required for framing for such bulk transmission are allocated without increasing overhead.

Embodiment 2 FIG. FIG. 4 is a configuration diagram on the transmission side of a packet transmission system for performing bulk transmission of equal length packets according to another embodiment of the present invention, FIG. 5 is a configuration diagram on the reception side, and FIG. 3 shows a frame format applied in bulk transmission. In the figure, the same or corresponding parts as those in the above embodiment are denoted by the same reference numerals.

In FIG. 4, 14 is user data insertion means, 24 is user data, and in FIG. 5, 15 is user data separation means and 25 is user data.

The user data 24 input to the packet transmitting side in FIG.
As shown in (1), the packet is allocated to the packet synchronization part after the n packets replaced with the frame number of the transmission frame and transmitted.

On the packet receiving side in FIG. 5, the memory control means 12 outputs the timing of the portion corresponding to the packet synchronization in which the user data is multiplexed (duplicated). The user data separating means 15 outputs the user data 25
Is output separately. The packet synchronization adding means 13 adds packet synchronization according to the timing of the portion corresponding to the packet synchronization in which the user data from the memory control means 12 is multiplexed (duplicated).

As described above, in this embodiment, the user data insertion means 14 is provided on the transmission side, and the user data separation means 15 is provided on the reception side. Multiplex data
(Duplicate) can be sent.

Embodiment 3 FIG. 7 is a block diagram of a transmitting side of a packet transmission system for performing bulk transmission of equal length packets according to still another embodiment of the present invention, FIG. 8 is a block diagram of a receiving side, and FIG. 1 shows a frame format applied in the bulk transmission of the above. In the drawings, the same or corresponding parts as those of the above embodiments are denoted by the same reference numerals.

In FIG. 7, reference numeral 16 denotes error correction adding means, and in FIG. 8, reference numeral 17 denotes error correction means.

The transmission frame on the packet transmitting side in FIG.
The data is read from the memory 5 with the configuration shown in FIG. That is, when replacing the frame number with the frame number, the frame number assigning unit 4 replaces the next n packet synchronizations after the packet synchronization replaced with the frame synchronization with the frame number, and the memory control unit 6 replaces the frame synchronization with the frame synchronization and the n frame numbers. The error correction adding means 16 is added to the end of the transmission frame without writing the packet synchronization portion after the packet synchronization.
Adds an ECC (error correction code). On the packet receiving side in FIG. 8, error correction is performed for each transmission frame received by the error correction means 17.

As described above, in this embodiment, the error correction adding means 16 is provided on the transmission side, and the error correction means 17 is provided on the reception side. Error correction function can be provided.

Embodiment 4 FIG. 10 shows a frame format applied in bulk transmission of a packet transmission system for performing bulk transmission of equal length packets according to still another embodiment of the present invention.

In this embodiment, for example, the first embodiment
In the packet transmission side of FIG. 1, the memory control means 6 arranges the frame synchronization from the memory 5 to the head of the frame as shown in FIG. 10, and immediately after that, the format is such that the frame number of the frame is arranged. It performs read control and outputs packet data. On the packet receiving side in FIG. 2, the frame number is separated by the frame number separating means 10 immediately after the frame synchronization is detected, and the memory control means 12 performs a phase comparison.

This embodiment is also applicable to the third embodiment.

As described above, in this embodiment, the frame synchronization is arranged at the beginning of the frame, and immediately after that, one frame number for a plurality of payloads is arranged, so that the frame number is large. In this case, the synchronization detection process on the receiving side can be shortened.

Embodiment 5 FIG. FIG. 11 shows a frame format applied in bulk transmission of a packet transmission system for performing bulk transmission of equal-length packets according to still another embodiment of the present invention.

In this embodiment, for example, the first embodiment
On the packet transmitting side in FIG. 1, the memory control means 6 outputs packet data matched with the transmission interface 7, that is, the line frame of the communication line (23), from the memory 5 so that the format shown in FIG. . On the packet receiving side in FIG.
The position of the line frame detected in step (1) becomes the position of the transmission frame as it is, and the frame synchronization detecting means 9 can be omitted.

This embodiment is also applicable to other embodiments.

As described above, in this embodiment, the length of the transmission frame is adjusted to the length of the line frame of the communication line used for transmission. Can be omitted.

In each of the above embodiments, the case where two communication lines are used has been described. However, the present invention can be applied to a case where bulk transmission is performed using three or more communication lines, and similar effects can be obtained. can get.

[0051]

As described above, according to the present invention, there is provided a packet transmission system for dividing a continuous stream of equal length packets into a plurality of transmission frames and transmitting data through a plurality of communication lines. Packet counting means for counting packets to be transmitted in units of m units constituting the transmission frame, and timing generation for outputting frame synchronization insertion timing, frame number insertion timing, and memory control timing according to the packet position output from the packet counting means Means, frame synchronization allocating means for replacing the packet synchronization part with frame synchronization at m packet periods in accordance with the frame synchronization insertion timing from the timing generation means, and packet synchronization after frame synchronization in accordance with the frame number insertion timing from the timing generation means. Frame number allocating means for replacing a packet synchronization part with a frame number; writing control of a packet to be transmitted according to memory control timing from the timing generating means so as to be distributed to the plurality of communication circuits; A memory control unit for performing read control in units; a memory unit controlled by the memory control unit; and a plurality of transmission interfaces connected between the memory unit and each communication circuit. A transmission interface for each communication circuit that receives data from the communication circuit, frame synchronization detection means for detecting frame synchronization from data output from these transmission interfaces, and a frame number separating each according to the detected frame synchronization Frame number separating means, Memory control means for controlling writing to a memory and reading in the order of frame numbers in units of separated frames; memory means operating according to the memory control means; a frame synchronization portion and a frame number portion of a frame read from the memory means Packet synchronization adding means for replacing
Thus, bulk transmission can be realized without adding overhead, and simplified packet data transmission that does not require a rate conversion process related to addition of overhead is realized. Similar effects can be obtained for the packet data transmission method related to this.

Further, in the present invention, the packet transmitting side is provided with user data inserting means for inserting user data into a packet synchronous portion in accordance with the timing from the timing generating means, and the packet receiving side is provided with user data separating means for separating user data. A means is provided, and the packet synchronization adding means inserts packet synchronization in a portion where the user data is separated. In addition to the above-described effects, user data can be multiplexed (duplicated) and transmitted. Similar effects can be obtained for the packet data transmission method related to this.

Further, in the present invention, the packet transmitting side replaces the next n packet synchronizations after the packet synchronization replaced with the frame synchronization with the frame number, according to the timing from the timing generation means. The memory control means performs control not to write a packet synchronization part after the packet synchronization replaced with frame synchronization and n frame numbers in accordance with the timing from the timing generation means,
An error correction adding means for adding an error correction code to the end of the frame continuously read from the memory means is provided, and the packet receiving side performs error correction on the frame using the error correction code added to the frame after detecting frame synchronization. Since the error correction means for performing the correction is provided, it is possible to provide a data error correction function in addition to the above effects. Similar effects can be obtained for the packet data transmission method related to this.

In the present invention, the memory control means on the packet transmitting side arranges frame synchronization at the beginning of the frame and performs read control for arranging the frame number of the frame later. In addition, when the frame number is large, the synchronization detection processing on the receiving side can be shortened. Similar effects can be obtained for the packet data transmission method related to this.

In the present invention, the memory control means on the packet transmitting side controls the transmission frame length according to the line frame length by outputting the packet data corresponding to the line frame of the communication line to be used. As a result, the position of the line frame becomes the position of the transmission frame as it is, and the frame synchronization detecting means on the receiving side can be omitted. Similar effects can be obtained for the packet data transmission method related to this.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a transmission side of a packet transmission system that performs bulk transmission of equal-length packets according to Embodiment 1 of the present invention.

FIG. 2 is a configuration diagram of a receiving side of a packet transmission system that performs bulk transmission of equal-length packets according to Embodiment 1 of the present invention.

FIG. 3 is a diagram showing a frame format in bulk transmission according to the first embodiment of the present invention.

FIG. 4 is a configuration diagram of a transmission side of a packet transmission system that performs bulk transmission of equal-length packets according to Embodiment 2 of the present invention.

FIG. 5 is a configuration diagram of a receiving side of a packet transmission system that performs bulk transmission of equal-length packets according to Embodiment 2 of the present invention.

FIG. 6 is a diagram showing a frame format in bulk transmission according to a second embodiment of the present invention.

FIG. 7 is a configuration diagram of a transmitting side of a packet transmission system that performs bulk transmission of equal-length packets according to Embodiment 3 of the present invention.

FIG. 8 is a configuration diagram of a receiving side of a packet transmission system that performs bulk transmission of equal-length packets according to Embodiment 3 of the present invention.

FIG. 9 is a diagram showing a frame format in bulk transmission according to a third embodiment of the present invention.

FIG. 10 is a diagram showing a frame format in bulk transmission of a packet transmission system according to a fourth embodiment of the present invention.

FIG. 11 is a diagram showing a frame format in bulk transmission of a packet transmission system according to a fifth embodiment of the present invention.

FIG. 12 is a configuration diagram of a transmission side of a conventional packet transmission system that performs bulk transmission of equal-length packets.

FIG. 13 is a configuration diagram of a receiving side of a conventional packet transmission system that performs bulk transmission of equal-length packets.

FIG. 14 is a diagram illustrating a frame format in bulk transmission of a conventional packet transmission system that performs bulk transmission of equal-length packets.

[Explanation of symbols]

1 packet counting means, 2 timing generating means,
3 frame synchronous allocating means, 4 frame number allocating means, 5, 11 memories, 6, 12 memory controlling means,
7, 8 transmission interface, 9 frame synchronization detection means, 10 frame number separation means, 13 packet synchronization addition means, 14 user data insertion means, 15 user data separation means, 16 error correction addition means, 17 error correction means, 22 transmission data , 23 transmission frames, 2
4 Received data.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04L 12/56 H04J 3/00 H04L 7/08 H04L 29/00

Claims (10)

(57) [Claims] 1. A packet transmission system for dividing a continuous stream of equal-length packets into a plurality of transmission frames and transmitting data over a plurality of communication lines, wherein a packet transmitting side converts the transmission frame into a plurality of transmission frames. Packet counting means for counting in units of m units, timing generation means for outputting frame synchronization insertion timing, frame number insertion timing, and memory control timing according to the packet position output from the packet counting means; Frame synchronization allocating means for replacing a packet synchronization part with frame synchronization at m packet periods according to the frame synchronization insertion timing of the frame synchronization; Frame number assigning means for replacing all or part of the signal, writing control of a packet to be transmitted according to the memory control timing from the timing generating means so as to be distributed to the plurality of communication circuits, and a frame unit of m packet length A memory control means for performing read control by means of: a memory means controlled by the memory control means; and a plurality of transmission interfaces connected between the memory means and each communication circuit. A transmission interface for each communication circuit that receives data from the communication circuit; a frame synchronization detection unit that detects frame synchronization from data output from these transmission interfaces; and a frame number that is separated according to the detected frame synchronization. Frame number separating means; Memory control means for controlling writing to the memory and reading in the order of the frame number in units of frames, memory means operating in accordance with the memory control means, and a frame synchronization portion and a frame number portion of the frame read from the memory means. A packet transmission system, comprising: packet synchronization adding means for replacing with packet synchronization. 2. The packet transmitting side is provided with user data inserting means for inserting user data into a packet synchronization part according to the timing from the timing generating means, and the packet receiving side is provided with user data separating means for separating user data. 2. The packet transmission system according to claim 1, wherein said packet synchronization adding means inserts packet synchronization into a portion where user data is separated. 3. The packet transmitting side, wherein the frame number assigning means assigns the next n packet synchronizations replaced by the frame synchronizations to all or a part of the frame numbers in accordance with the timing from the timing generation means. The memory control means performs control so as not to write the frame synchronization and the packet synchronization part after the packet synchronization replaced with n frame numbers in accordance with the timing from the timing generation means, and further continuously from the memory means. Error correction adding means for adding an error correction code at the end of the read frame; and the packet receiving side has error correction means for performing error correction on the frame with the error correction code added to the frame after detecting frame synchronization. The packet transmission according to claim 1, characterized in that: Stem. 4. The method according to claim 1, wherein the memory control means on the packet transmitting side performs a read control for arranging a frame synchronization at a head portion of the frame and immediately thereafter arranging a frame number of the frame. A packet transmission system as described. 5. The memory control means on the packet transmitting side controls the transmission frame length according to the line frame length by outputting packet data corresponding to the line frame of the communication line to be used. The packet transmission system according to any one of claims 1 to 4, wherein 6. A packet transmission method for dividing a continuous stream of equal-length packets into a plurality of transmission frames and transmitting data over a plurality of communication lines, wherein at the time of packet transmission, a packet to be transmitted constitutes the transmission frame. A step of generating frame synchronization insertion timing, a frame number insertion timing, and a memory control timing according to the counted packet position; and a step of generating a packet synchronization portion at m packet periods according to the frame synchronization insertion timing. Replacing the frame synchronization with all or part of the frame, replacing the packet synchronization portion after the frame synchronization with a frame number according to the frame number insertion timing, distributing the frame synchronization to the plurality of communication circuits, and according to the memory control timing transmission Write packet to
And reading in frame units having a length of m packets, wherein, when receiving a packet, detecting frame synchronization from the data of each communication circuit, and separating frame numbers according to the detected frame synchronization. And writing the data to the memory and reading out the frames in the order of the frame number in units of the separated frames; and replacing the frame synchronization portion and the frame number portion of the read out frame with the packet synchronization. A packet transmission method characterized by the above-mentioned. 7. A step of inserting user data into a packet synchronization portion in accordance with the timing when transmitting a packet, including a step of separating user data when receiving a packet. 7. The packet transmission method according to claim 6, wherein packet synchronization is inserted into the separated part. 8. When transmitting the packet, in the step of replacing with the frame number, in the step of replacing with the frame number, the next n packet synchronizations after the packet synchronization replaced with the frame synchronization are replaced with all or a part of the frame number according to the timing. In the step of performing reading, a step of not writing a packet synchronization portion after the packet synchronization replaced with frame synchronization and n frame numbers according to the above timing, and further adding an error correction code to the end of the continuously read frame. 7. The packet transmission method according to claim 6, further comprising the step of: upon receiving the packet, performing a step of performing error correction on the frame using an error correction code added to the frame after detecting frame synchronization. 9. A read control for arranging a frame synchronization at a head portion of a frame and immediately thereafter arranging a frame number of the frame in the writing and reading steps at the time of transmitting the packet.
Or the packet transmission method according to 8. 10. A packet data is output in accordance with a line frame of the communication line to be used in the writing and reading steps at the time of transmitting the packet,
10. The packet transmission method according to claim 6, wherein the control is performed by adjusting the transmission frame length to the line frame length.