JP3164959B2 - Test method for semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit device.
It relates to a test method, and more particularly to a method of testing a device under test semiconductor integrated circuit device for outputting a low-frequency converted chroma signal of the video.

[0002]

2. Description of the Related Art As an example, consider the case of testing a semiconductor integrated circuit device that outputs a video low-frequency converted chroma signal.

The low-frequency conversion chroma signal stored on the video tape is rotated by 90 degrees every one horizontal synchronization period (1H) in order to reduce crosstalk between adjacent tracks.
Is intended to, have to return to the original phase in 5H eyes
You . Therefore, as shown in FIG. 4, the selection level meter ( for example,
When measuring with a spectrum analyzer, etc.), four low-frequency converted chroma signals in one horizontal synchronization period are synthesized, and the frequency of the chroma signal component is shifted by (horizontal synchronization signal frequency / 4) . . Further, even if the measured value is corrected in consideration of a period during which there is no chroma signal, the measured value differs from the actual amplitude.

In such a case, the correlation between the actual amplitude of the output of the semiconductor integrated circuit device and the value measured by the selection level meter is obtained, and the ratio is multiplied by the measured value to obtain the amplitude of the low-frequency converted chroma signal. .

[0005]

The test method described above is
The rotation of the phase in each horizontal synchronization period is 90 degrees, and 1H
It is assumed that the chroma signal amplitudes during the period from to 4H are the same. However, the low-frequency conversion chroma signal processed by the actual semiconductor integrated circuit device is 3 for every 4H.
It rotates exactly 60 degrees . However , since the low-frequency conversion chroma signal generation circuit in the semiconductor integrated circuit device operating in each horizontal synchronization period is different in the rotation of the phase every 1H,
It has several degrees of error. For similar reasons
Ri, of the low frequency converted chroma signal amplitude, the amplitude of the same phase are equal, the amplitude of each 1 H are different in the range of tenths of a dB.

Therefore, in the above-described method based on the correlation, the ratio slightly varies depending on the individual semiconductor integrated circuit devices. Therefore, the amplitude of the low-frequency conversion chroma signal measured when the ratio is a fixed constant for a mass production test is measured. Has an error.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems, and the rotation of the phase of the low-frequency conversion chroma signal output from the semiconductor integrated circuit device for each 1H is not exactly 90 degrees, and 1
It is an object of the present invention to provide a method capable of testing the amplitude of a low-band converted chroma signal with high accuracy even when the amplitude of each H fluctuates.

[0008]

Means for Solving the Problems The method for testing a semiconductor integrated circuit device of the present invention in order to achieve the above object, the horizontal sync
A low-frequency conversion chroma signal with a different phase at a predetermined period for each period
The output from the tested semiconductor integrated circuit device for outputting
Filtering the low-pass converted chroma signal and the low-pass converted chroma signal
Analog output that selects and outputs one of
A multiplexer and an output of the analog multiplexer
Selectable level meter to measure signal level and low frequency of specific phase
Corresponds to one specific horizontal synchronization period that includes the converted chroma signal
The analog multiplexer
Using a test apparatus having a pulse generation circuit for applying the low-frequency conversion chroma signal of the specific phase only to the analog signal.
It is characterized in that it is extracted by a log multiplexer and measured by the selection level meter .

[0009]

According to the method of the present invention, the low-frequency conversion chroma signals input to the selection level meter have the same phase and the same amplitude only. The amplitude of the low-frequency conversion chroma signal can be accurately measured. In addition, all phases (0 degree, 90
, 180 degrees, and 270 degrees), a low-band converted chroma signal of the semiconductor integrated circuit device can be highly accurately tested and averaged.

[0010]

An embodiment of the present invention will be described below with reference to the drawings.

[0011] Figure 1 shows a block diagram of a test apparatus used for testing the method of engagement Ru semiconductor integrated circuit device in an embodiment of the present invention. In FIG. 1, a low-frequency conversion chroma signal output from a semiconductor integrated circuit device under test 1 is input to a first input terminal 1 of a 2CH analog multiplexer 2.
You. The low-pass conversion chroma signal is input to a low-pass filter composed of a resistor 3 and a capacitor 4, and is output to the output.
The extracted DC voltage is input to the second input terminal 2 of the analog multiplexer 2. The output terminal of the analog multiplexer 2 selected level meter 6 via the buffer 5 is <br/> connected. Further, the control terminal of the analog multiplexer 2 is connected to an output of a pulse generation circuit 7 for generating a pulse signal for selecting a low-frequency conversion chroma signal of a specific phase. The reference horizontal is applied to the input of the pulse generation circuit 7.
A horizontal synchronizing signal generator 8 for generating a synchronizing signal pulse is connected, and the repetition frequency of the horizontal synchronizing signal pulse matches the repetition frequency of the low-frequency conversion chroma signal output from the semiconductor integrated circuit device 1 under test. ing.

The analog multiplexer 2 generates a pulse.
When the pulse signal from the circuit 7 is given to the control terminal,
The switch inside the analog multiplexer 2 connects the input terminal 1
Select to output only the low-frequency conversion chroma signal of a specific phase.
You.

Next, the operation waveform of each part of the pulse generation circuit 7
While using FIG. 2 which is a logic timing diagram showing
The circuit operation of the pulse generation circuit 7 will be described. In FIG.
When the LOAD terminal is first set to the high potential for a moment for a moment, the shift register 74LS194 of FIG.
The signals b to e whose high level shifts every clock are 74LS
194 to the respective outputs QA to QD. These signals b
To e are the repetition frequency of the horizontal synchronization signal frequency / 4,
Pulses with a duty of 25%, which have a phase
Are signals shifted by 90 degrees. Next, the digital multiplexer 74LS151 is for 8Ch,
Ch only is used and select terminals SEL1, SE
An arbitrary phase can be selected by giving a signal to L2 . In FIG. 2, the select terminal S of the 74LS151
EL1 and SEL2 are low level, 74LS
Out of the shift register 74LS194 the output f of 151
Force signal QA (waveform b in FIG. 2) is selected and output
You. Next, two (monostable multivibrators) 74L
Step S221 is for determining an operation period within one horizontal synchronization period, and normally generates a pulse signal g corresponding to only a chroma signal period excluding a burst signal period . Soshi
Output signal of the digital multiplexer 74LS151.
AND of the signal f and the output signal g of the 74LS221
We are creating a pulse signal h Te. In this way, continuous
Low frequency of a specific phase at a rate of one in four horizontal synchronization periods
Correspondence to one specific horizontal synchronization period including the converted chroma signal
Creates a pulse signal g that is
It is treated as a pulse signal to extract only the
You.

FIG. 3 shows a 2Ch analog multiplexer 2
3 is a signal waveform diagram at each terminal of FIG. First input terminal 1
0, 90, 180, and 270 for each horizontal synchronization period
The low-frequency conversion chroma signal having different degrees and phases is input and the second
DC terminal smoothed by a low-pass filter
Pressure has been entered. And the output terminal is a control terminal
Specific phase (0 degree) in synchronization with pulse signal h input to
It can be seen that only the low-frequency conversion chroma signal is output.
Therefore, if the duty in the period in which the chroma signal is present is determined and the measurement value of the selection level meter 6 is corrected, the amplitude of the low-band converted chroma signal of a specific phase can be accurately measured. Further, by switching the select terminals SEL1 and SEL2 of the digital multiplexer 74LS151, all the phases (0 degree, 90 degrees, 180 degrees, and 270 degrees) are performed.
Can be tested with high precision for each low-frequency converted chroma signal.

[0015]

According to the test method of the present invention, the rotation of the phase of the low-frequency conversion chroma signal output from the semiconductor integrated circuit device at every 1H is not exactly 90 degrees, and the amplitude at every 1H varies. However, since the phase and the amplitude of the low-frequency conversion chroma signal input to the selection level meter become constant, the amplitude of the low-frequency conversion chroma signal can be tested with high accuracy.

Moreover, it can be realized by a simple circuit. Also,
The same method can be applied to a device in which a chroma signal is inverted every 1H, such as a semiconductor integrated circuit device that outputs a PAL television signal.

[Brief description of the drawings]

FIG. 1 is a test apparatus for a semiconductor integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a logic timing chart of each terminal of a pulse generation circuit 7;

FIG. 3 is a signal waveform diagram at each terminal of a 2CH analog multiplexer 2.

FIG. 4 is a block diagram of a conventional test apparatus for a semiconductor integrated circuit device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor integrated circuit device under test 2 2 CH analog multiplexer 3 resistor 4 capacitor 5 buffer 6 selection level meter 7 pulse generation circuit 8 horizontal synchronization signal generator

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-136492 (JP, A) JP-A-6-98355 (JP, A) JP-A-50-81225 (JP, A) 130688 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) G01R 31/316 G01R 31/28 H04N 17/02

Claims (1)

(57) [Claims] 1. A method in which a phase having a different phase in a predetermined cycle is set for each horizontal synchronization period.
That the a low-band converted chrominance signal outputted from the tested semiconductor integrated circuit device for outputting a low-frequency converted chroma signal, the low
One of the DC voltage obtained by filtering the
And an analog multiplexer for selectively outputting an output signal, and measuring an output signal level of the analog multiplexer.
Level meter, and a specific horizontal
Generates a pulse signal corresponding to the synchronization period and
Using a test apparatus having a pulse generation circuit to be provided to a multiplexer, the analog-only low-frequency conversion chroma signal of the specific phase
A test method for a semiconductor integrated circuit device, wherein the test is performed by sampling with a multiplexer and measuring with a selection level meter .