JP3153220B2 - Power control method - Google Patents
Power control methodInfo
- Publication number
- JP3153220B2 JP3153220B2 JP09766890A JP9766890A JP3153220B2 JP 3153220 B2 JP3153220 B2 JP 3153220B2 JP 09766890 A JP09766890 A JP 09766890A JP 9766890 A JP9766890 A JP 9766890A JP 3153220 B2 JP3153220 B2 JP 3153220B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- stabilized
- receiving unit
- supply line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電子回路を搭載した印刷基板等の受電部と
直流安定化電源と給電ラインより構成される給電システ
ムにおける電源制御方式に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control method in a power supply system including a power receiving unit such as a printed board on which an electronic circuit is mounted, a stabilized DC power supply, and a power supply line.
従来の技術は、例えば特開昭57−106922号公報に記載
のように、直流安定化電源の出力電圧を監視し、あらか
じめ設定された基準電圧と比較することによって、比較
した絶対値が一定値以上になったときにエラーとして検
出する方法が一般的である。A conventional technique monitors an output voltage of a DC stabilized power supply and compares the output voltage with a preset reference voltage, as described in, for example, JP-A-57-106922. In general, a method of detecting an error when the above occurs is described.
しかしながら、上記従来技術では、出力電圧異常等が
発生した場合、異常検出ができても、障害発生元が直流
安定化電源部であるのか、供給ライン部であるのかが判
明せず、例えば直流安定化電源を複数台有するような給
電ライン部の複雑な給電システムの場合には、障害発生
元の摘出が容易に行えないという問題があった。However, in the above-described conventional technology, when an output voltage abnormality or the like occurs, even if abnormality can be detected, it is not clear whether the failure source is the DC stabilized power supply unit or the supply line unit. In the case of a complicated power supply system having a plurality of power supply lines and a complicated power supply line section, there has been a problem that a failure source cannot be easily extracted.
本発明は、前記問題点を解決するためになされたもの
である。The present invention has been made to solve the above problems.
本発明の目的は、電源異常部位の切分けを容易にした
電源制御方式を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a power supply control system that facilitates the separation of a power supply abnormality part.
上記目的を達成するため、本発明においては、電子回
路を搭載した印刷基板等の受電部と、直流安定化電源
と、該受電部と該直流安定化電源を接続する給電ライン
より構成される給電システムにおいて、前記直流安定化
電源の出力電圧を検出する第１の手段と、前記受電部の
電圧を検出する第２の手段と、該第１、第２の手段の出
力と予め設定された所定値とを比較することにより、前
記給電ラインと前記直流安定化電源の異常を監視する制
御手段とを備えている。さらに、給電ラインの電圧降下
量の限界値を記憶する記憶手段とを備えている。In order to achieve the above object, according to the present invention, there is provided a power supply unit including a power receiving unit such as a printed circuit board on which an electronic circuit is mounted, a DC stabilized power supply, and a power supply line connecting the power receiving unit and the DC stabilized power supply. In the system, first means for detecting an output voltage of the stabilized DC power supply, second means for detecting a voltage of the power receiving unit, and an output of the first and second means and a preset predetermined value A control unit is provided for monitoring an abnormality of the power supply line and the stabilized DC power supply by comparing the value with a value. Further, a storage means for storing a limit value of a voltage drop amount of the power supply line is provided.
直流安定化電源の出力電圧と受電部の電圧の差と記憶
手段によって記憶した値を比較することにより給電シス
テムの異常を監視する。すなわち、制御手段は記憶手段
よりあらかじめ設定した値を読み出し比較して、直流安
定化電源の出力電圧が設定値以下のとき直流安定化電源
の出力異常として診断する。また直流安定化電源と受電
部の差、つまり給電ラインの電圧降下量が設定値以上の
とき給電ラインの異常として診断する。The abnormality of the power supply system is monitored by comparing the difference between the output voltage of the stabilized DC power supply and the voltage of the power receiving unit with the value stored by the storage unit. That is, the control means reads and compares a preset value from the storage means, and diagnoses as an output abnormality of the stabilized DC power supply when the output voltage of the stabilized DC power supply is equal to or lower than the set value. When the difference between the stabilized DC power supply and the power receiving unit, that is, the voltage drop amount of the power supply line is equal to or more than the set value, the power supply line is diagnosed as abnormal.
以下、本発明の一実施例を図面を用いて具体的に説明
する。Hereinafter, an embodiment of the present invention will be specifically described with reference to the drawings.
第１図は、本発明の一実施例に係る全体構成を示し、
直流安定化電源１と、電子回路の負荷部４と、負荷部４
を搭載した印刷基板等の受電部２と、直流安定化電源１
と受電部２を接続する給電ライン３と、制御部７とで構
成されている。制御部７は、直流安定化電源１の出力電
圧を検出するA/D変換回路５と、受電部２の電圧を検出
するA/D変換回路６とを比較、制御するマイクロプロセ
ッサ８と、必要に応じて読出し、書込みするための記憶
部９とで構成され、A/D変換回路5,6はマイクロプロセッ
サ８と電圧監視線11,12によって接続されている。FIG. 1 shows an overall configuration according to an embodiment of the present invention,
DC stabilized power supply 1, electronic circuit load 4, load 4
Power receiving unit 2 such as a printed circuit board on which is mounted a DC stabilizing power supply 1
And a power supply line 3 connecting the power receiving unit 2 and the control unit 7. The control unit 7 compares the A / D conversion circuit 5 that detects the output voltage of the stabilized DC power supply 1 with the A / D conversion circuit 6 that detects the voltage of the power receiving unit 2 and controls the microprocessor 8. And A / D conversion circuits 5 and 6 are connected to the microprocessor 8 and voltage monitoring lines 11 and 12, respectively.
次に本発明の動作について説明する。 Next, the operation of the present invention will be described.
直流安定化電源１を立上げ、A/D変換回路５とA/D変換
回路６により直流安定化電源１の出力電圧と受電部２の
電圧をマイクロプロセッサ８が監視する。このときマイ
クロプロセッサ８は記憶部９よりあらかじめ設定した値
を読み出し比較して、直流安定化電源１の出力電圧が設
定値以下のとき直流安定化電源１の出力異常として診断
する。また直流安定化電源１と受電部２の差、つまり給
電ライン３の電圧降下量が設定値以上のとき給電ライン
３の異常として診断する。これらのエラー情報は記憶部
９に書込まれる。The stabilized DC power supply 1 is started up, and the microprocessor 8 monitors the output voltage of the stabilized DC power supply 1 and the voltage of the power receiving unit 2 by the A / D conversion circuit 5 and the A / D conversion circuit 6. At this time, the microprocessor 8 reads and compares a preset value from the storage unit 9 and diagnoses as an output abnormality of the stabilized DC power supply 1 when the output voltage of the stabilized DC power supply 1 is equal to or less than the set value. When the difference between the stabilized DC power supply 1 and the power receiving unit 2, that is, the amount of voltage drop of the power supply line 3 is equal to or more than a set value, it is diagnosed that the power supply line 3 is abnormal. These pieces of error information are written into the storage unit 9.
直流安定化電源１が正常に立上り、給電ライン３の電
圧降下量が異常でなければ、A/D変換回路５とA/D変換回
路６をマイクロプロセッサ８に内蔵されたタイマにより
一定時間毎に監視し、記憶部９に予め設定した値と比較
することにより直流安定化電源１の出力電圧異常及び給
電ライン３の電圧降下異常などの診断が行われる。If the DC stabilized power supply 1 rises normally and the voltage drop amount of the power supply line 3 is not abnormal, the A / D conversion circuit 5 and the A / D conversion circuit 6 are controlled at regular intervals by a timer built in the microprocessor 8. By monitoring and comparing with a value set in the storage unit 9 in advance, diagnosis such as abnormal output voltage of the DC stabilized power supply 1 and abnormal voltage drop of the power supply line 3 is performed.
第２図は、本発明の他の実施例の構成を示す図であ
り、マイクロプロセッサ８の制御命令によって直流安定
化電源１の出力電圧を制御する電圧制御部10と、電圧制
御線13をさらに設けてあり、他の構成は第１図と同様で
ある。FIG. 2 is a diagram showing the configuration of another embodiment of the present invention. The voltage control unit 10 for controlling the output voltage of the stabilized DC power supply 1 in accordance with a control instruction from the microprocessor 8 and the voltage control line 13 are further provided. The other configuration is the same as that of FIG.
マイクロプロセッサ８は、記憶部９よりあらかじめ設
定した受電部２の設定電圧を読み出し、設定電圧とA/D
変換回路６で検出された受電部２の電圧が等しくなるよ
うに電圧制御部10を制御して直流安定化電源１の出力電
圧の制御を行う。The microprocessor 8 reads the preset set voltage of the power receiving unit 2 from the storage unit 9 and stores the set voltage and the A / D
The voltage control unit 10 is controlled so that the voltage of the power receiving unit 2 detected by the conversion circuit 6 becomes equal to control the output voltage of the stabilized DC power supply 1.
このように、負荷部４の増減により給電ライン３の電
圧降下量が変化しても、受電部２には常に最適な電源電
圧が与えられるように電源電圧が制御される。As described above, even if the voltage drop amount of the power supply line 3 changes due to the increase or decrease of the load unit 4, the power supply voltage is controlled so that the optimum power supply voltage is always supplied to the power receiving unit 2.
さらに、本発明では次のような機能、すなわち、直流
安定化電源１の出力電圧を任意にオペレーション操作に
より設定する電圧設定機能、前記電圧設定機能をプログ
ラミング操作し、負荷部４に搭載された電子回路の電子
マージン試験を行う試験機能、予め求めた給電ライン３
の直流抵抗値を記憶部９に設定しておき、A/D変換回路
５及びA/D変換回路６により検出し、比較した給電ライ
ン３の電圧降下量から負荷部４の負荷電流を算出する測
定機能などを付加することが可能である。Further, in the present invention, the following functions, namely, a voltage setting function for arbitrarily setting the output voltage of the stabilized DC power supply 1 by an operation operation, a programming operation of the voltage setting function, and an electronic device mounted on the load unit 4 Test function for electronic margin test of circuit, power supply line 3 determined in advance
Is stored in the storage unit 9, detected by the A / D conversion circuit 5 and the A / D conversion circuit 6, and the load current of the load unit 4 is calculated from the compared voltage drop amount of the power supply line 3. It is possible to add a measurement function and the like.
以上、説明したように、本発明によれば、給電ライン
と直流安定化電源の障害を簡単に検出することができ、
また受電部に最適な電源電圧が供給されるように直流安
定化電源を制御することができる。As described above, according to the present invention, it is possible to easily detect a failure in a power supply line and a stabilized DC power supply,
Further, the stabilized DC power supply can be controlled so that the optimum power supply voltage is supplied to the power receiving unit.
第１図は、本発明の一実施例の構成を示す図、 第２図は、本発明の他の実施例を示す図である。 図中、１……直流安定化電源、２……受電部、３……給
電ライン、４……負荷部、５……A/D変換回路、６……A
/D変換回路、７……制御部、８……マイクロプロセッ
サ、９……記憶部、10……電圧制御部、11……電圧監視
線、12……電圧監視線、13……電圧制御線。FIG. 1 is a diagram showing a configuration of one embodiment of the present invention, and FIG. 2 is a diagram showing another embodiment of the present invention. In the drawing, 1 ... DC stabilized power supply, 2 ... Power receiving unit, 3 ... Power supply line, 4 ... Load unit, 5 ... A / D conversion circuit, 6 ... A
/ D conversion circuit, 7 control unit, 8 microprocessor, 9 storage unit, 10 voltage control unit, 11 voltage monitoring line, 12 voltage monitoring line, 13 voltage control line .
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭63−28225（ＪＰ，Ａ) 特開 昭62−244217（ＪＰ，Ａ) 特開 昭56−108965（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H02J 1/00 H02H 3/24 H02H 7/20 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-63-28225 (JP, A) JP-A-62-244217 (JP, A) JP-A-56-108965 (JP, A) (58) Field (Int.Cl. 7 , DB name) H02J 1/00 H02H 3/24 H02H 7/20
Claims (1)
定化電源と前記受電部とを接続する給電ラインとより構
成される給電システムにおいて、 前記直流安定化電源の出力電圧を検出する第１の手段
と、前記受電部の電圧を検出する第２の手段と、前記直
流安定化電源の出力電圧を制御する電圧制御手段と、前
記第１の手段の検出電圧と予め設定された第１の所定値
とを比較し、また、前記第１の手段の検出電圧と前記第
２の手段の検出電圧との差と予め設定された第２の所定
値とを比較することにより、前記直流安定化電源の出力
異常または前記給電ラインの電圧降下異常を監視する監
視手段とを有し、前記監視手段は、前記第２の手段の検
出電圧が予め設定された第３の所定値と等しくなるよう
に前記電圧制御手段を制御することを特徴とする給電シ
ステム。1. A power supply system comprising a stabilized DC power supply, a power receiving unit, and a power supply line connecting the stabilized DC power supply and the power receiving unit, wherein an output voltage of the stabilized DC power supply is detected. A first means, a second means for detecting a voltage of the power receiving unit, a voltage control means for controlling an output voltage of the stabilized DC power supply, and a voltage detected by the first means and a predetermined voltage. 1 and a difference between the detected voltage of the first means and the detected voltage of the second means is compared with a second predetermined value set in advance, whereby the DC Monitoring means for monitoring the output abnormality of the stabilized power supply or the voltage drop abnormality of the power supply line, wherein the monitoring means makes the detection voltage of the second means equal to a third predetermined value set in advance. Controlling the voltage control means as described above. Power supply system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP09766890A JP3153220B2 (en) | 1990-04-16 | 1990-04-16 | Power control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP09766890A JP3153220B2 (en) | 1990-04-16 | 1990-04-16 | Power control method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04218A JPH04218A (en) | 1992-01-06 |
| JP3153220B2 true JP3153220B2 (en) | 2001-04-03 |
Family
ID=14198417
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP09766890A Expired - Fee Related JP3153220B2 (en) | 1990-04-16 | 1990-04-16 | Power control method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3153220B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3212460U (en) * | 2017-05-31 | 2017-09-14 | 直道 高橋 | shoes |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05292661A (en) * | 1992-04-06 | 1993-11-05 | Fanuc Ltd | Electric power supply device |
| AU2002212331B2 (en) * | 2000-11-09 | 2005-05-12 | Orica Explosives Technology Pty Ltd | Sensor for monitoring electronic detonation circuits |
-
1990
- 1990-04-16 JP JP09766890A patent/JP3153220B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3212460U (en) * | 2017-05-31 | 2017-09-14 | 直道 高橋 | shoes |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04218A (en) | 1992-01-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |