JPS6360611B2 - - Google Patents
Info
- Publication number
- JPS6360611B2 JPS6360611B2 JP55082382A JP8238280A JPS6360611B2 JP S6360611 B2 JPS6360611 B2 JP S6360611B2 JP 55082382 A JP55082382 A JP 55082382A JP 8238280 A JP8238280 A JP 8238280A JP S6360611 B2 JPS6360611 B2 JP S6360611B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- output voltage
- supply unit
- output
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 claims description 17
- 230000005856 abnormality Effects 0.000 claims description 14
- 230000002159 abnormal effect Effects 0.000 claims description 9
- 230000007423 decrease Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 1
Description
【発明の詳細な説明】
本発明はｎ個の電源ユニツトの出力を並列に接
続し、負荷に対して所定出力電圧を送出する電源
システムの電源ユニツト異常検出方式に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply unit abnormality detection method for a power supply system in which the outputs of n power supply units are connected in parallel and a predetermined output voltage is sent to a load.
大容量の負荷が設けられる電源システムにおい
て、該負荷に対して所定電圧を出力する電源ユニ
ツトは、通常ｎ個の電源ユニツトを設けることに
よつて出力容量を増大させ、負荷に対して所定電
圧を出力している。また、各電源ユニツトの出力
は並列に接続され、該並列出力が負荷に接続され
る。 In a power supply system in which a large-capacity load is installed, a power supply unit that outputs a predetermined voltage to the load usually increases the output capacity by providing n power supply units, and outputs a predetermined voltage to the load. It is outputting. Further, the outputs of each power supply unit are connected in parallel, and the parallel outputs are connected to a load.
しかしながら、該接続において、上述電源ユニ
ツトの故障の判別、特に出力電圧が出力されない
故障の判別に際しては、いずれの電源ユニツトが
故障しているか否か判別しにくかつた。というの
は、一般に定電圧電源ユニツトでは、負荷の変動
にかかわらず出力電圧が一定になるようにフイー
ドバツク制御している。そのため、故障電源ユニ
ツトの出力低下や上昇は、他の電源ユニツトにと
つては負荷の増大や減少と等価に見え、フイード
バツク制御によつて所定電圧を保とうとするた
め、上記故障電源ユニツトの出力も見かけ上所定
出力電圧が出力されているように見えるからであ
る。 However, in this connection, it is difficult to determine which power supply unit is malfunctioning, especially when determining a malfunction in which no output voltage is output. This is because constant voltage power supply units generally perform feedback control so that the output voltage remains constant regardless of load fluctuations. Therefore, a decrease or increase in the output of the failed power supply unit appears to be equivalent to an increase or decrease in the load to other power supply units, and as they try to maintain a predetermined voltage through feedback control, the output of the failed power supply unit also increases. This is because it appears that a predetermined output voltage is being output.
尚、故障モードとしては大別して、出力がオ
ープン状態になる場合、出力電圧が設定値より
下回わつてしまう場合、出力電圧が設定値より
上回わつてしまう場合、の三通りが考えられる
が、いずれの場合でも、各電源ユニツトの出力電
圧を測定しても判別はできなかつた。 There are three possible failure modes: when the output becomes open, when the output voltage falls below the set value, and when the output voltage rises above the set value. In either case, it was not possible to determine whether the output voltage of each power supply unit was measured.
上記問題点の解決手段としては各々の電源ユニ
ツトの出力端子にダイオードを設け、外部からの
電圧の印加を阻止することによつて故障電源ユニ
ツトを判別することが考えられている。 As a means of solving the above problem, it has been proposed to provide a diode at the output terminal of each power supply unit to prevent the application of external voltage, thereby identifying a failed power supply unit.
しかしながら、上述のような場合、ダイオード
における消費電流を無視できず、即ち、負荷にお
いて必要とすべき出力電圧を出力するため、各電
源ユニツトの出力電圧を上昇させることになる。
このことは経済性の低下を招くことになる。 However, in the above case, the current consumption in the diode cannot be ignored, and in other words, the output voltage of each power supply unit must be increased in order to output the output voltage required by the load.
This will lead to a decline in economic efficiency.
又、上記故障モードの場合、故障電源ユニツ
トからの出力電流が過電流状態となり、過電流検
出されるか（もし検出器がついていてそれが正常
に動作した場合）、又はダイオードでの電圧降下
に過電流によつて正常電源ユニツトのダイオード
と比べて有意の差を生じない限り、やはり検出困
難であつた。 In addition, in the case of the above failure mode, the output current from the failed power supply unit becomes an overcurrent state, and either the overcurrent is detected (if a detector is installed and it operates normally), or the voltage drop at the diode causes the overcurrent to be detected. Unless the overcurrent caused a significant difference compared to the diode of a normal power supply unit, it would still be difficult to detect.
本発明は経済性の低下を招くことなく故障電源
ユニツトの判別を行なうことを目的とする。その
ため、出力電圧上昇指示回路、出力電圧検出回
路、および記憶部を有する判別回路を含む電源ユ
ニツト異常検出回路を備え、ｎ個の電源ユニツト
中ｎ−ｍ個（ｍはｎ未満の整数である。）の電源
ユニツトに対する出力電圧上昇指示を各組合せに
ついて行ない判別することを特徴とする。 An object of the present invention is to identify a failed power supply unit without causing a decrease in economic efficiency. Therefore, a power supply unit abnormality detection circuit including an output voltage increase instruction circuit, an output voltage detection circuit, and a discrimination circuit having a storage section is provided, and nm out of n power supply units (m is an integer less than n) is provided. ) is characterized in that an output voltage increase instruction is given to the power supply unit for each combination and the determination is made.
以下、図面に基き本発明を説明する。 The present invention will be explained below based on the drawings.
図は本発明の異常検出方式を説明する電源ユニ
ツト異常検出回路のブロツク図である。 The figure is a block diagram of a power supply unit abnormality detection circuit for explaining the abnormality detection method of the present invention.
１は電源ユニツト異常検出回路（以下異常検出
回路と記す）、２は制御回路、３は出力電圧上昇
指示回路、４は出力電圧検出回路、５は結果記憶
部６を備える判別回路、７は負荷、P0〜Pnは電
源ユニツトである。 1 is a power supply unit abnormality detection circuit (hereinafter referred to as abnormality detection circuit), 2 is a control circuit, 3 is an output voltage increase instruction circuit, 4 is an output voltage detection circuit, 5 is a discrimination circuit equipped with a result storage section 6, and 7 is a load. , P 0 to Pn are power supply units.
図において、電源ユニツトP0〜Pn各々の出力
は並列に接続され、負荷７に所定電圧を出力して
いる。 In the figure, the outputs of power supply units P 0 -Pn are connected in parallel and output a predetermined voltage to a load 7.
上述、電源ユニツトP0〜Pn中１つの電源ユニ
ツトは予備用に備えられ、例えば電源ユニツト
P0が異常の場合の代替として用いられる。 As mentioned above, one of the power supply units P 0 to Pn is provided as a backup, for example, as a power supply unit.
It is used as an alternative when P 0 is abnormal.
一方、電源ユニツトの異常、特に出力電圧が出
力されない異常に際して、電源ユニツト異常検出
回路１は次の動作を行なう。該電源ユニツト異常
検出回路１に含まれる制御回路２は、出力電圧上
昇指示回路３に対して制御信号S0を出力する。該
出力電圧上昇指示回路３は制御信号S0に基き、電
源ユニツトP0〜Pn中ｎ−１個の電源ユニツトの
各組合せについて出力電圧上昇指示を行なう。該
出力電圧上昇指示に伴う各組合せの出力電圧の結
果は、出力電圧検出回路４により検出されると共
に判別回路５の記憶部６に格納される。上述出力
電圧の結果において、異常電源ユニツトを含む組
合せは、出力電圧上昇指示にかからず出力電圧が
上昇する。ことはない。例えば、電源ユニツト
P1が異常だつた場合に、該異常電源ユニツトP1
を含む各組合せに対する出力電圧上昇指示は、該
各々の組合せに含まれない電源ユニツトが、上記
フイードバツク制御によつて所定出力電圧を保持
しようとするため、上述異常電源ユニツトP1を
含む各々の組合せの出力は上昇しない。 On the other hand, in the event of an abnormality in the power supply unit, particularly an abnormality in which no output voltage is output, the power supply unit abnormality detection circuit 1 performs the following operations. A control circuit 2 included in the power supply unit abnormality detection circuit 1 outputs a control signal S 0 to an output voltage increase instruction circuit 3. The output voltage increase instruction circuit 3 issues an output voltage increase instruction for each combination of n-1 power supply units among the power supply units P0 to Pn based on the control signal S0 . The output voltage results of each combination associated with the output voltage increase instruction are detected by the output voltage detection circuit 4 and stored in the storage section 6 of the discrimination circuit 5. In the above output voltage results, the combination including the abnormal power supply unit has an output voltage increase regardless of the output voltage increase instruction. Never. For example, the power supply unit
When P 1 is abnormal, the abnormal power supply unit P 1
The output voltage increase instruction for each combination including the above-mentioned abnormal power supply unit P1 is issued because the power supply unit not included in each combination attempts to maintain a predetermined output voltage by the above-mentioned feedback control. output does not increase.
一方、上述異常電源ユニツトを含まない組合せ
に対する出力電圧上昇指示は、該異常電源ユニツ
トが所定出力を保持することがないので出力電圧
は上昇する。 On the other hand, when an output voltage increase instruction is given to a combination that does not include the above-mentioned abnormal power supply unit, the output voltage increases because the abnormal power supply unit does not maintain a predetermined output.
よつて、ｎ−１個の各々の組合せに対する出力
上昇指示に際して、出力電圧が上昇しない組合せ
全てに含まれている電源ユニツトが異常であるこ
とを判別できる。上述判別は、各組合せに対する
出力電圧上昇指示後、制御回路２からの判別回路
５に対する制御信号S1に基き行なわれる。該判別
回路５は、該制御信号S1によつて、記憶部６に格
納された各組合せの出力結果を、上述出力電圧上
昇指示回路３からの組合せ情報に基き、出力電圧
が上昇しない組合せ全てに含まれる電源ユニツト
を選択する。 Therefore, when an output increase instruction is given to each of the n-1 combinations, it can be determined that the power supply units included in all the combinations in which the output voltage does not increase are abnormal. The above-described determination is performed based on the control signal S1 from the control circuit 2 to the determination circuit 5 after an instruction to increase the output voltage for each combination is given. In response to the control signal S1 , the discrimination circuit 5 selects all the combinations in which the output voltage does not increase based on the combination information from the output voltage increase instruction circuit 3, which is the output result of each combination stored in the storage unit 6. Select the power supply unit included.
以上のように本発明によれば、ｎ個の電源ユニ
ツト中（ｎ−ｍ）個の電源ユニツトに対する各組
合せについて出力電圧上昇指示を行なうことによ
つて容易に故障電源ユニツトの判別ができる。 As described above, according to the present invention, a faulty power supply unit can be easily identified by issuing an output voltage increase instruction for each combination of (n-m) power supply units among n power supply units.
図は本発明の一実施例の電源ユニツト異常検出
方式を説明するための一ブロツク図である。
１……電源ユニツト異常検出回路、２……制御
回路、３……出力電圧上昇指示回路、４……出力
電圧検出回路、５……判別回路、６……記憶部、
７……負荷、P0〜Pn……電源ユニツト。
The figure is a block diagram for explaining a power supply unit abnormality detection method according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Power supply unit abnormality detection circuit, 2... Control circuit, 3... Output voltage increase instruction circuit, 4... Output voltage detection circuit, 5... Discrimination circuit, 6... Storage section,
7...Load, P0 to Pn...Power supply unit.
Claims (1)
され、負荷に対して所定出力電圧が出力される電
源システムにおける電源ユニツト異常検出方式に
おいて、 上記電源ユニツト各々に対して出力電圧上昇指
示を行なう出力電圧上昇指示回路と、上述各々の
電源ユニツトの出力結果を監視する出力電圧検出
回路とを有し、上述ｎ個の電源ユニツト中、ｎ−
ｍ個（但し、ｍはｎ未満の整数）を選ぶ複数通り
の組合せについて出力電圧上昇指示を行なうと共
に、該複数通りの組合せの各々について出力結果
を格納し、該出力結果全てに基き異常電源ユニツ
トの判別を行なうことを特徴とする電源ユニツト
異常検出方式。[Scope of Claims] 1. In a power supply unit abnormality detection method in a power supply system in which the outputs of each of n power supply units are connected in parallel and a predetermined output voltage is output to a load, an output for each of the above power supply units is provided. It has an output voltage increase instruction circuit that issues a voltage increase instruction, and an output voltage detection circuit that monitors the output results of each of the above power supply units, and among the above n power supply units, n-
Instructs to increase the output voltage for multiple combinations of m (where m is an integer less than n), stores the output results for each of the multiple combinations, and detects an abnormal power supply unit based on all of the output results. A power supply unit abnormality detection method characterized by determining.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8238280A JPS579224A (en) | 1980-06-18 | 1980-06-18 | Power unit malfunction detecting system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8238280A JPS579224A (en) | 1980-06-18 | 1980-06-18 | Power unit malfunction detecting system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS579224A JPS579224A (en) | 1982-01-18 |
| JPS6360611B2 true JPS6360611B2 (en) | 1988-11-25 |
Family
ID=13773026
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8238280A Granted JPS579224A (en) | 1980-06-18 | 1980-06-18 | Power unit malfunction detecting system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS579224A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60204221A (en) * | 1984-03-28 | 1985-10-15 | 日本電気株式会社 | Power source supply system |
| JP5347795B2 (en) * | 2009-07-21 | 2013-11-20 | 富士通株式会社 | Power supply device, power supply unit diagnosis device, and control method for power supply device |
-
1980
- 1980-06-18 JP JP8238280A patent/JPS579224A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS579224A (en) | 1982-01-18 |
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