JP3152844B2 - Gm-C filter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Gm-C filter which has good linear performance, can operate with low current consumption, and has excellent filter accuracy.

[0002]

2. Description of the Related Art In recent years, Gm-C filters have attracted attention as filters that can be made into LSIs and can operate at high speed and that make use of the characteristics of a time continuous system. The Gm-C filter includes a Gm amplifier, a capacitance, and a circuit for controlling a Gm value.

As is conventionally known, the Gm-C filter is a continuous-time filter, so that it can operate at a high speed and can use a switched capacitor filter (SC).
Since it does not have the folding effect as in F), it has attracted attention in recent years. However, due to the inherent problem of linearity of the Gm amplifier, a practical level has not been known. In order to solve this problem, the present applicant has disclosed Japanese Patent Application Laid-Open No. 6-152320 as shown in FIG.
The Gm-C filter shown in FIG.

The Gm-C filter shown in FIG. 10 is a biquad filter having good linear performance and capable of operating with low current consumption. Here, 80 is a Gm amplifier that controls the gain of the filter, 81 and 82 are Gm amplifiers that control the cutoff frequency of the filter, 83 is a Gm amplifier that controls the Q value of the filter, and 84 is an in-phase output signal of the Gm amplifier 81. Amplifier for controlling the level, 8
Reference numeral 5 denotes an amplifier for controlling the in-phase output signal levels of the Gm amplifiers 80, 82, and 83. Reference numeral 86 denotes a bias circuit for generating an in-phase signal level, which is usually constituted by a PLL circuit.

FIG. 2 shows a detailed circuit configuration within the broken line shown in FIG. In FIG. 2, M ₁ and M ₂ are input MOSFETs. M ₃ and M ₄ are MOSFETs for common-mode level control. M _5, M ₆ is a cascode MOSFET for increasing the DC gain. 6 M indicating thus the first Gm amplifier Gm ₁ in M ₁ ~M ₆
It is composed of OSFET.

Further, the CMC is common mode control amplifier Figure 2, B ₁₁ is the reference voltage input terminal for determining the common mode, B ₁₂ is MOSFET M ₃ for controlling the common mode,
Input terminal of M _4, B ₁₃ is a bias terminal of the cascode MOSFET. Gm ₂ is a second Gm amplifier, and its circuit configuration is the same as Gm ₁ .

Next, the operation of the circuit shown in FIG. 2 will be described. First, when the input voltage V _in to the input terminal I _n1, I _n2 as an initial value is applied, it is assumed that coincides with the voltage value V _B11 whose output level is applied to the bias terminal B _11. Here, consider the case where the common-mode voltage applied to the input terminals _In1 and _In2 increases.

[0008] When you S'Agaro than the V _B11 by the output level inverter operation this time. Further, from the output terminal B ₁₂ of the in-phase level control amplifier CMC, a voltage shown in the following equation (1) is output.

[0009]

(Equation 1)

[0010] Thus, the voltage of the terminal B ₁₂ will be decreased from the initial value level, the output voltage is going throw its hat again. Then, when the gain of the control amplifier CMC is sufficiently higher than the gain of the Gm _1, the output level (Vout11
+ Vout12) / 2 is always equal to the V _B11. As a result, the Gm value of Gm ₂ , which is the next-stage Gm amplifier, is equal to the voltage V applied to the third input terminal of the control amplifier CMC.
It will be controlled by _B11 .

That is, in the circuit shown in FIG.
phase output level of the Gm amplifiers labeled m ₁ will be consistent with the B11. The Gm value of this Gm amplifier is

[0012]

Gm = 2K (V _IN −V _TH ) (2) Here, K is a constant including the size ratio of the transistor, V _IN is an input signal applied to the gate terminals of M ₁ and M ₂ , and V _TH is a threshold voltage of the MOSFET.

According to the above equation (2), the Gm amplifier G
Since the m value is determined by the input signal level, the Gm value can be controlled by controlling the in-phase input level. Therefore, by controlling the in-phase output signal level of the amplifier denoted by Gm ₁ in FIG. 2 by the amplifier CMC, Gm ₂
Can be controlled. As a result, the Gm value of Gm ₂ becomes linear with respect to the input signal as shown in the equation (2), so that the linear performance is excellent.

[0014]

However, in FIG. 10 showing a conventional filter circuit, the Q value of the filter is determined by the ratio of the geometric mean of the Gm values of the Gm amplifiers 81 and 82 and the Gm value of the Gm amplifier 83 (√ (Gm ₂ , Gm ₃ ): Gm
₄ ), the geometric mean of the Gm values of the Gm amplifiers 81 and 82 √ (G
m ₂ , Gm ₃ ) and the Gm value (Gm ₄ ) of the Gm amplifier 83 need to be increased.

For example, when designing the filter so that the Q value is 20, if the Gm values of the Gm amplifiers 81 and 82 are the same (Gm ₂ = Gm ₃ ), Gm ₃ : Gm ₄ =
20: 1. When the size W / L of the MOSFET is calculated so as to maintain this ratio, the input MOS of the Gm amplifier 82 is calculated.
FET size is W / L = 40μ / 6μ, Gm amplifier 83
Is W / L = 2 μ / 6 μ (W: channel width of MOSFET, L: channel length of MOSFET).

At this time, to maintain the relative accuracy of the size, G
It is sufficient to use 20 m / amps 82 with W / L = 2 μ / 6 μ, but a small device size of W / L = 2 μ / 6 μ is not a preferable size in terms of manufacturing technology. On the other hand, in order to improve relative accuracy, W /
The unit size may be L = 20 μ / 60 μ. However, if the size is large, the channel length L of the MOSFET becomes large. When implementing, performance is impaired.

Here, the parasitic pole = μC _OX / L ² . Here, μ represents the carrier mobility, C _OX represents the gate capacitance value, and L represents the channel length of the MOSFET.

As described above, since the Gm value of the Gm amplifier which determines the cutoff frequency, the filter gain value and the Q value of the filter depends on the common mode input voltage level of the Gm amplifier, the relative accuracy of the W / L is determined. Is an important factor in filter design.

In view of the foregoing, a first object of the present invention is to provide a Gm value control system of a Gm amplifier that defines a cutoff frequency for a Gm value control system of a Gm amplifier that defines a Q value or a gain of a filter. An object of the present invention is to provide a Gm-C filter configured to be able to achieve desired electric characteristics without being restricted by a device size by being completely independent of a system.

A second object of the present invention is to provide a Gm-C filter capable of accurately setting a Q value, a filter gain, and a cutoff frequency while having low distortion and low current consumption. is there.

[0021]

In order to achieve the above object, the present invention provides a Gm including a Gm amplifier for controlling a gain, a cutoff frequency, and a Q value of a filter.
For a Gm amplifier that controls the cutoff frequency of the filter, the Gm value is controlled by the in-phase input signal value of the Gm amplifier, and the gain and / or Q value of the filter is controlled. The Gm value of the Gm amplifier is controlled by a bias value supplied from separately provided bias setting means (see FIG. 1).

Here, the Gm amplifier for controlling the cutoff frequency includes a differential input type MOSFET pair and a MOSFET pair having a gate input terminal for common mode level control connected in series to form a pair of differential output terminals. It is preferable to supply the output current from the power supply (see FIG. 2).

In addition, a voltage corresponding to a difference between an output voltage of the Gm amplifier for controlling the cutoff frequency and a predetermined voltage is applied to an in-phase level control terminal of the Gm amplifier for controlling the cutoff frequency. It is preferable to provide a means (see FIG. 1).

G for controlling the cutoff frequency
a first Gm amplifier in which a differential input type MOSFET pair and a MOSFET pair having a gate input terminal for common mode level control are connected in series, and supply an output current from a pair of differential output terminals; A second Gm amplifier connected to the pair of differential output terminals, and three input terminals; a first and a second input terminal having a pair of differential output terminals of the first Gm amplifier; The third input terminal is connected to a bias voltage source for controlling the Gm value of the second Gm amplifier, and the common mode level control gate input included in the first Gm amplifier is connected to the third input terminal. And a common-mode level control amplifier having an output terminal for applying a control voltage to a terminal thereof, so that a Gm value of the second Gm amplifier is
The control can also be performed by a bias voltage applied to a third input terminal of the common mode level control amplifier (see FIG. 2).

Further, the Gm amplifier for controlling the gain and / or the Q value includes a differential input type MOSFET pair,
A current source MOSFET connected to the source side of the differential input type MOSFET pair, and a predetermined bias voltage may be applied to a control gate of the current source MOSFET. (See FIG. 3). Alternatively, the Gm amplifier for controlling the gain and / or Q value is a differential input type Mm.
An OSFET pair; a current source MOSFET connected to the source side of the differential input type MOSFET pair;
Load MOSF connected to the drain side of OSFET pair
It is preferable to have an ET pair and make the current value of the current source MOSFET coincide with the current value of the load MOSFET pair (see FIG. 3).

A differential input MOSFET of a Gm amplifier for controlling the cutoff frequency according to claim 2.
It is preferable that the polarity of the differential input MOSFET of the Gm amplifier for controlling the gain and / or the Q value in claim 5 is reversed (FIG. 2).
(See FIG. 3).

[0027]

According to the above configuration of the present invention, a Gm amplifier having characteristics of low distortion and low current consumption is used as a Gm amplifier for defining a cutoff frequency of a filter.
Gm defining the gain and / or Q value of the filter
As the amplifier, a Gm amplifier capable of setting the Gm value independently of the common-mode input voltage can be used. Therefore, as the device used for each Gm amplifier, an optimum device in terms of response speed and relative accuracy should be appropriately selected. Becomes possible.

[0028]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block configuration of a Gm-C filter to which the present invention is applied. In the figure, reference numerals 11 to 14 are Gm amplifiers. G shown as 12, 13 of them
The m amplifier is a Gm amplifier related to the cutoff frequency, and uses the circuit shown in FIG. 14 is a Gm amplifier related to the Q value, and 11 is a Gm amplifier related to the gain of the filter. Reference numerals 15 and 16 denote capacitors, and reference numerals 17 and 18 denote amplifiers for controlling the in-phase output signal levels of the Gm amplifiers 12 and 13.

Reference numeral 2 denotes a PLL circuit for controlling the Gm values of the Gm amplifiers 12 and 13. The PLL circuit uses a Gm amplifier having the same circuit configuration as the Gm amplifiers 12 and 13. 3 is a PL that controls the Gm value of the Gm amplifiers 11 and 14.
This PLL circuit includes Gm amplifiers 11, 1
4 uses a Gm amplifier having the same circuit configuration. The circuits used in the Gm amplifiers 11 and 14 are shown in FIG.
Shown in

As described above, the Gm amplifiers 12 and 13 use the circuit shown in FIG. Therefore, as described above, there is an advantage that the linear performance is excellent and the current consumption can be suppressed. However, control of the Gm value requires that the common mode input voltage level of the Gm amplifier be controlled by the amplifier.

On the other hand, a Gm amplifier that controls the Q value or the gain uses a Gm amplifier different from the configuration in FIG.
Specifically, the Gm value control of these Gm amplifiers employs a circuit configuration irrelevant to the common-mode input voltage level. By doing so, the cutoff frequency and the Q value / gain can be controlled independently, so that even if the ratio of the Gm value of the Gm amplifier that determines the cutoff frequency to the Gm value that determines the Q value increases, This has the advantage that the size ratio of the transistors can be set independently. In other words, the fact that the size of the transistor can be set independently can eliminate the necessity of using a large number of unit transistors of a small size that is not preferable in terms of relative accuracy in order to secure relative accuracy, and also reduce the number of unit transistors. The advantage also arises.

FIG. 3 shows an example of a circuit used for the Gm amplifiers 11 and 14 in FIG. In FIG. 3, reference numeral 31 denotes a current source MOSFET for controlling the Gm value, and a bias voltage generated from the PLL circuit 3 is used as the bias voltage. Reference numerals 32 and 33 denote input MOSFET pairs, which are input MOSFs of the Gm amplifiers 12 and 13 in FIG.
It has the opposite polarity to the ET pair. Because G in FIG. 1
The polarity of the input MOSFET of the m amplifiers 12 and 13 is NMO
In the case of S, the signal operating point in FIG. 1 is biased to the V _SS side, and when the Gm amplifier shown in FIG. 3 is used in FIG. _A signal range can be provided up to the _SS side.

Reference numerals 34 and 35 denote current source MOSFETs for supplying a bias current value such that the output level can achieve a desirable output voltage level in the circuit of FIG.
It is. That is, the current flowing through the MOSFET 31 and M
If the sum of the currents flowing through the OSFETs 32 and 33 is set to be the same, the output current value is zero when there is no signal, so that it is more preferable because it does not affect other circuits. Conversely, when the currents do not match, for example, in the circuit of FIG. 1, an output current is constantly generated from the Gm amplifier 14, while the in-phase output signal level of the Gm amplifier 13 is set to a certain value in order to set the in-phase output signal level. A burden is placed on the amplifier 18 that controls the output signal level, and in some cases, delicate frequency control may not be possible.

For this purpose, the MOSFET 3 shown in FIG.
A bias voltage may be applied to the transistors 4 and 35 by the bias circuit 38 including the MOSFETs 36 and 37 so that half of the current of the MOSFET 31 flows.

FIG. 4 is a specific circuit diagram of the PLL circuit 2 shown in FIG. This PLL circuit is a bias generation circuit for controlling the Gm value of the Gm amplifiers 12 and 13 in FIG. In FIG. 4, reference numerals 41 to 44 denote Gm amplifiers.
It is necessary to use a circuit having the same configuration as the m amplifiers 12 and 13. The reason will be clarified in the following description of the operation of the PLL circuit. Gm amplifier 4
The same Gm amplifier is used for 1 to 44.

Also, 45 and 46 in FIG.
And 48 are amplifiers for controlling the in-phase output signal level used for the same reason as 17 and 18 in FIG.

Gm-C having these elements 41 to 48
The filter has a low-pass filter characteristic when the input terminal is 40 and the output terminal is 40a, and at the same time, the phase shift is 0 ° in the low band and 180 ° in the high band as shown in FIG. , The phase shift is 90 ° at the cutoff frequency. That is, when the frequency of the input signal coincides with the cutoff frequency, the filter input signal and the filter output signal pass through the comparators 49 and 50 and further pass through the exclusive OR circuit EXOR functioning as a phase comparator. The frequency of the output signal is twice that of the input signal, and the periods of the high-level logic and the low-level logic are equal (so-called duty ratio is 50%). At this time, there is no change in the DC output level of the integrator even after passing through the integrator (INT) functioning as a low-pass filter, and a phase locked state can be realized.

If the cutoff frequency of the filter composed of 41 to 48 is smaller than the set value, the phase delay becomes larger than the design value, as can be seen from FIG. As a result, in the output of the phase comparator EXOR, the period of the high-level logic is shorter than the period of the low-level logic, and the integrator operates in a direction to lower the output level. In a device that generates a bias voltage when the output level drops,
The Gm values of all the Gm amplifiers are increased.
In particular, the Gm values of the Gm amplifiers 42 and 43 determine the cutoff frequency of the filter composed of 41 to 48, and the cutoff frequency increases as the Gm value increases. Then, the output level of the integrator shifts in a direction in which the cutoff frequency of the filter becomes equal to the design value, and finally the duty ratio of the output signal of the phase comparator EXOR becomes 5
When it reaches 0% (ie, when the cutoff frequency of the filter becomes equal to the design value), the integrator output falls to a certain level.

When the cutoff frequency of the filter is higher than the design value, the same operation is performed. Finally, the cutoff frequency of the filter becomes equal to the design value, and the output of the integrator falls to a certain level. Gm amplifier 4
Since the Gm values of 1, 44 are irrelevant to the cutoff frequency, it is not necessary to have the same circuit configuration as the Gm amplifiers 42, 43. However, from the viewpoint of facilitating circuit design, it is preferable to use the same Gm amplifier.

FIG. 7 is a specific circuit diagram of the PLL circuit 3 shown in FIG. 1, and controls the Gm value in the Gm amplifiers 11 and 14 in FIG. In FIG.
It is necessary to use a circuit having the same configuration as the Gm amplifiers 11 and 14 in FIG. The reason will be clarified in the following description of the operation of the PLL circuit. Because of the simplicity of the circuit, Gm
The same Gm amplifier circuit is used for the amplifiers 51 to 54. 55 and 56 are capacitors.

The Gm-C filter having the elements 51 to 56 has a low-pass filter characteristic when the input terminal is 57 and the output terminal is 57a, and the phase shift is 0 in the low band as shown in FIG. °, phase shift 18 at high frequencies
0 °, 90 ° phase shift at cutoff frequency
Has the following phase characteristics. That is, when the frequency of the input signal matches the cutoff frequency, the filter input signal and the filter output signal are output from the comparators 59 and 6.
When the signal passes through 0 and further passes through the exclusive OR circuit EXOR functioning as a phase comparator, the output signal has a frequency twice that of the input signal, and the respective periods of the high-level logic and the low-level logic become equal (so-called “high-level logic”). Duty ratio 50%
Becomes). At this time, the DC output level of the integrator does not change even after passing through the integrator INT which also functions as a low-pass filter, and a phase locked state can be realized.

If the cut-off frequency of the filter composed of 51 to 56 is smaller than the design value, the phase delay becomes larger than the design value, as can be seen from FIG. As a result, in the output of the phase comparator EXOR, the period of the high-level logic is shorter than the period of the low-level logic, and the integrator operates in a direction to lower the output level. In a device that generates a bias voltage when the output level drops,
The Gm values of all the Gm amplifiers are increased.
In particular, the Gm values of the Gm amplifiers 52 and 53 determine the cutoff frequency of the filter composed of 51 to 56, and the cutoff frequency increases as the Gm value increases. Accordingly, the output level of the integrator shifts in the direction in which the cutoff frequency of the filter becomes equal to the design value, and finally the duty ratio of the output signal of the phase comparator EXOR becomes 5
When it reaches 0% (ie, when the cutoff frequency of the filter becomes equal to the design value), the integrator output falls to a certain level.

When the cutoff frequency of the filter is higher than the design value, the same operation is performed. Finally, the cutoff frequency of the filter becomes equal to the design value, and the output of the integrator falls to a certain level. Gm amplifier 5
Since the Gm values of 1, 54 are irrelevant to the cutoff frequency, it is not necessary to have the same circuit configuration as the Gm amplifiers 52, 53. However, from the viewpoint of facilitating circuit design, it is preferable to use the same Gm amplifier.

In the circuit of FIG. 1, the Gm amplifier 11 for controlling the gain of the filter and the Gm amplifier 14 for controlling the Q value have the same circuit configuration.
If the Gm value of the m amplifier 11 has a value closer to the Gm value of the Gm amplifiers 12 and 13 for controlling the cutoff frequency than the Gm value for the Q value, the same circuit as the Gm amplifiers 12 and 13 is used. It is more preferable to use.

In the circuit shown in FIG.
Although the Gm amplifier of FIG. 2 which is excellent in terms of low current consumption is not used for the filters 1 and 14, the Gm value of the Q-value control amplifier is Since the Gm value of the cut-off frequency control Gm amplifier is about 1 / Q times smaller than the Gm value, and at the same time, the current consumption is also a small value. Therefore, even if the circuit of FIG. And as a result,
The low current consumption characteristics are inherited.

Further, any circuit other than the circuit shown in FIG. 3, such as the circuit shown in FIG. 8, may be used for the Gm amplifiers 11 and 14 as long as the Gm value is determined independently of the in-phase input signal level. It may be a configuration. In the circuit of FIG. 8, reference numerals 61 and 62 denote input MOSFETs, 63 to 6
6 is a constant current source MOSFET, and 67 and 68 are MOSFETs for determining the Gm value.

FIG. 9 shows another embodiment of the present invention. This embodiment is a sixth-order bandpass filter (BPF) configured in a Reprog type. In the figure, 101 to 113
Is a Gm amplifier. Among them, 101 to 106 are Gm amplifiers for determining the cutoff frequency of the filter, and the circuit of FIG. 2 is used. Reference numerals 107 to 112 denote Gm amplifiers for determining the Q value of the filter, for example, the circuit shown in FIG. 3 is used. 1
Reference numeral 13 denotes a Gm amplifier that determines the gain of the filter, for example, the circuit shown in FIG. 114 to 119 are capacity, 12
Reference numerals 0 to 125 denote amplifiers for controlling the in-phase output signal levels of the Gm amplifiers 101 to 106. 126 is a Gm amplifier 1
This PLL circuit controls Gm values of 01 to 106.
The circuit as shown in FIG. 4 can be used for the LL circuit. The Gm amplifiers 42 and 43 in FIG.
The same circuit configuration as 1 to 106 is used.

127 is the Gm of the Gm amplifiers 107 to 113
This is a PLL circuit for controlling a value, and a circuit as shown in FIG. 7 can be used as the PLL circuit. The Gm amplifiers 52 and 53 in FIG. 7 have the same circuit configuration as the Gm amplifiers 107 to 113.

In each embodiment shown in FIGS. 1 and 9, each signal line is a single line output (single signal). However, in order to improve distortion characteristics and S / N characteristics, each signal line is shown in FIG. Such full differential output is also possible. In this case, the same effect as in the above-described embodiment can be obtained.

[0051]

As described above, according to the present invention, the Gm of the Gm amplifier for defining the Q value or the gain of the filter.
For the m-value control system, G that defines the cutoff frequency
Since the configuration is completely independent of the Gm value control system of the m amplifier, low distortion and low current consumption characteristics can be maintained, and the above characteristics are impaired even when the gain and / or Q value are increased. Without this, it is possible to improve the accuracy of the gain and / or Q value and the cutoff frequency.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a Gm-C filter according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific example of the Gm amplifier shown in FIG.

FIG. 3 is a circuit diagram showing a specific example of the Gm amplifier shown in FIG.

FIG. 4 is a block diagram illustrating an example of a PLL circuit 2 illustrated in FIG. 1;

FIG. 5 is a diagram illustrating phase characteristics when a filter in a PLL circuit is ideal.

FIG. 6 is a diagram illustrating phase characteristics when a filter in a PLL circuit is shifted from an ideal case to a lower frequency.

FIG. 7 is a block diagram showing an example of a PLL circuit 3 shown in FIG.

FIG. 8 is a circuit diagram showing a specific example of the Gm amplifier shown in FIG.

FIG. 9 is a block diagram illustrating a Gm-C filter according to a second embodiment of the present invention.

FIG. 10 is a block diagram showing a conventionally known Gm-C filter.

[Explanation of symbols]

 2,3 PLL circuit 11 Gm amplifier for gain control 12,13 Gm amplifier for cutoff frequency control 14 Gm amplifier for Q value control 15,16 Capacitance 17,18 Amplifier for in-phase output signal level control

Claims (7)

(57) [Claims] 1. The filter gain, cutoff frequency,
Gm-C provided with each Gm amplifier for controlling the Q value
A Gm amplifier for controlling a cutoff frequency of the filter, the Gm value being controlled by an in-phase input signal value of the Gm amplifier, and the Gm amplifier controlling a gain and / or a Q value of the filter.
A Gm-C filter, wherein the Gm value of the amplifier is controlled by a bias value supplied from separately provided bias setting means. 2. The Gm amplifier according to claim 1, wherein the Gm amplifier for controlling the cutoff frequency includes a pair of a differential input type MOSFET and a pair of MOSFETs having a gate input terminal for common mode level control connected in series. A Gm-C filter that supplies an output current from a differential output terminal. 3. The Gm amplifier according to claim 1, further comprising: a voltage corresponding to a difference between an output voltage of the Gm amplifier for controlling the cutoff frequency and a predetermined voltage, and a Gm amplifier for controlling the cutoff frequency. A Gm-C filter comprising means for applying a signal to an in-phase level control terminal. 4. The Gm amplifier for controlling the cutoff frequency according to claim 1, wherein a differential input type MOSFET pair and a MOSFET pair having a gate input terminal for common mode level control are connected in series,
A first Gm amplifier that supplies an output current from a pair of differential output terminals; a second Gm amplifier connected to the pair of differential output terminals; The second input terminal is connected to a pair of differential output terminals of the first Gm amplifier, and the third input terminal is connected to a bias voltage source for controlling a Gm value of the second Gm amplifier. And a common-mode level control amplifier having an output terminal for applying a control voltage to the common-mode level control gate input terminal included in the first Gm amplifier. A Gm-C filter, wherein a value is controlled by a bias voltage applied to a third input terminal of the common mode level control amplifier. 5. The Gm amplifier according to claim 1, wherein the Gm amplifier controlling the gain and / or the Q value includes a differential input type MOSFET pair and the differential input type MOSFET.
A Gm-C filter comprising: a current source MOSFET connected to the source side of the T pair; and applying a predetermined bias voltage to a control gate of the current source MOSFET. 6. The Gm amplifier according to claim 1, wherein the Gm amplifier for controlling the gain and / or Q value includes a differential input type MOSFET pair and the differential input type MOSFET.
A current source MOSFET connected to the source side of the T pair, and a load MOSFET pair connected to the drain side of the differential input type MOSFET pair, the current value of the current source MOSFET and the current of the load MOSFET pair A Gm-C filter characterized by matching values. 7. The polarity of the differential input MOSFET of the Gm amplifier for controlling the cutoff frequency according to claim 2, and the polarity of the differential input MOSFET of the Gm amplifier for controlling the gain and / or Q value according to claim 5. Gm-C filters characterized in that: