JP3146672B2 - A thin-film laminated magnetic induction element and an electronic device using the same. - Google Patents

A thin-film laminated magnetic induction element and an electronic device using the same.

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Publication number
JP3146672B2
JP3146672B2 JP24535592A JP24535592A JP3146672B2 JP 3146672 B2 JP3146672 B2 JP 3146672B2 JP 24535592 A JP24535592 A JP 24535592A JP 24535592 A JP24535592 A JP 24535592A JP 3146672 B2 JP3146672 B2 JP 3146672B2
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JP
Japan
Prior art keywords
magnetic
magnetic induction
thin film
induction element
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP24535592A
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Japanese (ja)
Other versions
JPH0696952A (en
Inventor
一夫 松崎
洋一 了戒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Priority to JP24535592A priority Critical patent/JP3146672B2/en
Publication of JPH0696952A publication Critical patent/JPH0696952A/en
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Expired - Lifetime legal-status Critical Current

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  • Coils Or Transformers For Communication (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はスイッチング電源のワン
チップ化等のため半導体製造技術を利用して集積回路装
置のチップに搭載するに適する薄膜積層形磁気誘導素子
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin-film magnetic induction device suitable for mounting on a chip of an integrated circuit device by utilizing a semiconductor manufacturing technique for making a switching power supply into one chip.

【0002】[0002]

【従来の技術】チョッパ装置やスイッチング電源等の小
形の電子装置は従来からインダクタや変圧器等の受動素
子と個別半導体素子や集積回路等の能動素子とを組み合
わせて構成されて来たが、能動素子側の半導体技術の急
速な進歩に比べて受動素子側の技術進歩は立ち遅れぎみ
であり、とくにインダクタや変圧器等の磁気誘導素子は
集積回路装置と比べると体格が非常に大きくために電子
装置の小形化を図る上で最大の隘路になっている。この
ため、電子装置のチョッピングやスイッチングの動作周
波数を1MHz以上に高めて小形化をいわば側面から容易
にするとともに、磁気誘導素子自体の構造面でも種々の
試みがなされている。
2. Description of the Related Art Conventionally, small electronic devices such as chopper devices and switching power supplies have been constructed by combining passive elements such as inductors and transformers with active elements such as individual semiconductor elements and integrated circuits. The technological progress on the passive device side is lagging behind the rapid progress in the semiconductor technology on the device side.Especially, magnetic induction devices such as inductors and transformers are much larger in size than integrated circuit devices, so electronic devices It is the biggest bottleneck for miniaturization of. For this reason, various attempts have been made to increase the operating frequency of chopping and switching of the electronic device to 1 MHz or more to facilitate downsizing from the side, and also to improve the structure of the magnetic induction element itself.

【0003】例えば、特開昭61-219114 号公報に開示さ
れた技術では磁性繊維を縦糸に極細銅線を横糸にして編
んだ織物構造でインダクタが構成される。特開平1-1512
11号公報の技術では磁気誘導素子がセラミックの積層構
造体から構成される。また、特開平2-275606号公報には
可撓性フィルムにコイルを担持させてそれを両側から磁
性シートで挟み込んだ構造の平面形のインダクタが開示
されている。さらに、特開平1-276708号公報には上述の
特開昭61-219114 号公報による織物構造のインダクタを
薄膜積層体で構成することが提案されている。
For example, in the technique disclosed in Japanese Patent Application Laid-Open No. 61-219114, an inductor is constituted by a woven structure in which magnetic fibers are knitted with warp yarns and ultrafine copper wire with weft yarns. JP 1-1512
In the technology disclosed in Japanese Patent Application Laid-Open No. 11, the magnetic induction element is formed of a ceramic laminated structure. Japanese Patent Application Laid-Open No. 2-275606 discloses a planar inductor having a structure in which a coil is supported on a flexible film and sandwiched between magnetic sheets from both sides. Furthermore, Japanese Patent Application Laid-Open No. 1-276708 proposes that an inductor having a woven structure according to the above-mentioned Japanese Patent Application Laid-Open No. 61-219114 is formed of a thin film laminate.

【0004】[0004]

【発明が解決しようとする課題】これらの従来技術から
もわかるように、磁気誘導素子の小形化には個別素子を
それに適した構造にする方向と, 能動素子用の半導体チ
ップ上に直接搭載ないし作り付ける方向とがあるが、電
子装置の全体構造を小形化しかつ面実装等の組み立ての
手間を極力省いて合理化できる点では後者の方向が明ら
かに有利であり、前述の特開昭61-219114 号公報および
特開平1-151211号公報の技術は個別素子を小形化する方
向なのであまり有利でない。特開平2-275606号公報の技
術は本質は個別素子であるがチップへの搭載に適すると
考えられる。しかし、数〜10mm角の小形チップに搭載で
きる程度までの小形化は実際には必ずしも容易でなく、
かつ個別素子である以上はチップと接続するための実装
作業が不可欠になる。特開平1-276708号公報の技術はこ
の点も解決し得るが、元来が織物構造なのでコイル用薄
膜導体と磁気回路用磁性薄膜を入り組ませる必要があ
り、実際にかかる構造の薄膜積層体を製造するのはかな
り厄介である。
As can be seen from these prior arts, in order to reduce the size of the magnetic inductive element, the direction in which the individual elements are adapted to the structure, and whether the individual elements are directly mounted on the semiconductor chip for the active element or not. The latter direction is clearly advantageous in that the overall structure of the electronic device can be reduced in size and the labor of assembling such as surface mounting can be reduced as much as possible and rationalized. The techniques disclosed in Japanese Patent Application Laid-Open No. HEI 11-51211 and Japanese Patent Application Laid-Open No. 1-151211 are not very advantageous because they tend to downsize individual elements. The technology disclosed in Japanese Patent Application Laid-Open No. 2-275606 is essentially an individual element, but is considered suitable for mounting on a chip. However, it is not always easy to reduce the size to a size that can be mounted on a small chip of several to 10 mm square.
In addition, as long as it is an individual element, mounting work for connecting to a chip is indispensable. The technology of Japanese Patent Application Laid-Open No. 1-276708 can solve this point, but since it is originally a woven structure, it is necessary to mix a thin film conductor for a coil and a magnetic thin film for a magnetic circuit. Is rather cumbersome to manufacture.

【0005】かかる問題に加えて、高周波領域内で磁気
誘導素子に高いQ値を持たせるのが困難な問題がある。
すなわち、従来から磁気誘導素子を小形化するにはまず
電子装置の動作周波数を上げて小さなインダクタンス値
でも所定のリアクタンス値が得られるようにしている
が、1MHz以上の周波数領域では磁気回路やコイル内の
高周波損失のために磁気誘導素子のインダクタンス値が
飽和し抵抗値が増加するので、動作周波数を上げるとQ
値が飽和ないしは逆に減少して来る。このため、動作周
波数を上げてもQ値を所定レベルに維持するために磁気
誘導素子の体格を小さくできなくなって来る。このよう
な現状に立脚して、本発明は集積回路等の半導体装置の
チップ上に直接かつ容易に作り込むに適した薄膜積層構
造をもち、かつ高周波領域内でもQ値を高く維持するこ
とができる磁気誘導素子を提供することを目的とする。
In addition to the above problem, there is a problem that it is difficult to make the magnetic induction element have a high Q value in a high frequency region.
That is, conventionally, in order to reduce the size of the magnetic induction element, the operating frequency of the electronic device is first increased so that a predetermined reactance value can be obtained even with a small inductance value. Because the inductance value of the magnetic induction element is saturated and the resistance value increases due to the high-frequency loss of
The value becomes saturated or conversely decreases. For this reason, even if the operating frequency is increased, the physical size of the magnetic induction element cannot be reduced in order to maintain the Q value at a predetermined level. Based on this situation, the present invention has a thin film laminated structure suitable for being directly and easily formed on a chip of a semiconductor device such as an integrated circuit, and can maintain a high Q value even in a high frequency region. It is an object of the present invention to provide a magnetic induction element that can be used.

【0006】[0006]

【課題を解決するための手段】本発明の磁気誘導素子に
よれば、所定の形状のコイルに形成された薄膜導体を1
対の磁性薄膜の相互間に挟み込んだ薄膜積層構造の磁気
誘導素子を複数の単位素子に分割し、前記磁性薄膜の透
磁率をμ、厚みをtM、両磁性薄膜の間隔をgとした場
合、磁気回路上の特性長λ=(μ・g・tM/2) 1/2
を各単位素子の平面的な外形サイズDより小さく設定
し、これらの単位素子を電気的に相互接続して1個の磁
気誘導素子を構成することによって上述の目的が達成さ
れる。
According to the magnetic induction element of the present invention, the thin film conductor formed in the coil having a predetermined shape is formed by one or more coils.
A magnetic induction element having a thin film laminated structure sandwiched between a pair of magnetic thin films is divided into a plurality of unit elements, and the permeability of the magnetic thin film is divided.
When the magnetic susceptibility is μ, the thickness is tM, and the distance between both magnetic thin films is g,
In this case, the characteristic length λ on the magnetic circuit = (μ · g · tM / 2) 1/2
Is set smaller than the planar outer size D of each unit element , and these unit elements are electrically interconnected to form one magnetic induction element, thereby achieving the above object.

【0007】上記構成にいう薄膜導体には銅やアルミ等
の導電率が高い金属を用いてそれを数〜数十μmの厚み
に成膜して、エッチングにより所定形状のコイルに形成
するのがよく、この際のコイル形状としては渦巻き状や
つづら折れ状がよく、とくに前者の形状が本発明では有
利である。磁性薄膜には軟磁性で高透磁率の強磁性体材
料を用いてこれを10〜数十μmの膜厚に望ましくはスパ
ッタ法等により非晶質状態で成膜するのがよい。なお、
この磁性薄膜の透磁率をμ,1対の磁性薄膜の間隔を
g,磁性薄膜の膜厚をtM とすると、上記構成中の磁気
回路の特性長λは例えばλ=(μgtM /2)1/2で与え
られる。1MHz以上の高周波領域における磁気誘導素子
のQ値を極力高めるにはそれを構成する各単位素子の外
形サイズ,例えば直径をこの特性長λよりも小さいめに
設定し、さらにはその10分の1程度ないしはそれ以下に
設定するのがとくに望ましい。
[0007] The thin film conductor of the above configuration is formed of a metal having a high conductivity such as copper or aluminum, and is formed into a film having a thickness of several to several tens of μm and formed into a coil having a predetermined shape by etching. The coil shape at this time is preferably a spiral shape or a broken shape, and the former shape is particularly advantageous in the present invention. As the magnetic thin film, a ferromagnetic material having a high magnetic permeability and a soft magnetic property is used, and it is preferable to form a film having a thickness of 10 to several tens μm in an amorphous state by a sputtering method or the like. In addition,
Assuming that the magnetic permeability of the magnetic thin film is μ, the interval between the pair of magnetic thin films is g, and the thickness of the magnetic thin film is t M , the characteristic length λ of the magnetic circuit in the above configuration is, for example, λ = (μgt M / 2) Given by 1/2 . In order to maximize the Q value of the magnetic induction element in a high frequency region of 1 MHz or more, the outer size, for example, the diameter of each unit element constituting the magnetic induction element is set to be smaller than this characteristic length λ. It is particularly desirable to set it to a degree or less.

【0008】また、上述のように薄膜導体と上下1対の
磁性薄膜とを備える薄膜積層構造の磁気誘導素子の製造
する方法としては、下層側磁性薄膜を下層側絶縁膜で覆
い、下層側絶縁膜の上にターン間絶縁膜を付けて薄膜導
体のコイルのターン間隙間に対応するパターンにエッチ
ングし、下層側絶縁膜とターン間絶縁膜の上側に薄膜導
体をターン間絶縁膜と同程度ないしそれ以下の膜厚で成
膜した上でエッチングによりそのターン間絶縁膜上の部
分を選択的に除去し、かつ薄膜導体とターン間絶縁膜を
上層側絶縁膜で被覆した後にその上側に上層側磁性薄膜
を配設するのが有利である。なお、上記ターン間絶縁に
は下層側絶縁膜とは異なる材質のものを用いてエッチン
グ上の選択性をもたせるのがよく、さらにはそのエッチ
ングにはリアクティブイオンエッチング法を利用するの
が有利である。
As described above, as a method of manufacturing a magnetic induction element having a thin film laminated structure including a thin film conductor and a pair of upper and lower magnetic thin films, a lower magnetic thin film is covered with a lower insulating film, and a lower insulating film is formed. An inter-turn insulating film is applied on the film and etched into a pattern corresponding to the gap between the turns of the coil of the thin-film conductor, and the thin-film conductor is formed on the lower insulating film and the inter-turn insulating film above the same level as the inter-turn insulating film. After the film is formed to a thickness less than that, the portion on the inter-turn insulating film is selectively removed by etching, and the thin-film conductor and the inter-turn insulating film are covered with the upper insulating film, and then the upper insulating film is formed thereon. It is advantageous to provide a magnetic thin film. It is preferable that the inter-turn insulation be made of a material different from that of the lower insulating film so as to provide etching selectivity. Further, it is advantageous to use a reactive ion etching method for the etching. is there.

【0009】[0009]

【作用】本発明の磁気誘導素子では半導体チップの上に
半導体プロセス技術を利用して容易に作り込めるようコ
イル用の薄膜導体を磁気回路用の1対の磁性薄膜で両側
から挟み込んだ単純な薄膜積層構造とするとともに、こ
の構造ではその平面的な外形サイズを従来の常識より思
い切って縮小することによって高周波領域内でのQ値を
高め得ることに着目して、磁気誘導素子を複数個の小形
でそれぞれQ値が高い単位素子に分割して作り込んだ上
で、それらを電気的に相互接続して1個の磁気誘導素子
とすることにより高周波領域でも高いQ値が得られるよ
うにする。以下、この原理を図1を参照して説明する。
In the magnetic induction element of the present invention, a simple thin film in which a thin film conductor for a coil is sandwiched between a pair of magnetic thin films for a magnetic circuit from both sides so that it can be easily formed on a semiconductor chip by using a semiconductor process technology. Focusing on the fact that this structure can increase the Q value in the high-frequency region by drastically reducing the planar outer size of the structure from conventional wisdom, and using a plurality of compact magnetic induction elements Then, a high Q value can be obtained even in a high frequency region by dividing into unit elements each having a high Q value and then electrically connecting them to form one magnetic induction element. Hereinafter, this principle will be described with reference to FIG.

【0010】図1(a) は上下1対の磁性薄膜21の相互間
に渦巻き状コイルに形成された薄膜導体22を挟み込んだ
構造の磁気誘導素子20の断面を示し、この磁気誘導素子
20は外形サイズないし直径がDの円形のインダクタとす
る。薄膜導体22の金属の電気抵抗率をρ, 膜厚をtC
し、それから形成された渦巻き状コイルの巻数をn,外
径をDo, 内径をDi, 各ターンの幅をd, ターン間の隙間
をsとすると、コイルの直流電気抵抗Rは、 R= (πρ/tC ) ・FR (1) となる。ただし、FR はコイルの寸法と形状と巻数の関
数であり、p=d+sとすると、FR =n(Do+s−np)
/d, またはFR =n(Di−s+np) /dであり、さらに
コイルの平均直径をDmとするとFR =n Dm/dである。
FIG. 1A shows a cross section of a magnetic induction element 20 having a structure in which a thin film conductor 22 formed in a spiral coil is sandwiched between a pair of upper and lower magnetic thin films 21.
Reference numeral 20 denotes a circular inductor having an outer size or diameter D. The electrical resistivity of the metal of the thin film conductor 22 is ρ, the film thickness is t C , the number of turns of the spiral coil formed therefrom is n, the outer diameter is Do, the inner diameter is Di, the width of each turn is d, and the distance between turns is Assuming that the gap is s, the DC electric resistance R of the coil is as follows: R = (πρ / t C ) · F R (1) Here, F R is a function of the size, shape, and number of turns of the coil. If p = d + s, F R = n (Do + s−np)
/ D, or F R = n (Di−s + np) / d, and if the average diameter of the coil is Dm, then F R = n Dm / d.

【0011】一方、磁気回路の方では磁性薄膜21の透磁
率をμ,膜厚をtM , 相互間隔をgとすると、その特性
長λは前述のように例えば、 λ=(μgtM /2)1/2 (2) で与えられ、図1(a) の磁気誘導素子20のインダクタン
スLは、 L= (πμtM /2) ・K・FL (3) で表せる。ただし、Kは特性長λと外径サイズDとコイ
ルのターン幅dで決まる係数であって、 K= (λ/d) /sin(D/λ) (4) で与えられる。また、FL は (1)式のFR に対応する関
数であり、磁気回路側の特性長λ, コイル側の寸法と巻
数等に関係する双曲線関数を含むかなり複雑な式(例え
ばIEEE, Magn., MAG-27, No.6, pp.709, 1991 を参照)
となるが、煩雑を避けるためここでは簡単にFR で表す
こととする。
On the other hand, in the magnetic circuit, when the magnetic permeability of the magnetic thin film 21 is μ, the film thickness is t M , and the mutual interval is g, the characteristic length λ is, for example, λ = (μgt M / 2) as described above. ) 1/2 is given by (2), the inductance L of the magnetic induction unit 20 of FIG. 1 (a), expressed by L = (πμt M / 2) · K · F L (3). Here, K is a coefficient determined by the characteristic length λ, the outer diameter size D, and the turn width d of the coil, and is given by K = (λ / d) / sin (D / λ) (4). F L is a function corresponding to F R in equation (1), and is a rather complicated equation including a hyperbolic function related to the characteristic length λ on the magnetic circuit side, dimensions and number of turns on the coil side (for example, IEEE, Magn. ., MAG-27, No.6, pp.709, 1991)
However, in order to avoid complication, it is simply represented by F R here.

【0012】さて、上述の (3)式の (πμtM /2) の
項を除いてインダクタンスLの値に対し最も支配的なの
は係数Kであり、本発明ではこの点に着目して係数Kを
大にするよう外径サイズDを設定する。すなわち外径サ
イズDを特性長λより小に,例えば10分の1以下に設定
したとすると、sin(D/λ) =D/λがほぼ成立するか
らK=λ2 /dDとなり、λよりDを小さくすればする
ほどKを大きくとれることがわかる。さらに、このよう
に外径サイズDを特性長λより充分小さく設定した場合
はK・FL =FR の関係がほぼ成立するので、磁気誘導
素子20のQ値は角周波数をω, 周波数をfとして (1)式
と (3)式から次式で表される。
The coefficient K is most dominant with respect to the value of the inductance L except for the term (πμt M / 2) in the above equation (3). In the present invention, the coefficient K is focused on this point. Set the outer diameter size D to be large. That is, if the outer diameter size D is set to be smaller than the characteristic length λ, for example, 1/10 or less, since sin (D / λ) = D / λ substantially holds, K = λ 2 / dD, and It is understood that the smaller the D, the larger the K can be. Further, when the outer diameter size D is set to be sufficiently smaller than the characteristic length λ, the relationship of K · F L = F R is almost established, so that the Q value of the magnetic induction element 20 is determined by setting the angular frequency to ω and the frequency to ω. f is expressed by the following equation from equations (1) and (3).

【0013】 Q=ωL/R=πf (μtM )(tC /ρ) (5) 実際に半導体チップ上に作り込む磁気誘導素子20では
(2)式中の磁性薄膜21の膜厚tM や相互間隔gは数十μ
m以下なので透磁率μを104 とすると特性長λは1mm程
度となり、従って (5)式は外径サイズDが 100μm程度
以下で成立するが実用的には1mm以下でもほぼ成立す
る。 (5)式からわかるようにQ値はコイルの巻数nやタ
ーン幅dに実質上依存せず、外径サイズDを特性長λよ
り小さいめに設定する本発明の場合は、磁性薄膜21に透
磁率μの高い材料を用いて膜厚tM を厚くし、かつ薄膜
導体22に電気抵抗率ρの低い材料を用いて膜厚tC を厚
くすることによってQ値を向上することができる。
Q = ωL / R = πf (μt M ) (t C / ρ) (5) In the magnetic induction element 20 actually formed on a semiconductor chip,
In the equation (2), the thickness t M of the magnetic thin film 21 and the mutual distance g are several tens μm.
Since the magnetic permeability μ is 10 4 , the characteristic length λ is about 1 mm. Therefore, the equation (5) holds when the outer diameter D is about 100 μm or less, but practically holds when the outer diameter D is about 1 mm or less. As can be seen from equation (5), the Q value does not substantially depend on the number of turns n and the turn width d of the coil, and in the case of the present invention in which the outer diameter D is set to be smaller than the characteristic length λ, the magnetic thin film 21 The Q value can be improved by increasing the film thickness t M by using a material having a high magnetic permeability μ and increasing the film thickness t C by using a material having a low electric resistivity ρ for the thin film conductor 22.

【0014】しかし、Q値が高くても外径サイズDが小
さいと充分なインダクタンス値Lやコイルの電流容量が
得られ難いので、本発明では図1(b) に示すように磁気
誘導素子20を複数個の単位素子30に分割して半導体チッ
プ10の上に作り込み、必要に応じて直列, 並列ないしは
直並列に相互接続する。なお、この図1(b) のように各
単位素子30の外形を配列上の面積効率のよい方形にして
も、容易に了解されるように図1(a) の円形の場合と同
様に本発明の利点が得られる。
However, if the outer diameter D is small even if the Q value is high, it is difficult to obtain a sufficient inductance value L and a current capacity of the coil. Therefore, in the present invention, as shown in FIG. Is divided into a plurality of unit elements 30 and formed on the semiconductor chip 10, and interconnected in series, parallel or series-parallel as necessary. It should be noted that, even if the outer shape of each unit element 30 is made to be a square with good area efficiency in arrangement as shown in FIG. The advantages of the invention are obtained.

【0015】ところで、図1(a) の薄膜導体22のコイル
ではそのターン間の間隔sをできるだけ小さくして巻き
ピッチpをターン幅dに近づけるのが有利になる。例え
ば、簡単化のためp=dとし, かつコイルの内径Diを0
とすると、 (1)式中のFR は前述のようにFR =n・Dm
/dで, コイルの平均直径DmはDm=ndであるから、F
R =n2 となって抵抗Rがn2 に比例する。一方、イン
ダクタンスLも周知のようにコイルの巻数nの二乗であ
るn2 に本質的に比例するから、結局のところQ値はコ
イルの巻数nにほとんど依存しなくなって例えば (5)式
で表せるような高いQ値を実現できる。このように、間
隙sは極力狭く, できれば薄膜導体22の膜厚tC の10分
の1以下にするのが望ましいが、通例のように薄膜導体
22をエッチングしてこれを明けると安定にエッチング可
能なアスペクト比tC /sは1が限界なので間隙sが膜
厚tC と同程度以上になってしまう。
By the way, in the coil of the thin film conductor 22 shown in FIG. 1A, it is advantageous to make the interval s between turns as small as possible to make the winding pitch p close to the turn width d. For example, let p = d for simplicity, and set the inner diameter Di of the coil to 0.
Then, F R in equation (1) is F R = n · Dm as described above.
/ D, the average diameter Dm of the coil is Dm = nd, so that Fm
R = n 2 and the resistance R is proportional to n 2 . On the other hand, as is well known, the inductance L is essentially proportional to n 2 which is the square of the number of turns n of the coil, so that the Q value does not substantially depend on the number of turns n of the coil and can be expressed by, for example, equation (5). Such a high Q value can be realized. As described above, the gap s is as narrow as possible, and it is desirable that the gap s be as small as 1/10 or less of the film thickness t C of the thin film conductor 22.
When the etching of 22 is made clear, the aspect ratio t C / s at which stable etching can be performed is limited to 1, so that the gap s becomes equal to or greater than the film thickness t C.

【0016】本発明の磁気誘導素子の製造方法はこの点
を解決するもので、前項中の記載のように薄膜導体と上
下1対の磁性薄膜を備える磁気誘導素子を製造するに際
し、まず下層側磁性薄膜を下層側絶縁膜で覆った後に、
下層側絶縁膜の上にターン間絶縁膜を付けてこれに低い
アスペクト比でエッチングを施すことによりコイルのタ
ーン間の狭い隙間sに対応するパターンに形成してお
き、次に下層側絶縁膜とターン間絶縁膜の上にコイル用
の薄膜導体をターン間絶縁膜と同程度ないしそれ以下の
膜厚で成膜した上で、簡単なエッチングを施してターン
間絶縁膜の上から薄膜導体をいわゆるリフトオフ方式で
除去するようにしたものである。以降は、薄膜導体とタ
ーン間絶縁膜を上層側絶縁膜で被覆してその上に上層側
磁性薄膜を配設することでよい。この本発明方法によれ
ば隙間sを薄膜導体の膜厚tC より狭くでき、ターン間
絶縁膜をリアクティブイオンエッチング法によりエッチ
ングすればその10分の1以下に狭めることができる。
The method of manufacturing a magnetic induction element according to the present invention solves this problem. When manufacturing a magnetic induction element including a thin film conductor and a pair of upper and lower magnetic thin films as described in the preceding paragraph, first, a lower layer side is formed. After covering the magnetic thin film with the lower insulating film,
An inter-turn insulating film is formed on the lower insulating film and is etched at a low aspect ratio to form a pattern corresponding to the narrow gap s between turns of the coil. A thin film conductor for a coil is formed on the inter-turn insulating film to a thickness equal to or less than that of the inter-turn insulating film, and then subjected to simple etching to form a thin-film conductor from above the inter-turn insulating film. The removal is performed by a lift-off method. Thereafter, the thin film conductor and the inter-turn insulating film may be covered with the upper insulating film, and the upper magnetic thin film may be disposed thereon. According to the method of the present invention, the gap s can be made smaller than the film thickness t C of the thin film conductor, and can be made one tenth or less of that by etching the inter-turn insulating film by the reactive ion etching method.

【0017】[0017]

【実施例】以下、図2と図3を参照して本発明の磁気誘
導素子の実施例を説明し、図4を参照してその製造方法
の実施例を説明する。図2は半導体チップ10の上に前述
の磁気誘導素子20を構成する単位素子30が2個並べて作
り込まれた状態を断面図で示すものである。半導体チッ
プ10は、図示のように例えばp形の半導体基体11を絶縁
膜12で覆い、その上側にアルミの配線膜13を単位素子30
を互いにこの例では直列接続するパターンで配設しかつ
絶縁膜12の要所に明けられた窓部内で半導体基体11の表
面に拡散されたn形層11aと接続し、さらにその上を保
護膜15で被覆してなり、薄膜積層構造の単位素子30はこ
の保護膜15上に作り込まれる。なお、図の例では保護膜
15の下側に配線膜13による段差を解消するために平坦化
膜14が設けられている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the magnetic induction element of the present invention will be described with reference to FIGS. 2 and 3, and an embodiment of a manufacturing method thereof will be described with reference to FIG. FIG. 2 is a sectional view showing a state in which two unit elements 30 constituting the above-described magnetic induction element 20 are formed on the semiconductor chip 10 side by side. As shown in the figure, a semiconductor chip 10 has, for example, a p-type semiconductor substrate 11 covered with an insulating film 12, and an aluminum wiring film 13 on the
Are connected to each other in a pattern connected in series in this example, and are connected to the n-type layer 11a diffused on the surface of the semiconductor substrate 11 in a window portion opened in a key portion of the insulating film 12, and a protective film is further formed thereon. The unit element 30 having a thin film laminated structure covered with 15 is formed on the protective film 15. In the example of the figure, the protective film
A flattening film 14 is provided below 15 to eliminate a step due to the wiring film 13.

【0018】各単位素子30は下層側磁性薄膜31と上層側
磁性薄膜36との相互間に渦巻き状のコイルに形成された
薄膜導体33を絶縁膜32と35を介し挟み込んでなり、コイ
ルのターン間のごく狭い隙間は図4で説明する方法で明
けられ、コイルの内径および外径側の端部は下層側磁性
薄膜31の窓ないし切り欠きと保護膜15の窓とを介して配
線膜13と接続される。また、上層側磁性薄膜36を覆うよ
うに窒化シリコン等の保護膜37が被覆される。なお、上
層側絶縁膜35の下側に下層側磁性薄膜31と薄膜導体33に
よる段差を埋めるため平坦化膜34が要所に設けられてい
る。
Each unit element 30 has a thin-film conductor 33 formed in a spiral coil interposed between a lower magnetic thin film 31 and an upper magnetic thin film 36 with insulating films 32 and 35 interposed therebetween. The very narrow gap between them is opened by the method described with reference to FIG. 4, and the inner and outer ends of the coil are connected to the wiring film 13 through the window or notch of the lower magnetic thin film 31 and the window of the protective film 15. Connected to Further, a protective film 37 such as silicon nitride is covered so as to cover the upper magnetic thin film. Note that a flattening film 34 is provided at a key position below the upper insulating film 35 to fill a step formed by the lower magnetic thin film 31 and the thin film conductor 33.

【0019】1対の磁性薄膜31と36は例えば透磁率μが
8000程度の軟磁性の78パーマロイをスパッタ法により非
晶質状態で成膜したもので、例えばその膜厚tM が9μ
m,相互間隔gが6μmとされる。この場合の磁気回路
の前述の特性長λは 220μmである。また、薄膜導体33
には電気抵抗率ρが3x10-8Ωmの銅を用い、例えばそ
の膜厚tC は3μmとされる。この実施例では各単位素
子30の外径サイズDは特性長λの10分の1の22μmに設
定され、これに応じコイルの外径Doは20μm,内径Diは
2μm, 巻数nは3, 巻きピッチpは3μm, 隙間sは
0.8μmにそれぞれ設定される。このような設定の単位
素子30を半導体チップ10上に図1(b) のように並べて作
り込んだ後に5MHzの周波数fで測定したところ、各単
位素子30あたりの直流抵抗Rは0.19Ω, インダクタンス
Lは 850nH, Q値は140 であり、前述の諸式から予測さ
れる値との大体の一致が得られた。
The pair of magnetic thin films 31 and 36 has, for example, a magnetic permeability μ.
8000 about soft 78 Permalloy which was deposited in an amorphous state by sputtering, for example, a thickness t M is 9μ
m, and the mutual interval g is 6 μm. The aforementioned characteristic length λ of the magnetic circuit in this case is 220 μm. Also, the thin film conductor 33
A copper electrical resistivity ρ is 3x10 -8 [Omega] m in, for example, a thickness t C are 3 [mu] m. In this embodiment, the outer diameter D of each unit element 30 is set to 22 μm, which is one tenth of the characteristic length λ. Accordingly, the outer diameter Do of the coil is 20 μm, the inner diameter Di is 2 μm, the number of turns n is 3, and the number of turns is three. The pitch p is 3 μm and the gap s is
Each is set to 0.8 μm. When the unit elements 30 having such a setting are arranged side by side on the semiconductor chip 10 as shown in FIG. 1B and measured at a frequency f of 5 MHz, the DC resistance R per each unit element 30 is 0.19Ω, the inductance is L was 850 nH and Q value was 140, which was roughly in agreement with the values predicted from the above formulas.

【0020】図3にこの単位素子30に対してインダクタ
ンスLとQ値を1〜10MHzの周波数範囲内で測定した結
果を示す。図からわかるように、インダクタンスLは10
MHz付近で若干低下の傾向はあるがほぼ一定値であり、
Q値は周波数fが高くなるにつれて次第に飽和する傾向
はあるが5MHz以上で 100以上の充分高い値を示す。な
お、この単位素子30は5MHzのQ値を主眼にして設計さ
れたものである。このQ値の周波数fに対する傾斜は前
述の (5)式からわかるように磁性薄膜31と36の透磁率μ
と薄膜導体33の電気抵抗率ρを一定とすると両者の膜厚
の積tM C に依存し、この積の大なものは低周波用に
小なものは高周波用に適する。これから本発明の磁気誘
導素子は高周波用にとくに有利なことがわかる。
FIG. 3 shows the results of measuring the inductance L and the Q value of the unit element 30 within a frequency range of 1 to 10 MHz. As can be seen, the inductance L is 10
There is a tendency to decrease slightly around MHz, but it is almost constant,
The Q value tends to be gradually saturated as the frequency f increases, but shows a sufficiently high value of 100 or more at 5 MHz or more. The unit element 30 is designed with a focus on the Q value of 5 MHz. The slope of the Q value with respect to the frequency f is determined by the magnetic permeability μ
When the electrical resistivity ρ of the thin film conductor 33 is constant, it depends on the product t M t C of the film thicknesses of the two, and a large product is suitable for a low frequency and a small product is suitable for a high frequency. This indicates that the magnetic induction element of the present invention is particularly advantageous for high frequencies.

【0021】ついで、図4を参照して本発明の磁気誘導
素子の製造方法の要点を図2の単位素子30用に薄膜導体
33のコイルを形成する過程を中心に説明する。単位素子
30は半導体チップ10がもちろんまだウエハの状態にある
間に作り込まれ、図4(a) のウエハ40には図2の下層側
磁性薄膜31が配設されていて図示の下層側絶縁膜32で覆
われているものとする。この下層側絶縁膜32には酸化シ
リコンとは別な例えば薄い窒化シリコンを用いるのがよ
い。この図4(a) の工程ではウエハ40の全面に酸化シリ
コン膜を成膜しフォトエッチングを施すことによりター
ン間絶縁35aを前述の 0.8μmの隙間sと同じ幅に形成
する。
Next, referring to FIG. 4, the main point of the method for manufacturing the magnetic induction element of the present invention will be described.
The process of forming 33 coils will be mainly described. Unit element
4 is formed while the semiconductor chip 10 is still in a wafer state. The lower magnetic thin film 31 of FIG. 2 is provided on the wafer 40 of FIG. It shall be covered with. The lower insulating film 32 is preferably made of, for example, thin silicon nitride other than silicon oxide. In the step of FIG. 4A, a silicon oxide film is formed on the entire surface of the wafer 40 and photoetching is performed to form an inter-turn insulation 35a having the same width as the above-mentioned gap s of 0.8 μm.

【0022】このターン間絶縁35a用の酸化シリコン膜
はウエハ40内にアルミの配線膜13がすでに作り込まれて
いるので350 ℃程度の低温下でシランと酸素との混合ガ
スのふん囲気内の減圧CVD法により成膜するのがよ
い。また、本発明方法ではその膜厚は薄膜導体33と同程
度が若干厚めにされ、薄膜導体33の膜厚tC が3μmの
とき例えば4μmとされる。この酸化シリコン膜のエッ
チングはもちろんフォトレジスト膜をマスクとして施す
が、ターン間絶縁35aの側面を図のように垂直にして狭
い幅sをねらいどおり正確にするためリアクティブイオ
ンエッチング法を利用するのが有利である。この際、異
方性エッチング条件とするためエッチングガスにはC2H6
とCHF3の混合ガスを用い、そのふん囲気圧力は例えば 1
50Pa程度とするのがよい。本発明方法では、このターン
間絶縁膜35aを狭い幅sで形成するためのエッチングを
図からわかるように1ないしそれに近いアスペクト比で
容易かつ正確に行なうことができる。
The silicon oxide film for the inter-turn insulation 35a is formed in an atmosphere of a mixed gas of silane and oxygen at a low temperature of about 350 ° C. since the aluminum wiring film 13 is already formed in the wafer 40. The film is preferably formed by a low pressure CVD method. Further, in the method of the present invention, the thickness of the thin film conductor 33 is set to be slightly larger than that of the thin film conductor 33, for example, 4 μm when the thickness t C of the thin film conductor 33 is 3 μm. The etching of the silicon oxide film is of course performed by using a photoresist film as a mask. The reactive ion etching method is used to make the side face of the inter-turn insulation 35a vertical as shown in FIG. Is advantageous. At this time, C 2 H 6 is used as an etching gas in order to set anisotropic etching conditions.
And a mixed gas of CHF 3 and its surrounding pressure is, for example, 1
It is good to be about 50Pa. According to the method of the present invention, the etching for forming the inter-turn insulating film 35a with a narrow width s can be easily and accurately performed with an aspect ratio of 1 or close to it as can be seen from the figure.

【0023】次の図4(b) は薄膜導体33の成膜工程であ
り、ウエハ40の全面上にこの実施例では銅をスパッタ法
等によって3μmの膜厚tC に成膜する。この際、ター
ン間絶縁35aの上側にも図では33aで示すように薄膜導
体が当然被着するが、金属の段差部の被覆性が悪いため
そのターン間絶縁35aの上端部分と重なる付け根付近で
は膜厚が非常に薄くなる。続く図4(c) の工程では簡単
なエッチングによってターン間絶縁35aの上の薄膜導体
部分33aを除去する。このエッチングは例えば5%のふ
っ酸液の望ましくは超音波浴中にウエハ40をごく短時間
浸漬するだけでよく、これにより上述の薄膜導体部分33
aの薄肉部からエッチング液が侵入してターン間絶縁35
aの上端部分の酸化シリコンが溶解するので、その上の
薄膜導体部分33aが剥離により選択的に除去されて図示
の状態になる。
FIG. 4B shows a process of forming the thin film conductor 33. In this embodiment, copper is formed on the entire surface of the wafer 40 by sputtering or the like to a thickness t C of 3 μm. At this time, a thin film conductor naturally adheres to the upper side of the inter-turn insulation 35a as indicated by 33a in the figure, but near the base overlapping the upper end portion of the inter-turn insulation 35a due to poor coverage of the metal step. The film thickness becomes very thin. In the subsequent step of FIG. 4C, the thin film conductor portion 33a on the inter-turn insulation 35a is removed by simple etching. This etching requires only a very short immersion of the wafer 40 in a desirably ultrasonic bath of, for example, a 5% hydrofluoric acid solution.
The etchant penetrates from the thin part of a and insulation between turns 35
Since the silicon oxide at the upper end of a is dissolved, the thin film conductor portion 33a thereon is selectively removed by peeling to obtain the state shown in FIG.

【0024】さらに図4(d) の工程では、ウエハ40の水
洗によりエッチング液を完全に除去した後、酸化シリコ
ン膜を前述と同様に低温のCVD法によりウエハ40の全
面に成膜して図示のようにターン間絶縁35aと連続した
上層側絶縁膜35とする。これ以降は図2のように上層側
磁性薄膜36を配設しかつ窒化シリコン等の保護膜37によ
りそれを被覆して単位素子30ないしは磁気誘導素子20の
完成状態とすることでよい。以上説明した磁気誘導素子
の製造方法によれば、薄膜導体33から形成するコイルの
ターン間の隙間sを膜厚tC より充分狭く形成して、そ
の抵抗Rの値を低減して電流容量を増加させかつそのQ
値を高めることができる。
Further, in the step of FIG. 4D, after the etching solution is completely removed by washing the wafer 40 with water, a silicon oxide film is formed on the entire surface of the wafer 40 by the low-temperature CVD method in the same manner as described above. As described above, the upper insulating film 35 continuous with the inter-turn insulation 35a is formed. Thereafter, as shown in FIG. 2, an upper magnetic thin film 36 may be provided and covered with a protective film 37 such as silicon nitride to complete the unit element 30 or the magnetic induction element 20. According to the method of manufacturing the magnetic induction element described above, the gap s between turns of the coil formed from the thin film conductor 33 is formed sufficiently narrower than the film thickness t C , the value of the resistance R is reduced, and the current capacity is reduced. Increase and its Q
Value can be increased.

【0025】なお、以上の実施例では磁気誘導素子が単
一のコイルをもつインダクタとして説明したが、薄膜導
体から形成するコイルの数と形状を変えるだけで変圧器
にも本発明を適用できる。また、コイルについても実施
例の渦巻き状に限らず、薄膜導体から形成可能であれば
つづら折れ状等の種々な形状を採用できる。さらに、実
施例に示された具体的な寸法,形状,構造,配置等はあ
くまで例示であって、本発明の要旨内で適宜な変更ない
し変形が可能である。
In the above embodiment, the magnetic induction element has been described as an inductor having a single coil. However, the present invention can be applied to a transformer only by changing the number and shape of coils formed from a thin film conductor. Also, the coil is not limited to the spiral shape of the embodiment, and various shapes such as a broken shape can be adopted as long as it can be formed from a thin film conductor. Furthermore, the specific dimensions, shapes, structures, arrangements, and the like shown in the embodiments are merely examples, and appropriate changes and modifications are possible within the spirit of the present invention.

【0026】[0026]

【発明の効果】本発明の磁気誘導素子では、コイルに形
成された薄膜導体を1対の磁性薄膜の間に挟み込んだ薄
膜積層構造の磁気誘導素子を複数の単位素子に分割し、
各単位素子の外形サイズを磁気回路上の特性長より小さ
いめに設定し、単位素子を相互接続して磁気誘導素子と
することによって次の効果が得られる。 (a) 磁気誘導素子のQ値の磁気回路の特性長との関連に
着目して特性長よりそれぞれ外形サイズが小さいめの複
数個の単位素子から磁気誘導素子を構成することにより
1MHz以上の高周波領域でも従来より高いQ値を達成で
きる。 (b) 磁気誘導素子を構成する単位素子が従来より格段に
小形化されるので、集積回路の製造技術を利用して半導
体チップ上に容易に作り込むことができ、これにより能
動素子と受動素子を一体化した1チップ形のチョッパ装
置やスイッチング電源等の極小形の電子装置の開発が可
能になる。 (c) 複数個の単位素子の磁気誘導素子への接続の組み合
わせを変えることにより用途に合わせて種々なリアクタ
ンス値の磁気誘導素子を構成できる。 (d) 薄膜導体と磁性薄膜の膜厚の積により所望のQ値を
持たせる周波数を容易に選択できるので種々な周波数特
性の磁気誘導素子を提供でき、さらに適用可能な周波数
を従来より高周波領域に延ばして一層の小形化を達成で
きる。
According to the magnetic induction element of the present invention, a magnetic induction element having a thin film laminated structure in which a thin film conductor formed in a coil is sandwiched between a pair of magnetic thin films is divided into a plurality of unit elements.
The following effects can be obtained by setting the outer size of each unit element to be smaller than the characteristic length on the magnetic circuit and interconnecting the unit elements to form a magnetic induction element. (a) Focusing on the relationship between the Q value of the magnetic induction element and the characteristic length of the magnetic circuit, the magnetic induction element is composed of a plurality of unit elements each having an outer size smaller than the characteristic length, thereby achieving a high frequency of 1 MHz or more. Even in the region, a higher Q value than before can be achieved. (b) Since the unit elements constituting the magnetic induction element are much smaller than before, they can be easily fabricated on a semiconductor chip by using integrated circuit manufacturing technology, thereby enabling active elements and passive elements. It is possible to develop a miniaturized electronic device such as a one-chip chopper device or a switching power supply that integrates the above. (c) By changing the combination of the connection of the plurality of unit elements to the magnetic induction element, magnetic induction elements having various reactance values can be configured according to the application. (d) It is possible to easily select a frequency having a desired Q value based on the product of the film thickness of the thin film conductor and the magnetic thin film, so that it is possible to provide a magnetic induction element having various frequency characteristics, and to apply the applicable frequency to a higher frequency range than before. And further downsizing can be achieved.

【0027】さらに、本発明の磁気誘導素子の製造方法
では、下層側磁性薄膜を覆う下層側絶縁膜の上にターン
間絶縁膜を成膜してコイルのターン間の隙間用のパター
ンにエッチングし、次にその上に薄膜導体をターン間絶
縁と同程度ないしそれ以下の膜厚で成膜した上で、ごく
簡単なエッチングによってそのターン間絶縁上部分を選
択的に除去することにより、ターン間絶縁を小さなアス
ペクト比のエッチングにより薄膜導体の膜厚の数分の1
以下のごく狭い幅に形成して、磁気誘導素子のQ値を向
上しかつその電流容量を増加させることができる。
Further, in the method of manufacturing a magnetic induction element according to the present invention, an inter-turn insulating film is formed on the lower insulating film covering the lower magnetic thin film and etched into a pattern for gaps between turns of the coil. Then, a thin film conductor is formed thereon with a film thickness equal to or less than the inter-turn insulation, and the upper portion of the inter-turn insulation is selectively removed by a very simple etching, so that the inter-turn insulation is reduced. Insulation is reduced to a fraction of the thickness of the thin film conductor by etching with a small aspect ratio
By forming the magnetic induction element with the following extremely narrow width, the Q value of the magnetic induction element can be improved and its current capacity can be increased.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による磁気誘導素子の原理を示し、同図
(a) はその断面図、同図(b) は半導体チップ上に作り込
まれたその一部の上面図である。
FIG. 1 shows the principle of a magnetic induction element according to the present invention.
(a) is a sectional view thereof, and (b) is a top view of a part thereof formed on a semiconductor chip.

【図2】本発明の磁気誘導素子の実施例をその単位素子
を半導体チップ上に作り込んだ状態で示す一部拡大断面
図である。
FIG. 2 is a partially enlarged sectional view showing an embodiment of the magnetic induction element of the present invention in a state where the unit element is built on a semiconductor chip.

【図3】本発明の磁気誘導素子のインダクタンスとQ値
の周波数依存性を示す特性線図である。
FIG. 3 is a characteristic diagram showing the frequency dependence of the inductance and the Q value of the magnetic induction element of the present invention.

【図4】本発明による磁気誘導素子の製造方法の実施例
を主な工程ごとの状態で示し、同図(a) はコイル用ター
ン間絶縁の形成工程, 同図(b) は薄膜導体の成膜工程,
同図(c) はそのエッチング工程, 同図(d) は上層側絶縁
膜の成膜工程後の状態をそれぞれ示すウエハの一部拡大
断面図である。
4 (a) and 4 (b) show an embodiment of a method for manufacturing a magnetic induction element according to the present invention in each of main steps, wherein FIG. 4 (a) shows a step of forming insulation between turns for a coil, and FIG. Film forming process,
FIG. 3C is a partially enlarged cross-sectional view of the wafer showing the state after the etching step, and FIG. 3D is the state after the step of forming the upper insulating film.

【符号の説明】[Explanation of symbols]

10 磁気誘導素子が作り込まれる半導体チップ 20 磁気誘導素子 21 磁性薄膜 22 薄膜導体 30 磁気誘導素子を構成する単位素子 31 下層側磁性薄膜 32 下層側絶縁膜 33 薄膜導体 35 上層側絶縁膜 35a ターン間絶縁 36 上層側磁性薄膜 40 半導体チップと磁気誘導素子が作り込まれるウ
エハ D 磁気誘導素子ないしは単位素子の外径サイズな
いしは直径 s コイルのターン間の隙間ないしはターン間絶縁
の幅
10 Semiconductor chip in which magnetic induction element is built 20 Magnetic induction element 21 Magnetic thin film 22 Thin film conductor 30 Unit element constituting magnetic induction element 31 Lower magnetic thin film 32 Lower insulating film 33 Thin film conductor 35 Upper insulating film 35a Between turns Insulation 36 Upper magnetic thin film 40 Wafer on which semiconductor chip and magnetic induction element are built D Outside diameter or diameter of magnetic induction element or unit element s Gap between turns of coil or width of insulation between turns

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平3−280509(JP,A) 特開 平3−276604(JP,A) 特開 平3−201511(JP,A) 特開 平4−149810(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01F 17/00,30/00 H01F 41/04,41/12 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-3-280509 (JP, A) JP-A-3-276604 (JP, A) JP-A-3-201511 (JP, A) JP-A-4- 149810 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01F 17/00, 30/00 H01F 41/04, 41/12

Claims (5)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】所定の形状のコイルに形成された薄膜導体
を1対の磁性薄膜の相互間に挟み込んだ構造の薄膜積層
形の磁気誘導素子であって、磁気誘導素子を複数個の単
位素子に分割し、前記磁性薄膜の透磁率をμ、厚みをt
M、両磁性薄膜の間隔をgとした場合、磁気回路上の特
性長λ=(μ・g・tM/2) 1/2 を各単位素子の平面
的な外形サイズDより小さく設定し、これら単位素子を
電気的に相互接続して1個の磁気誘導素子を構成するよ
うにしたことを特徴とする薄膜積層形磁気誘導素子。
1. A thin-film laminated magnetic induction element having a structure in which a thin-film conductor formed in a coil having a predetermined shape is sandwiched between a pair of magnetic thin films, wherein the magnetic induction element comprises a plurality of unit elements. And the magnetic thin film has a magnetic permeability of μ and a thickness of t
When the distance between M and both magnetic thin films is g,
The characteristic length λ = (μ · g · tM / 2) 1/2 is the plane of each unit element.
Characterized in that they are set smaller than a typical outer size D , and these unit elements are electrically interconnected to form one magnetic induction element.
【請求項2】請求項1に記載の素子において、単位素子
の外形サイズが磁気回路の特性長λの10分の1程度ない
しそれ以下に設定されたことを特徴とする薄膜積層形磁
気誘導素子。
2. A thin-film laminated magnetic induction device according to claim 1, wherein the outer size of the unit element is set to about one tenth or less of the characteristic length λ of the magnetic circuit. .
【請求項3】請求項1に記載の素子において、単体素子
の外形サイズが1mm以下であることを特徴とする薄膜
積層形磁気誘導素子。
3. The element according to claim 1, wherein the element is a single element.
A thin film having an outer size of 1 mm or less
Stacked magnetic induction element.
【請求項4】請求項1に記載の素子において、薄膜導体
が渦巻き状コイルに形成されることを特徴とする薄膜積
層形磁気誘導素子。
4. The thin film laminated magnetic induction device according to claim 1, wherein the thin film conductor is formed in a spiral coil.
【請求項5】請求項1に記載の素子を、半導体チップ上
に積層したことを特徴とする電子装置。
5. The method according to claim 1, wherein the device according to claim 1 is mounted on a semiconductor chip.
An electronic device, wherein the electronic device is laminated.
JP24535592A 1992-09-16 1992-09-16 A thin-film laminated magnetic induction element and an electronic device using the same. Expired - Lifetime JP3146672B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24535592A JP3146672B2 (en) 1992-09-16 1992-09-16 A thin-film laminated magnetic induction element and an electronic device using the same.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24535592A JP3146672B2 (en) 1992-09-16 1992-09-16 A thin-film laminated magnetic induction element and an electronic device using the same.

Publications (2)

Publication Number Publication Date
JPH0696952A JPH0696952A (en) 1994-04-08
JP3146672B2 true JP3146672B2 (en) 2001-03-19

Family

ID=17132446

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24535592A Expired - Lifetime JP3146672B2 (en) 1992-09-16 1992-09-16 A thin-film laminated magnetic induction element and an electronic device using the same.

Country Status (1)

Country Link
JP (1) JP3146672B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1195781A4 (en) * 2000-04-12 2004-03-31 Matsushita Electric Ind Co Ltd Method of manufacturing chip inductor
EP1536433A1 (en) * 2003-11-28 2005-06-01 Freescale Semiconductor, Inc. High frequency thin film electrical circuit element

Also Published As

Publication number Publication date
JPH0696952A (en) 1994-04-08

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