JP3136600B2 - Low power consumption crystal oscillation circuit - Google Patents

Description

The present invention relates to a low power consumption type crystal oscillation circuit.

[Conventional technology]

FIG. 3A is a circuit diagram of a basic crystal oscillator using CMOS transistors.

A CMOS inverter CI is used as an amplifier, and a feedback circuit F composed of a crystal unit X, capacitors CG, CD and a feedback resistor RF is represented by C.
The crystal oscillation circuit 1 is connected in parallel to the input and output terminals of the MOS inverter CI.

Although the crystal oscillation circuit 1 is composed of CMOS transistors, the gate voltage VG of the CMOS inverter CI oscillates almost in a sine wave, so that the CMOS transistors Qp and Qn have a through current iC as shown in FIG. The drawback is that the power consumption of the oscillation circuit 1 increases due to the flow of

Since this through current iC is approximately proportional to the square of the power supply voltage VD, the power consumption sharply increases as the power supply voltage VD increases.

In order to suppress the power consumption, there is a method of providing a constant voltage source and limiting the voltage applied to the crystal oscillation circuit.

However, the oscillation circuit generally has a small oscillation amplitude at the time of rising, and it is advantageous to directly apply the power supply voltage VD to the crystal oscillation circuit in order to grow the oscillation in a short period.

FIG. 4 is a Japanese patent publication No. 60-28 invented by focusing on the above points.
This is a low power consumption type crystal oscillation circuit described in Japanese Patent Publication No. 162.

This conventional circuit inputs the output signal of the crystal oscillating circuit 1, the first frequency dividing circuit 31, the second frequency dividing circuit 32 and the flip-flop circuit 33 and the output signal of the voltage detecting circuit 34 shown in FIG. It has an OR gate 35, a first switch S1 and a second switch S2 driven by the output signal SOR, and a diode circuit 38 inserted between the oscillation circuit 1 and the power supply VD.

 Next, the operation of this circuit will be described.

The flip-flop circuit 33 turns on the first switch S1 for resetting after the power is turned on.

Therefore, power supply voltage VD is directly applied to crystal oscillation circuit 1.

Therefore, the oscillation of the crystal oscillation circuit 1 rapidly becomes stable.

The first frequency dividing circuit 31 and the second frequency dividing circuit 32 count the pulses of the output signal SO of the crystal oscillation circuit 1, and after a predetermined count, set the flip-flop circuit 33.

When the flip-flop circuit 33 is set, the first switch S1 is turned off, and the oscillation circuit 1 is supplied with the low power supply voltage VDL which is lower by the forward voltage of the diodes D1 and D2, and the current is reduced to reduce power consumption.

Voltage detection circuit when power supply voltage VD drops due to power supply fluctuation
Since the first switch S1 is turned on again by 34, the oscillator power supply voltage returns to VD, and automatic adjustment is performed so as to stably operate in such a wide power supply voltage range.

FIG. 5 is a waveform diagram of each signal for explaining the growth process of the oscillation amplitude of the block shown in FIG. 4, and the oscillation period is exaggerated for easy understanding.

Here, when the oscillation amplitude stabilizes, the first switch
S1 is turned off, and the voltage applied to the oscillation circuit 1 is switched from VD to VDL to reduce power consumption.

In an actual low power consumption type crystal oscillation circuit, it takes several seconds before the oscillation amplitude is stabilized.

For example, since the crystal oscillation circuit 13 for a watch uses 32 kHz, it takes about tens of thousands of cycles until the oscillation amplitude is stabilized.

[Problems to be Solved by the Invention] In the conventional circuit, the output of the oscillation circuit is counted, and after a predetermined time, the voltage applied to the oscillation circuit is switched to a low value. The power supply is switched before the amplitude is not sufficiently stabilized, and there is a disadvantage that it takes time until the oscillation is stabilized.

Also, setting the count value at the time of switching to a high value has the disadvantage that even if the oscillation amplitude is sufficiently stabilized, a high power supply voltage is directly applied to the oscillation circuit for a while and the power consumption increases, so the timing is set appropriately. It was difficult to do.

An object of the present invention is to provide a low-power-consumption type crystal oscillation circuit in which the oscillation rises quickly.

[Means for solving the problem]

A crystal oscillation circuit according to the present invention comprises: a crystal oscillation circuit in which a feedback circuit having a crystal oscillator is connected in parallel to a CMOS transistor amplifier circuit; an oscillation signal output from the crystal oscillation circuit being input; and a pulse signal output at a predetermined level or higher. A level detection circuit, a reference voltage generation circuit that receives the pulse signal and outputs a reference voltage lower than a power supply voltage, and receives the reference voltage and outputs an amplified voltage that is lower than the power supply voltage to the crystal oscillator. A reference voltage generating circuit, one end of which is connected to a terminal of the power supply voltage via a contact D and a constant current source; and A switched capacitor circuit for flowing a bypass current from a contact point D to a capacitor; and a low-pass filter having an input terminal connected to the node D and outputting the reference voltage from an output terminal. Have been.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

 FIG. 1 is a circuit diagram of one embodiment of the present invention.

The low-consumption type crystal oscillation circuit includes a level detection circuit 2 having a Schmitt circuit for detecting an amplitude level of an oscillation output signal of the crystal oscillation circuit 1 shown in FIG. 3, and a pulse signal output from the level detection circuit. Reference voltage generating circuit 3 which inputs to circuit 13 and outputs a reference voltage
And an amplifier circuit 4 for amplifying the reference voltage and supplying it to the crystal oscillation circuit 1 as a power supply voltage ED. Note that the reference voltage generation circuit 3 generates different voltages when an oscillation frequency having a predetermined amplitude exists and when the oscillation frequency does not reach the predetermined amplitude and thus the oscillation frequency does not exist. Therefore, in the embodiment, for convenience,
The reference voltage generation circuit 3 will be described as a frequency-voltage conversion circuit 3.

Here, the Schmitt circuit of the level detection circuit 2 outputs the pulse signal SP when the amplitude of the oscillation output signal SD output from the crystal oscillation circuit 1 reaches the hysteresis width VSMT of the circuit.

The hysteresis width VSMT of this Schmitt circuit is set to a voltage required for the crystal oscillation circuit 1 to maintain oscillation.

Normally, this voltage VSMT is a P-channel MOS transistor QP
Is VTP and the threshold voltage of the N-channel MOS transistor QN is VTN, which is about | VTP | + VTN.

The frequency-voltage conversion circuit 3 includes a switched capacitor circuit 13 having a charge switch 11 driven by a pulse signal SP and a discharge switch 10 driven in reverse phase by an inverter 9, and a P-series transistor connected to an N-channel MOS transistor QN whose source is grounded. The drain node D of the channel MOS transistor QP is connected to one end of the constant current source 7 having a constant current value IS and one end of the charging switch 11 and is connected to the input end of the low-pass filter 8.

 Next, the operation of the circuit will be described.

When there is no input of the pulse signal SP from the level conversion circuit 2, the switched capacitor circuit 13 is off, and the potential VDO of the drain D is given by equation (1).

Here, μ _P and μ _N are the hole and electron mobilities, respectively (W _P
/ L _P ) and (W _N / L _N ) are the ratios of the channel width and channel length of the transistors QP and QN, respectively.

The value of the constant current value IS is set to a very small value to reduce power consumption.

For example, it is necessary to lower the IS value as the oscillation frequency of the crystal oscillation circuit 1 decreases, and it is preferable that the IS value be 1 μA or less in a 32 kHz oscillation circuit for a watch.

The DC voltage VRH output from the low-pass filter 8 is equal to the drain voltage VDO, and its value is set to about the power supply voltage VD.

Therefore the need to increase the value of the second term and the fourth term in equation (1), which is the size ratio of the transistors of the (W _P / L _P) and (W _N / L _N) This is achieved by making it smaller.

When the amplitude of the oscillation output is increased and the pulse signal SP is output from the level detection circuit 2 and supplied to the switched capacitor circuit 13, the charge switch 11 is turned on, the discharge switch 10 is turned off, and the IC from the constant current IS of the constant current source 7 is turned on. ＝ C ・ VDO ・ f
Shunt current to the ground point, the potential at the drain node D is
Go down to VRL.

The values of the constant current values IS and C are set so that the value of the reference VREF output from the filter 8 at this time is approximately | VTP | + VTN.

The low-pass filter 8 integrates and removes a ripple component generated by switching, and transmits only a DC component to the amplifier circuit 4.

The amplification circuit 4 amplifies the reference voltage VREF obtained by the frequency-voltage conversion circuit 3 by the amplification circuit 4 having a voltage gain of 1,
A constant voltage is supplied to the crystal oscillation circuit 1 as a power supply voltage ED.

The operation of each block has been described above. Next, the overall operation of the block of FIG. 1 will be described with reference to the waveform diagram of FIG.

When the amplitude of the oscillation output SO of the crystal oscillation circuit 1 is equal to or lower than the detection voltage VSMT of the level detection circuit 2, the level detection circuit 2 does not output the pulse signal SP.

Therefore, the charging switch 11 is open, and the reference voltage VRH output from the frequency-voltage conversion circuit 3 is equal to the power supply voltage V
Close to D, the voltage ED of the power supply for the crystal oscillation circuit output from the amplifier circuit 4 is also about VD.

Therefore, crystal oscillation circuit 1 operates at power supply voltage VD, and the oscillation amplitude rises immediately.

When the oscillation amplitude of the crystal oscillation circuit 1 reaches the detection voltage VSMT of the level detection circuit 2 at time tO, the level detection circuit 2 outputs a pulse signal SP from time tO.

Therefore, when the pulse signal SP is input to the frequency-to-voltage conversion circuit 3, the charge switch 11 operates synchronously, so that the reference voltage VREF output from the frequency-to-voltage conversion circuit 3 is reduced to the sum of the threshold voltages (VPT + VTN).

The amplifier circuit 4 supplies the same voltage as the stepped-down VRL as the power supply of the crystal oscillation circuit 1 to perform a low power consumption operation.

In order for the level detection circuit 2 to continue to output the pulse signal SP even after the voltage VREF has dropped to VRL, the level detection value VSMT must be VR
Set lower than L.

As another embodiment, when the feedback voltage input to one end of the amplifier circuit 4 is set to be smaller than 1 and the voltage gain is set to a value larger than 1, the channel length of both transistors QP and QN for generating the reference voltage VRL is set. L _N and L _P can be set short, and there is an advantage that the chip area can be reduced.

〔The invention's effect〕

As described above, according to the present invention, the power supply voltage supplied to the crystal oscillation circuit is automatically reduced when the oscillation voltage of the crystal oscillation circuit becomes necessary and sufficient to maintain the oscillation amplitude by the level detection circuit. This has the effect of realizing a crystal oscillation circuit with a fast oscillation rise and low power consumption.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of one embodiment of the present invention, FIG. 2 is a signal waveform diagram at each part for explaining the operation of the circuit of FIG. 1,
FIG. 3 is a basic circuit diagram of the crystal oscillation circuit, FIG. 4 is a circuit diagram of an example of a conventional low power consumption type crystal oscillation circuit, and FIG. 5 is for explaining the operation of the circuit of FIG. FIG. 4 is a waveform diagram of each signal. DESCRIPTION OF SYMBOLS 1 ... Crystal oscillation circuit, 2 ... Level detection circuit, 3 ... Frequency-voltage conversion circuit, 4 ... Amplification circuit, 7 ... Constant current source, 8 ... Low-pass filter, 9 ... Inverter, 10 ...
... Discharge switch, 11 ... Bypass switch, 13 ... Switched capacitor circuit, VD ... Drain voltage, QN ... N
Channel MOS transistor, QP: P-channel MOS transistor, SP: Pulse signal, VREF: Reference voltage, VD: Power supply voltage, ED: Power supply voltage for crystal oscillation circuit.

Claims (2)

(57) [Claims] 1. A crystal oscillation circuit in which a feedback circuit having a crystal oscillator is connected in parallel to a CMOS transistor amplifier circuit, and a level detector for receiving an oscillation signal output from the crystal oscillation circuit and outputting a pulse signal at a predetermined level or more. A circuit, a reference voltage generation circuit that receives the pulse signal and outputs a reference voltage lower than a power supply voltage, and receives the reference voltage and supplies an amplified voltage having a value lower than the power supply voltage to the crystal oscillation circuit. A reference voltage generating circuit, one end of which is connected to a terminal of the power supply voltage via a contact D and a constant current source, and a terminal connected to the terminal of the power supply voltage, and the contact D is synchronized with the pulse signal. A low-pass filter having an input terminal connected to the node D and outputting the reference voltage from an output terminal. Power consumption type crystal oscillation circuit. 2. The low power consumption type crystal oscillation circuit according to claim 1, wherein said constant voltage element comprises a CMOS transistor.