JPH0494201A - Low power consumption type crystal oscillation circuit - Google Patents

Abstract

PURPOSE:To quicken the rise of oscillation and to reduce power consumption by decreasing a power supply voltage applied to a crystal oscillation circuit automatically at a point of time when a level detection circuit detects it that the oscillation level of the crystal oscillation circuit reaches a necessary and sufficient voltage for the duration of the oscillation. CONSTITUTION:The oscillation circuit is provided with a level detection circuit 2 having a Schmitt circuit to detect a level of an oscillation output signal of a crystal oscillation circuit 1, a frequency - voltage conversion circuit 3 in which a pulse signal outputted from the level detection circuit 2 is inputted to a switched capacitor circuit 13 and a reference voltage is outputted, and an amplifier circuit 4 amplifying a reference voltage and applying the amplified voltage to the crystal oscillation circuit 1 as a power supply voltage ED. Then the Schmitt circuit of the level detection circuit 2 outputs a pulse signal SP when an amplitude of an oscillation output signal SD outputted from the crystal oscillation circuit 1 reaches a hysteresis width VSMT of the circuit. Thus, the rise of the oscillation is fast and the power consumption is reduced.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a low power consumption crystal oscillator circuit.

[Conventional technology]

FIG. 3(a) is a circuit diagram of a basic crystal oscillator using CMOS transistors.

A crystal oscillation circuit 1 is constructed by using a CMOS inverter CI as an amplifier, and connecting a feedback circuit F composed of a crystal resonator X, a capacitor CG, a CD, and a feedback resistor RF in parallel to the output terminal of a CMOS inverter C. ing.

Although this crystal oscillator circuit 1 is composed of a CMOS transistor, the gate voltage VG of the CMOS inverter CI oscillates in a nearly sinusoidal manner, so the CMOS transistor Qp
, Qn flow through the through current iC as shown in FIG. 3(b), which increases the power consumption of the oscillation circuit 1, which is a drawback.

Since this through current iC is approximately proportional to the square of the power supply voltage VD, power consumption increases rapidly as the power supply voltage VD increases.

In order to suppress this power consumption, there is a method of providing a constant voltage source to limit the voltage applied to the crystal oscillation circuit.

However, in an oscillation circuit, the oscillation amplitude at startup is generally small, and in order to grow oscillation in a short period of time, it is advantageous to directly apply the power supply voltage VD to the crystal oscillation circuit.

Figure 4 shows the special public interest issued in 1986-2, which was invented with the above points in mind.
This is a low power consumption type crystal oscillation circuit described in Japanese Patent No. 8162.

This conventional circuit inputs the output signal of the cascade circuit of the crystal oscillation circuit 1, the first frequency divider circuit 31, the second frequency divider circuit 32, and the flip-flop circuit 33 and the voltage detection circuit 34 shown in FIG. OR gate 35 and its output signal SO
It has a first switch S1 and a second switch S2 driven by R, and a diode circuit 38 inserted between the oscillation circuit 1 and the power supply VD.

Next, the operation of this circuit will be explained.

The flip-flop circuit 833 turns on the first switch S1 in order to be reset after power is turned on.

Therefore, the power supply voltage VD is directly applied to the crystal oscillation circuit 1.

Therefore, the crystal oscillation times FI! The oscillation of 41 quickly becomes stable.

The first frequency dividing circuit 31 and the second frequency dividing circuit 32 count the pulses of the output signal S○ of the crystal oscillation circuit 1, and set the flip-flop circuit 33 after a predetermined count.

When the flip-flop concave B33 is set, the first switch S1 is turned off, and the diodes Di and D are connected to the oscillation circuit 1.
A low power supply voltage VDL that is lower by the forward voltage of 2 is supplied, the current is reduced, and power consumption is reduced.

If the power supply voltage VD decreases due to power supply fluctuations, the voltage detection circuit 34 turns on the first switch S1 again, so the oscillator power supply voltage returns to VD and is automatically adjusted to ensure stable operation in such a wide power supply voltage range. are doing.

FIG. 5 is a waveform diagram of each signal for explaining the growth process of the oscillation amplitude of the block in FIG. 4, and the oscillation period is exaggerated for ease of understanding.

Here, at time t1 when the oscillation amplitude is stabilized, the first switch S1 is turned off, and the voltage applied to the oscillation circuit 1 is changed from VD to VD.
Switching to DL to reduce power consumption.

In an actual low power consumption crystal oscillator circuit, it takes several seconds before the oscillation amplitude stabilizes.

For example, since the crystal oscillation circuit 1 for a watch uses 32 kHz, it takes about two cycles for the oscillation amplitude to stabilize.

[Problem to be solved by the invention]

In conventional circuits, the output of the oscillation circuit is counted and the voltage applied to the oscillation circuit is switched to a lower value after a predetermined period of time. Therefore, if the count number at the time of switching is set to a low value, the power supply may turn off before the oscillation amplitude is sufficiently stabilized. The disadvantage is that switching occurs and it takes time for the oscillation to stabilize.

Also, if the count number at switching is set to a high value, a high power supply voltage will be applied directly to the oscillation circuit for a while even after the oscillation amplitude has stabilized sufficiently, increasing power consumption, so set the timing appropriately. It was difficult to do.

An object of the present invention is to provide a low power consumption type crystal oscillator circuit in which oscillation rises quickly.

[Means to solve the problem]

The crystal starting circuit of the present invention uses a feedback circuit having a crystal oscillator as CMO8? - A crystal oscillation circuit connected in parallel to the transistor amplifier circuit, a level detection circuit that inputs the oscillation signal output from the crystal oscillation circuit and outputs a pulse signal at a predetermined level or higher, and a level detection circuit that inputs the pulse signal and lowers the power supply voltage. The crystal oscillation circuit includes a frequency-to-voltage conversion circuit that outputs a low reference voltage, and an amplifier circuit that receives the reference voltage and supplies an amplified voltage lower than the power supply voltage to the crystal oscillation circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention.

The low consumption crystal oscillation circuit includes a level detection circuit 2 having a Schmitt circuit for detecting the amplitude level of the oscillation output signal of the crystal oscillation circuit 1 shown in FIG. It has a frequency-voltage conversion circuit 3 that inputs to the circuit 13 and outputs a reference voltage, and an amplifier circuit 4 that amplifies the reference voltage and supplies it to the crystal oscillation circuit 1 as a power supply voltage ED.

Here, the Schmitt circuit of the level detection circuit 2 outputs a pulse signal SP when the amplitude of the oscillation output signal SD output from the crystal oscillation circuit 1 reaches the hysteresis width VSMT of the circuit.

The hysteresis width VSMT of this Schmitt circuit is set to approximately the voltage required for the crystal oscillation circuit 1 to sustain oscillation.

Normally, this voltage VSMT is IVT, where the threshold voltage of the P-channel MO8) transistor QP is VTR, and the threshold voltage of the N-channel MOS transistor QN is TN.
It is about PI + VTN.

The frequency-voltage conversion circuit 3 includes a switched capacitor circuit 13 having a charging switch 11 driven by a pulse signal SP and a discharging switch 10 driven in reverse phase by an inverter 9.
and an N-channel MOS whose source is grounded) - Rungis
The drain node of the P-channel MO3) transistor QP connected in series with QN is connected to one end of each of a constant current source 7 with a constant current value IS and a charging switch 11, and is also connected to the input end of a low-pass filter 8. .

Next, the operation of the circuit will be explained.

When there is no input of the pulse signal SP from the level conversion circuit 2, the switched capacitor circuit 13 is off, and the potential VDO of the drain D is expressed by the formula (1) % where μ2. μ8 is the mobility of holes and electrons, respectively, (W
p/Lp) and (WN/LN) are the ratios of the channel width and channel length of transistors QP and QN, respectively.

The current value IS is set to a small value in order to reduce power consumption.

For example, the lower the oscillation frequency of the crystal oscillation circuit 1, the lower the IS value needs to be, and in a 32 kHz oscillation circuit for a watch, it is desirable to set it to 1 μA or less.

The DC voltage VRH output from the low-pass filter 8 is equal to the drain voltage VD○, and its value is set to about the power supply voltage VD.

For this purpose, the second term and the fourth term on the right side of equation (1) must be
It is necessary to increase the value of the term, which is determined by the size ratio of both transistors (Wp/Lp> and (Wpr/L N
) is achieved by reducing .

The amplitude of the oscillation output increases, and a pulse signal SP is output from the level detection circuit 2 and the switched capacitor circuit 13
When supplied, the charging switch 11 is turned on and the discharging switch 10 is turned off, and from the constant current IS of the constant current source 7, IC=C.
- In order to shunt the current of VDO-f to the ground point, the potential at the train node drops to VRL.

Reference VREF output from filter 8- at this time
The constant current value Is and the value of C are set so that the value of IVTPI +VTN is approximately equal to IVTPI +VTN.

The low-pass filter 8 integrates and removes ripple components generated by switching, and transmits only the DC component to the amplifier circuit 4.

The amplifier circuit 4 amplifies the reference voltage VREF obtained by the frequency-voltage conversion circuit 3 at an amplification port N4 with a voltage gain of 1, and supplies a constant voltage to the crystal oscillation circuit 1 as a power supply voltage ED.

The operation of each block has been explained above, and next, the operation of the entire block of FIG. 1 will be explained with reference to the waveform diagram of FIG. 2.

While the amplitude of the oscillation output SO of the crystal oscillation diagram N11 is below the detection voltage VSMT of the level detection circuit s2, the level detection circuit H2
does not output the pulse signal SP.

Therefore, the charging switch 11 is open, the reference voltage VRH output from the frequency-voltage conversion circuit 3 is close to the power supply voltage VD, and the voltage ED of the power supply for the crystal oscillation circuit output from the amplifier circuit 4 is also approximately VD.

Therefore, the crystal oscillation circuit 1 operates with the power supply voltage VD, and the oscillation amplitude quickly rises.

When the oscillation amplitude of the crystal oscillation circuit 1 reaches the detection voltage VSMT of the level detection circuit 2 at the time point 10, the level detection circuit 2 outputs the pulse signal SP from the time point to.

Therefore, when the pulse signal SP is input to the frequency-voltage conversion circuit 3, the charging switch 11 operates synchronously, so that the frequency -
The reference voltage VREF output from the voltage conversion circuit 3 is lowered to the sum of threshold voltages (VPT + VTN).

The amplifier circuit 4 supplies the same voltage as the step-down VRL as a power source to the crystal oscillation circuit 1, thereby performing low power consumption operation.

In order for the level detection circuit 2 to continue outputting the pulse signal SP even after the voltage VREF is reduced to VRL, the level detection value V
SMT is set lower than VRL.

As another example, if the feedback voltage input to one end of the amplifier circuit 4 is set to be smaller than 1 and the voltage gain is set to a value larger than 1, the channel length of both transistors QP and QN for generating the reference voltage VRL is It is possible to set LN and LP short, and there is an advantage that the chip area can be reduced.

〔Effect of the invention〕

As explained above, the present invention automatically steps down the power supply voltage supplied to the crystal oscillator circuit when the level detection circuit reaches a sufficient voltage to maintain the oscillation amplitude of the crystal oscillator circuit. This has the effect of realizing a crystal oscillation circuit with fast oscillation rise and low power consumption.

Power supply voltage, ED...Power supply voltage for crystal oscillation circuit.

Claims (1)

[Claims] 1. A crystal oscillation circuit in which a feedback circuit having a crystal oscillator is connected in parallel to a CMOS transistor amplifier circuit, and an oscillation signal output from the crystal oscillation circuit is input and a pulse signal is output at a predetermined level or higher. a level detection circuit that inputs the pulse signal and outputs a reference voltage lower than the power supply voltage; and a frequency-voltage conversion circuit that inputs the reference voltage and outputs an amplified voltage lower than the power supply voltage. A low power consumption crystal oscillation circuit characterized by comprising an amplifier circuit that supplies an oscillation circuit. 2. The frequency-voltage conversion circuit includes a constant voltage element whose one end is connected to a terminal of the power supply voltage via a node D and a constant current source, and a bypass current flowing from the node D to the capacitor in synchronization with the pulse signal. 1. A low power consumption type crystal oscillation circuit comprising: a switched capacitor circuit that allows a current to flow; and a low-pass filter having an input terminal connected to the node D and outputting the reference voltage from an output terminal.