JP3129095B2 - Signal processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing system for helically recording and reproducing digital signals on a magnetic tape using a rotary magnetic head.

[0002]

2. Description of the Related Art As a digital VTR for recording and reproducing digital signals, the running speed of a magnetic tape is changed in accordance with the transmission rate of a digital input signal while keeping the rotation speed of a cylinder having a magnetic head fixed. There is a method for recording and reproducing signals (for example, see Japanese Patent Laid-Open No.
58255). In the above conventional example, only digital data whose transmission rate satisfies a predetermined ratio based on the information signal is targeted as an input signal. MPEG (Moving Picture) which is one of the image compression methods
In e Experts Group), the transmission rate can be various values. When recording a signal with such an unspecified transmission rate, there is a transmission rate that cannot be handled by a VTR that targets only the transmission rate that satisfies the above-described predetermined ratio.

[0003]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a VTR capable of recording and reproducing digital signals transmitted at various transmission rates.

[0004]

[Means for Solving the Problems] In order to solve the above-mentioned problems
In the signal processing device of the present invention,
Means for detecting information about the included transmission rate
And processing based on the transmission rate detected by the detecting means.
Means for discriminating the input digital signal,
Means for converting to a signal with a fixed processing rate, and
To control the running speed of the magnetic tape in the processing mode
And a signal identification including at least the processing mode during recording.
Digital information converted to different information and a fixed processing rate
Signal and recording timing according to the processing mode
Means for performing the reproduction and the signal included in the reproduction signal during reproduction.
Means for detecting the processing mode from the signal identification information;
At times, the magnetic mode depends on the processing mode detected from the reproduced signal.
Means to control the running speed of the loop
Conversion to convert a constant rate signal to the input transmission rate
Means.

[0005]

According to the present invention, when a digital signal of various transmission rates is recorded on a VTR by the means described above and the reproduced signal is reproduced, the recorded transmission rate is detected and the reproduced signal is transmitted using a built-in frequency oscillator or the like. It is possible to output at a rate.

[0006]

An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 shows a configuration example of a signal processing circuit for realizing one embodiment of the present invention. In FIG. 1, reference numeral 110 denotes a signal input terminal for receiving a digital signal, and 100 denotes a signal transmission and error correction at the time of input. An error corrector 200; a recording signal controller 200 for detecting the transmission rate of the input signal received at the signal input terminal 110, determining the processing mode, and controlling the input bit rate converter 300;
An input bit rate converter 400 for temporarily storing the input signal received at step 1 and converting it to the processing rate of the recording signal processor 400;
Is a recording signal processor for performing signal processing such as adding an error correction code, a transmission rate, and processing mode information to a signal sent from the input bit rate converter 300; 510, a magnetic tape for storing signals; , 521,
Reference numeral 522 denotes a recording / reproducing magnetic head having different azimuth angles, 523 and 524 denote recording / reproducing magnetic heads having different azimuth angles, 600 denotes a tape traveling controller for controlling a traveling state of the magnetic tape 510, and 700 denotes a magnetic tape. A playback signal processor 800 performs signal processing such as error correction on the playback signal read from 510, and detects information such as a transmission rate and a processing mode from the playback signal. Reference numeral 800 denotes a transmission rate sent from the playback signal processor 700; A reproduction signal system controller for controlling the output bit rate converter 900 using a built-in frequency synthesizer or the like based on information such as a processing mode, etc., temporarily stores a signal input at a processing rate of the reproduction signal processor 700 and transmits the output. An output bit rate converter which converts the data into a signal and sends it to a signal output terminal 120;
0 is a signal output terminal for outputting a digital signal sent from the output bit rate converter 900 to the outside. Hereinafter, the operation of this embodiment will be described.

FIG. 2 shows an example of a signal configuration input to the signal input terminal 110. The input signal is divided into blocks each having an arbitrary length and input in the form shown in FIG. 21 is a signal (SOB) indicating the beginning of a block, 22 is a signal information section (ID) including information such as the transmission rate of the signal, 23 is a signal data section, and 24 is an error correction code section (Parity) for the ID 22 and the signal data 23. ) And 25 are signals (EOB) indicating the end of the block.

The input signal input to the signal input terminal 110 is sent to the error corrector 100. The error corrector 100 corrects an error generated at the time of signal transmission and signal input to the input signal, and sends the corrected signal to the recording signal system controller 200 and the input bit rate converter 300.
The recording signal controller 200 detects the transmission rate from the ID of the input signal or the like and determines the processing mode. The recording signal system controller 200 sends recording signal information such as a transmission rate and a processing mode to the recording signal processor 400, sends a processing mode to the tape running controller 600, and outputs an input bit rate converter corresponding to the transmission rate and the processing mode. The control signal is sent to the input bit rate converter 300.

Here, the processing mode will be briefly described. In the present embodiment, as an example, the processing modes are the following three modes. When the transmission rate of the input signal is 10 Mbps (b
ps: bits per second) beyond 20
The processing mode in the case of Mbps or less is set to 20M mode,
The transmission rate of the input signal exceeds 10Mbps
When the transmission rate of the input signal is 5 Mbps or less, the processing mode is 5M mode when the transmission rate of the input signal is 5 Mbps or less. For example, if the transmission rate of the input signal is 8
The processing mode in the case of Mbps is the 10M mode.

In this embodiment, signals are recorded on the magnetic tape 510 by performing processing at a constant processing rate without changing the processing rate from the recording signal processor 400 to the reproduction signal processor 700 for each processing mode. The recording frequency and the number of rotations of the cylinder 520 are set to be constant when recording, and the recording signal processor 400 to the reproduction signal processor 700
Up to one system. In the recording system, a process of converting signals of various transmission rates into a constant processing rate is performed by the input bit rate converter 300, and in the reproducing system, a process of converting a signal of a constant processing rate into a transmission rate at the time of input is performed. This is performed by the output bit rate converter 900. Next, the input bit rate converter 300 will be described, and the output bit rate converter 900 will be described later when the reproduction processing operation is described. FIG. 3 shows a configuration example of the input bit rate converter 300. 3, reference numeral 301 denotes an input terminal for receiving an input signal sent from the error corrector 100; 302, an input terminal for receiving a memory control signal sent from the recording signal system controller 200; 321, 322, and 3;
23 and 324 respectively convert the input signal into a recording signal processor 40.
0, a memory for converting the processing rate to 0; 303, an output terminal for sending signals read from the memories 321 and 323 to the recording signal processor 400; 304, a memory 322;
324 is an output terminal for sending a signal read from the H.324 to the recording signal processor 400. Each memory 321, 322, 3
23 and 324 each have a capacity capable of storing an input signal corresponding to data to be recorded on one track on the magnetic tape 510. When a signal having the highest input transmission rate in each mode is input, the required capacity of the memory is Will be the largest. The signal sent from the output terminal 303 to the recording signal processor 400 and processed is recorded on the magnetic tape 510 by the magnetic head 521 or 523, and the signal sent from the output terminal 304 to the recording signal processor 400 is processed by the magnetic head. 522
Or 524 on the magnetic tape 510.

FIGS. 4, 5 and 6 show signal processing of the input bit rate converter 300 when input signals having transmission rates of 20 Mbps, 10 Mbps and 5 Mbps are input, respectively. (1) in FIG. 4, FIG. 5, and FIG.
01 shows a signal received, (2W), (3W), (4
W) and (5W) are memories 321, 322, and 32, respectively.
3, 324 show signals to be written, (2R), (3
R), (4R), and (5R) are memories 321 and 3 respectively.
22, 323, and 324, and (6)
Are output from the memories 321 and 323 and output terminals 303
Shows a signal sent from the to the recording signal processor 400,
(7) indicates a signal read from the memories 322 and 324 and sent from the output terminal 304 to the recording signal processor 400.

Here, the processing unit period used in FIGS. 4, 5 and 6 will be described. In this embodiment, the magnetic tape 51
When a signal is recorded on a pair of magnetic heads (5
21 and 522 or 523 and 524). Therefore, a period from the start of recording (or reproduction) by two magnetic heads at a certain time to the start of recording (or reproduction) by the next set of magnetic heads is defined as a processing unit period. When the processing mode is the 20M mode, recording is performed by two sets of magnetic heads, one set of magnetic heads (521 and 522) and another set of magnetic heads (523 and 524) during one rotation of the cylinder 520. The processing unit period in the mode is a time during which the cylinder 520 makes a half rotation. Here, the time for the cylinder 520 to make a half rotation, that is, the processing unit period in the 20M mode is Tch. In this embodiment, the processing modes (20M mode, 10M mode, and 5M mode) are selected as an example of the processing mode so that the ratio of the highest input transmission rate in each processing mode is 4: 2: 1. When a signal having the highest input transmission rate in each processing mode is input, the ratio of the time until a certain number of data is input is 1: 2: 4. Therefore, the processing unit period in the 10M mode is 2Tch twice as large as that in the 20M mode, and the processing unit period in the 5M mode is 4Tch four times as large as in the 20M mode.

An input bit rate converter 300 when a signal having a transmission rate of 20 Mbps shown in FIG. 4 is input.
Will be described. Transmission rate is 20M
When a bps input signal is input, the recording signal controller 20
At 0, the processing mode is determined to be the 20M mode, and a control signal for the 20M mode is sent to the memory control signal input terminal 302. In the input bit rate converter 300, the error corrector 1
4 is received by the input terminal 301 ((1) in FIG. 4), and the memories 321 and 322 and the memory 323 are provided for each processing unit period Tch in the 20M mode by the memory control signal transmitted to the input terminal 302. , 324 and written. First, when an input signal is distributed to the memories 321 and 322 during a certain processing unit period, the input signal is first written into the memory 321 at the input transmission rate ((2W) in FIG. After reaching the data number of the input signal corresponding to the data to be recorded on one track, the input signal is written into the memory 322 at the input transmission rate ((3W) in FIG. 4). Memory 321,
In the next processing unit period after the processing unit period in which the signal writing process to the H.322 is performed, the signal reading process is performed from the memories 321 and 322 at the processing rate of the recording signal processor 400 ((2R) and (3R) in FIG. 4). And the memories 323 and 324
The input signal is first distributed to the memory 323 at the input transmission rate ((4W) in FIG. 4), and after reaching the data number of the input signal corresponding to the data to be recorded on one track on the magnetic tape 510. , The input signal is stored in the memory 32
4 at the input transmission rate ((5 in FIG. 4).
W)). The signals read from the memories 321 and 323 by repeating the above operation are sent from the output terminal 303 to the recording signal processor 400 at a predetermined processing rate ((6) in FIG. 4), and read from the memories 322 and 324. The output signal is sent from the output terminal 304 to the recording signal processor 400 at a predetermined processing rate ((7) in FIG. 4).

An input bit rate converter 300 when a signal having a transmission rate of 10 Mbps shown in FIG. 5 is input.
Will be described. Transmission rate is 10M
When a bps input signal is input, the recording signal controller 20
At 0, the processing mode is determined to be the 10M mode, and a control signal for the 10M mode is sent to the memory control signal input terminal 302. In the input bit rate converter 300, the error corrector 1
5 is received by the input terminal 301 ((1) in FIG. 5), and the memories 321 and 322 and the memory 323 are processed every 2 Tch in the 10M mode by the memory control signal transmitted to the input terminal 302. , 324 and written. First, when an input signal is distributed to the memories 321 and 322 during a certain processing unit period, the input signal is first written into the memory 321 at the input transmission rate ((2W) in FIG. 5). After reaching the number of data of the input signal corresponding to the data to be recorded on one track, the input signal is written into the memory 322 at the input transmission rate ((3W) in FIG. 5). Memory 32
In the next processing unit period following the processing unit period in which the signal writing process to the first and third units has been performed, the signal reading process is performed from the memories 321 and 322 at the processing rate of the recording signal processor 400 ((2R), (3R) in FIG. )) And the memories 323, 3
The input signal is distributed to the memory 24 and is first written into the memory 323 at the input transmission rate ((4W) in FIG. 5), and reaches the data number of the input signal corresponding to the data to be recorded on one track on the magnetic tape 510. Thereafter, the input signal is written into the memory 324 at the input transmission rate (see (5) in FIG. 5).
W)). The signals read from the memories 321 and 323 by repeating the above operation are sent from the output terminal 303 to the recording signal processor 400 at a predetermined processing rate ((6) in FIG. 5), and read from the memories 322 and 324. The output signal is sent from the output terminal 304 to the recording signal processor 400 at a predetermined processing rate ((7) in FIG. 5).

The signal processing operation of the input bit rate converter 300 when the signal of the transmission rate of 5 Mbps shown in FIG. 6 is input will be described. Transmission rate is 5Mbp
When the s input signal is input, the recording signal controller 200 determines that the processing mode is the 5M mode, and sends a 5M mode control signal to the memory control signal input terminal 302. In the input bit rate converter 300, the input signal sent from the error corrector 100 is received by the input terminal 301 ((1) in FIG. 6), and the processing unit in the 20M mode is determined by the memory control signal sent to the input terminal 302. The data is distributed and written to the memories 321 and 322 and the memories 323 and 324 every 4 Tch. First, when an input signal is distributed to the memories 321 and 322 during a certain processing unit period, the input signal is first written into the memory 321 at the input transmission rate ((2W) in FIG. 6), After reaching the data number of the input signal corresponding to the data to be recorded on one track, the input signal is written into the memory 322 at the input transmission rate ((3W) in FIG. 6). Memory 321, 32
In the next processing unit period after the processing unit period in which the signal writing process to the second unit was performed, the signal reading process is performed from the memories 321 and 322 at the processing rate of the recording signal processor 400 ((2R) and (3R) in FIG. 6). The input signals are distributed to the memories 323 and 324 and are first written into the memory 323 at the input transmission rate ((4W) in FIG. 6).
After reaching the number of data of the input signal corresponding to the data to be recorded on one track on 0, the input signal is written into the memory 324 at the input transmission rate ((5W) in FIG. 6). The signals read from the memories 321 and 323 by repeating the above operation are sent from the output terminal 303 to the recording signal processor 400 at a predetermined processing rate ((6) in FIG. 6), and read from the memories 322 and 324. The output signal is output terminal 30
4 to the recording signal processor 400 at a predetermined processing rate ((7) in FIG. 6).

Next, a recording process for an input signal other than a transmission rate that satisfies a predetermined ratio, which is a problem to be solved by the present invention, will be described. FIG. 7 shows a signal processing operation of the input bit rate converter 300 when a signal having a transmission rate of 8 Mbps is input, and the processing operation in this case will be described. When an input signal having a transmission rate of 8 Mbps is input, the recording signal controller 200 determines that the processing mode is the 10M mode, and the memory control signal input terminal 3
02, a control signal for the 10M mode is sent. In the input bit rate converter 300, the input signal sent from the error corrector 100 is received by the input terminal 301 ((1) in FIG. 7), and the memories 321, 322, and 323 are sent by the memory control signal sent to the input terminal 302. , 324. The input signal is the processing unit period 2Tch in the 10M mode.
And are written separately to the memories 321 and 322 and the memories 323 and 324. Input signals are stored in the memories 321, 3
22, the input signal is first written into the memory 321 at the input transmission rate (see (2) in FIG. 7).
W)), after reaching the data number of the input signal corresponding to the data to be recorded on one track on the magnetic tape 510, the input signal is written into the memory 322 at the input transmission rate ((3W) in FIG. 7). However, in this case, the input transmission rate is 8 Mbps and the maximum input rate (1
(0 Mbps), the number of data in the processing unit period is also 4/5. Therefore, the writing to the memory 322 (the memory 324 in the next processing unit period) ends before the number of data of the input signal corresponding to the data to be recorded on one track on the magnetic tape 510 is reached. At this time, the recording signal controller 200 stores the number of valid data written in the memory 322 (the memory 324 in the next processing unit period), and stores the number of valid data in the next processing unit period.
2 is used to terminate the data reading from the data. In the next processing unit period after the processing unit period in which the signal writing processing to the memories 321 and 322 was performed, the memories 323 and 324
The input signal is first distributed to the memory 323 at the input transmission rate ((4W) in FIG. 7), and after reaching the data number of the input signal corresponding to the data to be recorded on one track on the magnetic tape 510. , The input signal is stored in the memory 32
4 at the input transmission rate ((5 in FIG. 7).
W)), and a signal reading process is performed from the memories 321 and 322 at the processing rate of the recording signal processor 400 ((2R) and (3R) in FIG. 7). However, the memory 322 in the previous processing unit period (the memory 324 in the next processing unit period)
Since the number of data written to the memory 321 is smaller than the number of data written to the memory 321, the reading of the memory 322 ends before the reading of the memory 321 (the memory 323 in the next processing unit period) ends. Is inserted ((2R) in FIG. 7).
(4R), (7). At this time, the recording signal system controller 200 inserts information on the number of valid data into the recording signal information and sends it to the recording signal processor 400. The signals read from the memories 321 and 323 by repeating the above operation are sent from the output terminal 303 to the recording signal processor 400 at a predetermined processing rate ((6) in FIG. 7), and read from the memories 322 and 324. The output signal is sent from the output terminal 304 to the recording signal processor 400 at a predetermined processing rate ((7) in FIG. 7).

As described above, the input memory buffer 300 performs signal processing according to each processing mode, and sends a signal to the recording signal processor 400 at a predetermined processing rate without changing the processing rate for each processing mode. Output.

In the recording signal processor 400, the signal sent from the input bit rate converter 300 is divided by a fixed data amount unit as a minimum synchronization unit at the time of reproduction.
Signal identification information, such as an error correction code, a transmission rate, and a processing mode, is added to the signal in a unit of a fixed data amount, and the signals are combined into a sync block. The signals processed by the recording signal processor 400 are recorded / reproduced magnetic heads 521, 522, 5
23, 524. FIG. 8 is a diagram showing a configuration example of a sync block. 8, reference numeral 81 denotes a synchronization pattern section (SYNC); 82, a signal information section (ID) including an identification signal such as an input transmission rate and a processing mode sent from the recording signal system controller 200; 83, a signal data section; Reference numeral 84 denotes an error correction signal part (Parity).

The signal output from the recording signal processor 400 is supplied to a recording / reproducing magnetic head 521, 522, 523 attached to a cylinder 520 rotating at a constant rotation speed.
According to 524, it is recorded on the magnetic tape 510 running at a predetermined speed according to the processing mode as shown in FIG. FIG. 9 shows a configuration of tracks recorded on the magnetic tape 510 by scanning of the recording / reproducing magnetic head in each processing mode. 9, P1, P2, Q1, and Q2 are recording / reproducing magnetic heads 521, 522, 523, and 524, respectively.
Shows the tracks recorded by the scanning of each track P1,
The oblique lines in P2, Q1, and Q2 indicate the magnetic heads 5 for recording and reproduction.
21 shows a state in which azimuth recording is performed by using azimuth angles given to 21, 522, 523, and 524. In each processing mode, the recording / reproducing magnetic heads 521, 522, 523,
The signal transmitted to the 524 has a constant data rate at a constant bit rate as shown in FIGS. 4, 5, 6, and 7 (6) and (7), but the cylinder 52 in the 20M mode.
A signal is sent every time the cylinder 520 makes one rotation (2Tch) in the 10M mode, every time the cylinder 520 makes two rotations (4Tch) in the 5M mode. Since the rotation speed of the cylinder 520 does not change depending on the processing mode and is constant, recording is performed for each Tch using the two sets of magnetic heads (521, 522 and 523, 524) alternately in the 20M mode.
Sets of magnetic heads (521, 522 as an example in FIG. 9)
, Recording is performed every 2 Tch, and one set of magnetic heads (521 and 52 in FIG.
Recording is performed every 4 Tch using only 2). Where 2
Assuming that the traveling speed of the magnetic tape 510 in the 0M mode is V, the magnetic tape 510 in the 10M mode and the 5M mode
Are controlled to V / 2 and V / 4, respectively. By controlling the running speed of the magnetic tape 510 in this manner, the magnetic tape 510 can be used without waste in each processing mode without any gap between the recording tracks as shown in FIG.

Next, the reproducing operation will be described. A signal recorded on the magnetic tape 510 is read by a recording / reproducing magnetic head 521, 522, 523, 524 attached to a cylinder 520 rotating at a constant rotation speed, and sent to a reproduction signal processor 700. Thus, the cylinder 52
By reading the signal while keeping the rotation speed of 0 constant, the bit rate of the signal sent to the reproduction signal processor 700 can be kept constant regardless of the processing mode or the like. The reproduction signal processor 700 first performs error correction processing or the like on the reproduction signal, and separates the signal into a signal data portion (83 in FIG. 8) and an ID including a transmission rate and a processing mode (82 in FIG. 8). Next, the separated signal data portion is sent to an output bit rate converter 900 at a predetermined bit rate, and information such as a processing mode, a transmission rate, and the number of valid data is detected from the ID. Send to controller 800. The tape running controller 600 controls the running speed of the magnetic tape 510 to a speed corresponding to each processing mode based on the processing mode information sent from the reproduction signal processor 700. Also,
In the reproduction signal system controller 800 having a built-in frequency oscillator,
The memory control signal is sent to the output bit rate converter 900 according to the information such as the processing mode and the transmission rate sent from the reproduction signal processor 700.

As described above, the recording signal processor 400
By performing signal processing at a constant processing rate irrespective of the transmission rate and processing mode from the signal processing to the reproduction signal processor 700, it is not necessary to configure a circuit for each processing mode, and the circuit configuration is simplified, and the circuit scale is reduced. can do.

Next, the operation of output bit rate converter 900 will be described. FIG. 10 shows an output bit rate converter 900.
An example of the configuration will be described. Basically, the output bit rate converter 900 has the same components as the input bit rate converter 300 described above and performs the reverse processing operation. In FIG. 10, 9
Reference numeral 01 denotes an input terminal for receiving a signal read from the magnetic tape 510 by the recording / reproducing magnetic heads 521 and 523 and subjected to error correction processing and the like by the reproduction signal processor 700;
Reference numeral 02 denotes an input terminal for receiving a signal read from the magnetic tape 510 by the recording / reproducing magnetic heads 522 and 524 and subjected to error correction processing and the like by the reproduction signal processor 700;
Numeral 03 denotes an input terminal for receiving a memory control signal sent from the reproduction signal system controller 800, 921, 922, 923, 9
Reference numeral 24 denotes a memory for converting a signal transmitted at the processing rate of the reproduction signal processor 700 to a transmission rate at the time of input, and reference numeral 904 denotes memories 921, 922, 923, and 92.
4 is an output terminal for sending the signal read out from No. 4 to the signal output terminal 120.

FIG. 11 shows a case where the input signal of 20 Mbps is
When reproducing a signal recorded in the mode, FIG.
FIG. 13 shows a signal process for reproducing a signal obtained by recording a 5 Mbps input signal in the 5M mode when reproducing a signal obtained by recording a bps input signal in the 10M mode. FIG.
1, (1) in FIG. 12, and FIG. 13 show signals read from the magnetic tape 510 by the recording / reproducing magnetic heads 521 and 523, subjected to error correction processing and the like by the reproduction signal processor 700, and received by the input terminal 901. , (2) show the magnetic tape 510 by the recording / reproducing magnetic heads 522 and 524.
From the input terminal 902 which has been read from the input terminal and subjected to error correction processing and the like by the reproduction signal processor 700, (3
W), (4W), (5W), and (6W) indicate signals to be written in the memories 921, 922, 923, and 924, respectively, and (3R), (4R), (5R), and (6R) indicate the signals in the memory 921, respectively. 922, 923, 924, and (7) indicate signals read from the memories 921, 922, 923,
924 shows the signal read out.

The signal processing of the output bit rate converter 900 when reproducing a signal in which the input signal of 20 Mbps shown in FIG. 11 is recorded in the 20M mode will be described. The output bit rate converter 900 receives the reproduced signal sent from the reproduced signal processor 700 at the input terminals 901 and 902,
For each processing unit period Tch in the 0M mode, the input terminal 9
The input signal ((1) in FIG. 11) received at 01 is distributed to the memory 921 and the memory 923.
The input signal ((2) in FIG. 11) received at 02 is distributed to the memory 922 and the memory 924 and written into the memory at the processing rate of the reproduction signal processor 700. First, during a certain processing unit period, the reproduced signal is stored in the memory 921 and the memory 9.
22 ((3W), (4W) in FIG. 11). In the next processing unit period, the reproduced signal is stored in the memory 923 and the memory 92.
4 ((5W) and (6W) in FIG. 11), and when the reproduction signal is being written to the memories 923 and 924, the memories 921 and 922 first use the memory 921 at the recording input rate (20 Mbps). The signal is read ((3R) in FIG. 11), and after all the signals written to the memory 921 are read, the reading of the signal from the memory 922 starts ((4R) in FIG. 11). Where 2
The read-out control signal of 0 Mbps detects information on the transmission rate added to the recording signal in the recording signal processor 400 during recording in the reproduction signal processor 700 from the reproduction signal, and incorporates a frequency oscillator and the like based on the detected information. This is generated by the reproduction signal system controller 800 to be executed. By repeating the above processing operation, the memory 921,
The signals ((7) in FIG. 11) read out from 922, 923, and 924 at the input rate (20 Mbps) at the time of recording are sent from the output terminal 904 to the signal output terminal 120.

The signal processing of the output bit rate converter 900 when reproducing a signal in which the input signal of 10 Mbps shown in FIG. 12 is recorded in the 10M mode will be described. In the output bit rate converter 900, the reproduced signal sent from the reproduced signal processor 700 is received at the input terminals 901 and 902, and 1 is output by the memory control signal sent to the input terminal 903.
The input signal ((1) in FIG. 12) received at the input terminal 901 is distributed to the memory 921 and the memory 923 every 2 Tch of the processing unit period in the 0M mode, and the input signal received at the input terminal 902 (FIG. 12). (2)) is distributed to the memory 922 and the memory 924 and written into the memory at the processing rate of the reproduction signal processor 700. First,
The reproduction signal is written to the memory 921 and the memory 922 during a certain processing unit period ((3W) and (4W) in FIG. 12). The reproduction signal is stored in the memory 923 and the memory 9 in the next processing unit period.
24 ((5W) and (6W) in FIG. 12), while the reproduction signals are being written to the memories 923 and 924, the memories 921 and 922 first store the memory 921
, A signal is read out at an input rate (10 Mbps) during recording ((3R) in FIG. 12), and after all the signals written in the memory 921 are read out, reading of the signal from the memory 922 starts (FIG. 12). Medium (4R)). here,
The read control signal of 10 Mbps detects information on the transmission rate added to the recording signal in the recording signal processor 400 during recording in the reproduction signal processor 700 from the reproduction signal, and incorporates a frequency oscillator and the like based on the detected information. This is generated by the reproduction signal system controller 800 to be executed. By repeating the above processing operation, the memory 92
The signals ((7) in FIG. 12) read out at the input rate (10 Mbps) at the time of recording from 1, 922, 923, and 924 are sent from the output terminal 904 to the signal output terminal 120.

The input signal of 5 Mbps shown in FIG.
The signal processing of the output bit rate converter 900 when reproducing a signal recorded in the M mode will be described. In the output bit rate converter 900, the reproduced signal sent from the reproduced signal processor 700 is received at the input terminals 901 and 902, and the memory control signal sent to the input terminal 903 is used for every processing unit period 4 Tch in the 5M mode. The input signal ((1) in FIG. 13) received at the input terminal 901 is stored in the memory 921.
The input signal ((2) in FIG. 13) received at the input terminal 902 is distributed to the memory 922.
And the reproduction signal processor 700
Is written to the memory at the processing rate. First, a reproduction signal is written to the memory 921 and the memory 922 during a certain processing unit period ((3W) and (4W) in FIG. 13). In the next processing unit period, the reproduction signal is written into the memory 923 and the memory 924 ((5W) and (6W) in FIG. 13), and the memory 923
First, in the memories 921 and 922, when the reproduction signal is written in the memory 924, the signal is read out from the memory 921 at the input rate (5 Mbps) at the time of recording ((3R) in FIG. 13) and written into the memory 921. After all the read signals are read, reading of the signals from the memory 922 starts ((4R) in FIG. 13). Here, 5Mbps
The read-out control signal detects information on the transmission rate added to the recording signal in the recording signal processor 400 during recording from the reproduced signal in the reproduced signal processor 700, and incorporates a frequency oscillator or the like based on the detected information. This is generated by the reproduction signal system controller 800. By repeating the above processing operations, the memories 921, 922, 9
23, 924 in order from the recording input rate (5 Mbp
The signal read in (s) ((7) in FIG. 13) is sent from the output terminal 904 to the signal output terminal 120.

Next, a description will be given of processing for recording and reproducing an input signal other than a transmission rate satisfying a predetermined ratio, which is a problem to be solved by the present invention. FIG.
8 shows a signal processing operation of the output bit rate converter 900 when a signal having a transmission rate of 8 Mbps is input and the signal recorded by the processing operation described with reference to FIG. 7 is reproduced. The processing operation in this case will be described. In FIG.
(2), (4W), and (6W) hatched portions indicate invalid data (dummy data) added during recording. In the output bit rate converter 900, the reproduced signal sent from the reproduced signal processor 700 is received at the input terminals 901 and 902, and the memory control signal sent to the input terminal 903 is used for every 2 Tch of the processing unit period in the 10M mode. The input signal ((1) in FIG. 14) received at the input terminal 901 is stored in the memory 921.
The input signal ((2) in FIG. 14) received at the input terminal 902 is distributed to the memory 922.
And the reproduction signal processor 700
Is written to the memory at the processing rate. First, a reproduction signal is written into the memory 921 and the memory 922 during a certain processing unit period ((3W) and (4W) in FIG. 14). In the next processing unit period, the reproduced signal is written into the memories 923 and 924 ((5W) and (6W) in FIG. 14), and the memory 923
When the reproduction signal is written in the memory 924, the memory 921, 922 first reads the signal from the memory 921 at the input rate (8 Mbps) at the time of recording (8 Mbps in FIG. 14), and writes the signal in the memory 921. The reading of the signal from the memory 922 starts after all the read signals have been read, and the reading ends after reading all the valid data ((4R) in FIG. 14). Here, the control signal for reading at 8 Mbps is supplied to the recording system signal processor 4 during recording.
In the reproduction signal processor 700, information on the transmission rate added to the recording signal is detected from the reproduction signal in the reproduction signal processor 700, and the detected information is generated in the reproduction signal system controller 800 including a frequency oscillator and the like. By repeating the above processing operations, the memories 921, 922, 92
Input rate for recording (8Mbps) in order from 3,924
((7) in FIG. 14) is output from the output terminal 90.
4 to the signal output terminal 120.

As described above, according to this embodiment, signals of various transmission rates are converted into a constant bit rate,
By recording information such as a transmission rate at the same time as recording, recording and reproduction on a VTR can be easily realized.

Next, as an example of the signal identification information recording process, in the signal identification information recording process, the signal data is added to the signal identification information and recorded on the same track on the magnetic tape 510 as the signal data. explained. Here, a second example of the recording processing of the signal identification information will be described.

The second example of the process of recording the signal identification information is to record in the longitudinal direction of the magnetic tape 510 using a fixed magnetic head. FIG. 15 is a configuration example for realizing the second example. 530 is a fixed magnetic head for recording signals in the longitudinal direction of the magnetic tape 510. FIG.
Reference numeral 6 denotes a configuration of a track recorded on the magnetic tape 510 by scanning of the rotating magnetic heads (521, 522, 523, 524) and the fixed magnetic head 530 in the 20M mode in the second example. FIG. 17 shows a configuration example of a sync block in the second example. 17, reference numeral 1701 denotes a synchronization pattern part (SYNC); 1702, a signal data part;
3 is an error correction signal part (Parity). In the second example, by separating the signal identification information from the signal data as shown in FIG. 17, the number of signal data that can be recorded on one track can be increased. That is, the maximum transmission rate of a signal that can be input to the signal processing device can be increased. Further, by increasing the code length of the error correction code, the error correction capability can be improved.

Next, as an example of the writing and reading processing in the input bit rate converter 300 and the output bit rate converter 900, an example in which signals are continuously written in one memory in the writing and reading processing has been described. By performing recording in this manner, it is possible to reduce the influence of an error when a normal signal cannot be read from the magnetic head on other normally read signals. Therefore, the first example of the write and read processing is effective when recording a compression-encoded signal. However, there is a correlation between adjacent signals such as uncompressed audio signals and video signals, and even if an error occurs in a part of the signal, a signal that can be interpolated by the previous and next signals is written and read. When recording is performed as in the first example, interpolation processing cannot be performed when one of the two magnetic heads that scan simultaneously cannot read a normal signal due to clogging or the like. Such a problem can be solved by a second example of the write and read processing described below.

The second example of the writing and reading processing is as follows.
The signal is alternately distributed to two memories. FIG. 18 shows an example of a signal processing operation of the input bit rate converter 300 in the second example when an input signal having a transmission rate of 8 Mbps is input, and the processing operation will be described. When an input signal having a transmission rate of 8 Mbps is input, the recording signal controller 200 determines that the processing mode is the 10M mode, and sends a control signal for the 10M mode to the memory control signal input terminal 302. In the input bit rate converter 300,
The input signal sent from the error corrector 100 is input to an input terminal 30.
18 ((1) in FIG. 18), the memories 321, 322, 3
23 and 324 are written. The input signal is distributed and written to the memories 321 and 322 and the memories 323 and 324 every 2 Tch of the processing unit period in the 10M mode. When the input signal is distributed to the memories 321 and 322, the input signal is alternately written to the memory 321 and the memory 322 in units of bits or blocks shown in FIG. 2 ((2W) and (3W) in FIG. 18). At this time, the recording signal controller 200 stores the number of valid data written in the memories 321 and 322 (the memories 323 and 324 in the next processing unit period) and stores the number of valid data in the next processing unit period.
1 and 322 are used to end the data reading. In the next processing unit period after the processing unit period in which the signal writing processing to the memories 321 and 322 was performed, the memory 32
3 and 324, and the input signals are stored in the memory 32 in units of bits or blocks shown in FIG.
3 are alternately written in the memory 324 ((4
W), (5W)), and a signal reading process is performed from the memories 321 and 322 at the processing rate of the recording signal processor 400 ((2R) and (3R) in FIG. 18). However, since the transmission rate of the input signal is 8 Mbps, the number of valid data read from each of the memories 321 and 322 is smaller than the number of data of the input signal corresponding to data to be recorded on one track on the magnetic tape 510. . For this reason,
After reading all valid data, dummy data indicating an invalid signal is inserted ((2R) in FIG. 18,
(3R) shaded area). At this time, the recording signal system controller 200
Inserts information on the number of valid data into the recording signal information and sends it to the recording signal processor 400. By repeating the above operation, the memory 3
21 and 323 are sent from the output terminal 303 to the recording signal processor 400 ((6) in FIG. 18).
The signals read from the memories 322 and 324 are sent from the output terminal 304 to the recording signal processor 400 (FIG. 1).
8 (7)).

Next, the signal processing operation of the output bit rate converter 900 in the second example of the write and read processing will be described. An output bit rate converter 9 in the case where a signal having a transmission rate of 8 Mbps is input to FIG. 19 and a signal recorded by the processing operation described with reference to FIG. 18 is reproduced.
00 shows a signal processing operation. In FIG. 18, (1)
(2), (3W), (4W), (5W) and (6W) indicate invalid data (dummy data). In the output bit rate converter 900, the reproduction signal sent from the reproduction signal processor 700 is received at input terminals 901 and 902,
10M by the memory control signal sent to the input terminal 903
The input terminal 90 is set for each processing unit period 2Tch in the mode.
1 ((1) in FIG. 18) is stored in the memory 9
21 and the memory 923, and the input terminal 90
The input signal ((2) in FIG. 18) received in
22 and the reproduction signal processor 7
It is written to memory at a processing rate of 00. First, during a certain processing unit period, the reproduced signal is stored in the memory 921 and the memory 92
2 ((3W), (4W) in FIG. 18). In the next processing unit period, the reproduction signal is stored in the memory 923 and the memory 924.
184 ((5W) and (6W) in FIG. 184), and when the reproduction signal is written to the memories 923 and 924, the memories 921 and 922 store the memory 921 and the memory in bit units or the block units shown in FIG. 922
From (3R), (4
R)). By repeating the above processing operation, the memory 921,
From 922, 923, 924, the input rate during recording (8M
The signal read out at (bps) ((7) in FIG. 18) is sent from the output terminal 904 to the signal output terminal 120.

In the second example of the write and read processing described above, when an input signal has a correlation with an adjacent signal such as an uncompressed audio or video signal, a magnetic head which scans two simultaneously is used. Even when one of the magnetic heads cannot read a normal reproduction signal from the magnetic tape 510 due to clogging or the like, it is possible to interpolate with the signal reproduced by the other magnetic head. Further, the recording signal controller 200 detects information related to compression included in the ID in the input signal, determines whether the input signal is a compression coded signal or an uncompressed signal, and describes a first example in the writing and reading processing. By selecting whether to use the second example or not, it is possible to perform a recording and reproducing process suitable for an input signal.

As described above, according to the present invention, the input transmission rate which is lower than the highest signal input rate that can be recorded on the VTR having the rotating magnetic head, and the accuracy of the oscillation frequency of the built-in frequency oscillator (effective digit number) If the signal has the input transmission rate in parentheses), recording and reproduction can be performed.

In this embodiment, as an example of the processing mode, 2
For the highest input transmission rate (20 Mbps) such as 0M mode, 10M mode, and 5M mode, 1/1 (20M mode)
× 1 ÷ 1 = 20M), （(20M × 1 ÷ 2 = 10M)
M) and 1/4 (20M × 1 ÷ 4 = 5M), the present invention is applied to a processing mode of 1 / n (n is a natural number) with respect to the maximum input transmission rate. Is also effective.

In this embodiment, the transmission rate of the input signal is 20 Mbps, 10 Mbps, 5 Mbps, 8 Mbps.
Although an example of signal processing for four transmission rates of s has been described, the present invention provides an input transmission rate equal to or less than the maximum input transmission rate and within the precision (effective number of digits) of the oscillation frequency of the built-in frequency oscillator. It is also effective for input signals with a rate.

In this embodiment, the case of a VTR having four rotating magnetic heads has been described, but the present invention is also effective for a VTR having m (m is a natural number) rotating magnetic heads.

[0040]

As described above, according to the present invention, the processing rate of the internal signal processor can be made constant by the bit rate conversion processing at the time of signal input and at the time of signal output. The structure and signal processing of a signal processing device for recording and reproducing the digital signal described above are facilitated, and its practical effect is great.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration example of a block unit of a signal input to a signal storage and processing device.

FIG. 3 is a diagram showing one circuit configuration for realizing bit rate conversion during recording.

FIG. 4 is a diagram showing data processing when recording a signal having a transmission rate of 20 Mbps.

FIG. 5 is a diagram showing data processing when recording a signal having a transmission rate of 10 Mbps.

FIG. 6 is a diagram showing data processing when recording a signal having a transmission rate of 5 Mbps.

FIG. 7 is a diagram illustrating data processing when recording a signal having a transmission rate of 8 Mbps.

FIG. 8 is a diagram showing a configuration example of a sync block which is a minimum unit when recording a signal on a magnetic tape.

FIG. 9 is a diagram showing a configuration example of a track recorded on a magnetic tape by scanning of a recording / reproducing magnetic head in each processing mode.

FIG. 10 is a diagram showing one circuit configuration for realizing bit rate conversion during reproduction.

FIG. 11 is a diagram showing data processing when reproducing a magnetic tape on which a signal having a transmission rate of 20 Mbps is recorded.

FIG. 12 is a diagram illustrating data processing when reproducing a magnetic tape on which a signal having a transmission rate of 10 Mbps is recorded.

FIG. 13 is a diagram showing data processing when reproducing a magnetic tape on which a signal having a transmission rate of 5 Mbps is recorded.

FIG. 14 is a diagram showing data processing when reproducing a magnetic tape on which a signal having a transmission rate of 8 Mbps is recorded.

FIG. 15 is a block diagram illustrating a second example of recording processing of signal identification information.

FIG. 16 is a diagram illustrating a configuration example of a track recorded on a magnetic tape by scanning of a rotating magnetic head and a fixed magnetic head in a second example of a process of recording signal identification information.

FIG. 17 is a diagram illustrating a configuration example of a sync block in a second example of a process of recording signal identification information.

FIG. 18 is a diagram illustrating data processing when a signal having a transmission rate of 8 Mbps is recorded in the second example of the writing and reading processing.

FIG. 19 is a diagram illustrating data processing when reproducing a magnetic tape on which a signal having a transmission rate of 8 Mbps is recorded in a second example of the writing and reading processing.

[Explanation of symbols]

100: Error Corrector 110: Digital Signal Input Terminal 120: Digital Signal Output Terminal 200: Recording System Controller 300: Input Bit Rate Converter 400: Recording Signal Processing 510: Magnetic Tape 520: Cylinder 521, 522, 523, 524 ... Magnetic head for recording / reproducing 600 ... Tape running controller 700 ... Reproducing signal processor 800 ... Reproducing signal system controller 900 ... Output bit rate converter

Continued on the front page (72) Inventor Kazuhiko Yoshizawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi, Ltd.Video Media Research Laboratories (72) Inventor Naozumi Sugimura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa, Japan (72) Inventor Hiroyuki Hayakawa 1410 Inada, Katsuta, Ibaraki Pref. AV Equipment Division, Hitachi, Ltd. (56) References JP-A-7-141772 (JP, A) JP-A-7-110902 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) G11B 20/10 301 H04N 5/92

Claims (6)

(57) [Claims] 1. A signal processing apparatus for helically recording and reproducing digital signals of a plurality of transmission rates on a magnetic tape using a rotary magnetic head, means for detecting information relating to a transmission rate included in an input digital signal. Means for determining a processing mode based on the transmission rate detected by the detection means; means for converting the input digital signal into a signal having a constant processing rate ; signal identification information includes means for controlling, the least even pre Symbol treatment mode during recording
And the digital signal converted to a constant processing rate,
Means for recording at a recording timing according to the processing mode, and whether the signal identification information included in the reproduced signal during reproduction is
Means for detecting the Luo upper Symbol processing mode, and means for controlling the running speed of the magnetic tape by the processing mode detected from the reproduction signal during reproduction, the transmission rate at the time of input a signal of a fixed rate that is reproduced during reproduction A signal processing device, comprising: conversion means for converting. 2. In the processing mode, the highest transmission rate recordable by the signal processing device is m in the highest processing mode, and m / n (n is a natural number) in other processing modes. The signal processing device according to claim 1, wherein 3. The means for converting the input digital signal into a signal having a constant processing rate, wherein the means for converting the input digital signal has a transmission rate less than the maximum recordable transmission rate in the processing mode determined by the processing mode determining means at the time of recording. Invalid the converted data sequence so that the length of the data sequence after converting the digital signal is equal to the length of the data sequence after converting the digital signal with the highest recordable transmission rate in the determined processing mode The signal processing device according to claim 1, wherein a signal indicating a signal portion is added. 4. The apparatus according to claim 1, wherein the means for recording the signal identification information is configured to record in a longitudinal direction of the magnetic tape using a fixed magnetic head. Signal processing device. 5. The apparatus according to claim 1, wherein the means for converting the input digital signal into a signal having a constant processing rate and the means for converting the reproduced signal having a constant rate into a transmission rate at the time of input are each provided with at least one predetermined amount. And a memory capable of storing the signals. The input digital signals are sequentially written into each memory by a predetermined amount at the input transmission rate at the time of recording, and the signals read out from one or more memories at the predetermined processing rate at the same time are read out. Is recorded on a magnetic tape by one or more magnetic heads, and at the time of reproduction, a signal reproduced from the magnetic tape by one or more magnetic heads at a predetermined processing rate is simultaneously written into one or more memories at a predetermined processing rate; The signal is read out continuously and continuously at a transmission rate at the time of input. To signal processing apparatus according to any one of 4. 6. A converting means for converting the transmission rate at the time of receiving a signal means and the reproduced predetermined rate for converting said input digital signal into a signal of a constant processing rate, one or more each of the at least a predetermined amount And a memory capable of storing the input digital signal. At the time of recording, the input digital signal is written at the transmission rate of the input digital signal by switching the memory for each predetermined bit length, and at the time of reading the signal, 1 is written.
At the same time, data is read from a plurality of memories at a predetermined processing rate, and the read signals are recorded on a magnetic tape by one or more magnetic heads. At the time of reproduction, the signals are reproduced from the magnetic tape by one or more magnetic heads at a predetermined processing rate. 1
At the same time at a predetermined processing rate to more than one memory,
5. The signal processing apparatus according to claim 1, wherein when reading a signal, the memory is switched at every bit length same as that at the time of input, and reading is performed at a transmission rate at the time of input.