JP3129005B2 - Signal converter - Google Patents

Signal converter

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Publication number
JP3129005B2
JP3129005B2 JP04328311A JP32831192A JP3129005B2 JP 3129005 B2 JP3129005 B2 JP 3129005B2 JP 04328311 A JP04328311 A JP 04328311A JP 32831192 A JP32831192 A JP 32831192A JP 3129005 B2 JP3129005 B2 JP 3129005B2
Authority
JP
Japan
Prior art keywords
resistance
voltage
signal converter
msr
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP04328311A
Other languages
Japanese (ja)
Other versions
JPH06174559A (en
Inventor
直之 松尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP04328311A priority Critical patent/JP3129005B2/en
Publication of JPH06174559A publication Critical patent/JPH06174559A/en
Application granted granted Critical
Publication of JP3129005B2 publication Critical patent/JP3129005B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Measurement Of Resistance Or Impedance (AREA)
  • Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)
  • Analogue/Digital Conversion (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】この発明は、工業プロセス信号処
理などに用いられ、測温抵抗体などの抵抗センサの抵抗
値を計測し、この抵抗値を計測対象物理量(温度など)
に対応する正規化された信号(1〜5Vなど)に変換し
て出力する信号変換器に関する。なお以下各図において
同一の符号は同一もしくは相当部分を示す。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in industrial process signal processing, etc., and measures the resistance value of a resistance sensor such as a resistance temperature detector, and measures the resistance value as a physical quantity (temperature, etc.) to be measured.
And a signal converter that converts the signal into a normalized signal (1 to 5 V or the like) corresponding to and outputs the signal. In the drawings, the same reference numerals indicate the same or corresponding parts.

【0002】[0002]

【従来の技術】図2は従来の抵抗入力の信号変換器の構
成例を示す回路図である。また図3は図2のCPU1内
のソフトウェアで実現される信号の計算手順の説明図で
ある。先ず、図2の回路においては、基準電圧ER と抵
抗R,R’,抵抗センサRMSRより構成されるブリッジ
回路で、抵抗センサRMSR の抵抗値は電圧に変換され
る。即ちスイッチSW1(SW1−1,SW1−2,S
W1−3)はCPU1によって制御されるようになって
おり、このSW1−3,1−2,1−1を順次時間分割
で投入し、ブリッジ回路により得られる2つの電圧信
号、つまり端子I- ,IO 間の電圧(後述のIO,A/D )
、および端子I−と抵抗R,R’の接続点間の電圧
(後述のI+,A/D )をA/D変換回路2を介して測定す
る。
2. Description of the Related Art FIG. 2 is a circuit diagram showing an example of the configuration of a conventional signal converter having a resistance input. FIG. 3 is an explanatory diagram of a signal calculation procedure realized by software in the CPU 1 of FIG. First, in the circuit of Figure 2, reference voltage E R and the resistor R, R ', a bridge circuit comprised of resistor sensor R MSR, the resistance value of the resistance sensor R MSR is converted into a voltage. That is, the switch SW1 (SW1-1, SW1-2, S
W1-3) is adapted to be controlled by the CPU 1, was charged in this SW1-3,1-2,1-1 sequential time division, two voltage signals obtained by the bridge circuit, i.e. the terminal I - , I O (I O, A / D described later)
, And a voltage (I +, A / D described later) between the connection point of the terminal I− and the resistors R and R ′ is measured via the A / D conversion circuit 2.

【0003】A/D変換回路2を構成するAMP1 は演算
増幅器でスイッチSW1で切り換えられた電圧信号を増
幅し、同じくA/D変換回路2を構成する次段のA/D
変換器に与える。このA/D変換器は積分形の例であ
り、CPU1によって制御されるスイッチSW2(SW
2−1,SW2−2,SW2−3)の信号切替器と抵抗
1 、コンデンサCおよび演算増幅器AMP2 ・AMP3
ら構成される。
[0003] A / D conversion circuit 2 A MP1 constituting the amplifies the voltage signal is switched by the switch SW1 in the operational amplifier, also of the next stage which constitute the A / D converter circuit 2 A / D
Give to the converter. This A / D converter is an example of an integral type, and a switch SW2 (SW
2-1, SW2-2, signal switch and the resistor R 1 of SW2-3), a capacitor C and an operational amplifier A MP2 · A MP3.

【0004】スイッチSW2はCPU1によって先ず、
スイッチSW2−1が接続され、抵抗R2 を通し、積分
コンデンサCに蓄電された電荷を放電する。次に、CP
U1によってSW2−2のみが接続され、増幅器AMP1
の出力電圧が抵抗R1 に印加され、この抵抗R1 の電流
は増幅器AMP2 によりコンデンサCに蓄えられる。この
スイッチSW2−2の接続を一定時間行うことで、積分
増幅器の入力信号、つまり増幅器AMP1 の入力または出
力電圧に応じた電圧がコンデンサCに蓄電される。次に
CPU1によってスイッチSW2−3のみをオンするこ
とにより、基準電圧−Er により、コンデンサCに蓄電
された電荷は一定の勾配で放電される。演算増幅器A
MP3 はコンデンサCの電圧を0Vと比較する比較器で、
CPU1は、この比較器AMP3 の出力を監視し、スイッ
チSW2−3のオン後、コンデンサCの電圧が0になる
までの時間を計測し、入力信号の値を時間データ(デジ
タル信号)として取込む。上記動作を、スイッチSW1
と組合せて制御することで、入力段のブリッジ回路の2
つの電圧信号をA/D変換する。
The switch SW2 is first controlled by the CPU1.
Switch SW2-1 is connected, through a resistor R 2, and discharges the charges accumulated in the integrating capacitor C. Next, CP
Only SW2-2 is connected by U1, and amplifier A MP1
Is applied the output voltage to the resistor R 1, a current the resistor R 1 is stored in the capacitor C by the amplifier A MP2. The connection of the switches SW2-2 by performing a predetermined time, the input signal of the integration amplifier, i.e. voltage corresponding to the input or output voltage of the amplifier A MP1 is charged in the capacitor C. Then by turning on only the switch SW2-3 by CPU 1, the reference voltage -E r, stored electric charge in the capacitor C is discharged at a constant gradient. Operational amplifier A
MP3 is a comparator that compares the voltage of the capacitor C with 0V.
The CPU 1 monitors the output of the comparator A MP3 , measures the time until the voltage of the capacitor C becomes 0 after the switch SW2-3 is turned on, and takes the value of the input signal as time data (digital signal). Put in. The above operation is performed by the switch SW1
Control in combination with
A / D-converts two voltage signals.

【0005】次に、図3はソフトウェアで実現される信
号の計算手順である。IO,A/D ・I +,A/D は図2で述べ
た2つの電圧信号のA/D変換結果であるが、この値は
先ず予め準備された2つの基準入力値のA/D変換値と
比較され、スケール変換される。このスケール変換は、
A/D変換値を、次段の折線補正と併用で温度などの物
理量に変換するために行われる。
Next, FIG. 3 shows a signal realized by software.
This is the procedure for calculating the number. IO, A / D・ I +, A / DDescribed in Figure 2
This is the result of A / D conversion of the two voltage signals.
First, A / D conversion values of two reference input values prepared in advance and
Compared and scaled. This scale conversion is
The A / D conversion value can be used in conjunction with the next-
This is done to convert to a logical amount.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記の
ブリッジ回路による計測は、抵抗センサRMSR と信号変
換器を接続する配線の抵抗値が大きくなると、その影響
を無視できなくなる。また、ブリッジ回路を正確に構成
するためには、2個の抵抗Rをバランスさせなければな
らず、製作面での制約も大きい。
However, in the above measurement by the bridge circuit, if the resistance value of the wiring connecting the resistance sensor RMSR and the signal converter becomes large, the influence cannot be ignored. In addition, in order to form a bridge circuit accurately, the two resistors R must be balanced, which greatly imposes restrictions on manufacturing.

【0007】そこで本発明はこのような問題を解消でき
る信号変換器を提供することを課題とする。
Therefore, an object of the present invention is to provide a signal converter which can solve such a problem.

【0008】[0008]

【課題を解決するための手段】前記の課題を解決するた
めに、請求項1の信号変換器は、A/D変換手段(A/
D変換回路2など)と、このA/D変換手段を(スイッ
チSW2などを介し)制御すると共にそのA/D変換出
力データを読込むCPU(1など)とを持ち、抵抗セン
サ(RMSR など)の抵抗値を計測してその温度などを求
める信号変換器であって、第1および第2の配線の夫々
の一方の端末を前記抵抗センサの一方の端子に接続し、
この第1の配線と等しい抵抗値(配線抵抗rなど)を持
つ第3の配線の一方の端末を前記抵抗センサの他方の端
子に接続し、所定の直流電圧(直流電圧源ER など)を
所定の直列抵抗(Rなど)を介して前記第1および第3
の配線の他方の端末(端子IO ,I- など)間に印加し
てなる信号変換器において、前記CPUによって制御さ
れ、前記第1および第3の配線の他方の端末間の電圧
(VO など、以下第1の計測電圧という)を前記A/D
変換手段に切換え入力する手段(スイッチSW1−1,
SW1−3など)と、同じく前記CPUによって制御さ
れ、前記第2および第3の配線の他方の端末間の電圧
(V+ など、以下第2の計測電圧という)を前記A/D
変換手段に切換え入力する手段(スイッチSW1−2,
SW1−3など)とを備え、前記CPUは前記第1およ
び第2の計測電圧の前記A/D変換手段による変換出力
データと、予め行われた計測に基づいて保持する所定の
演算パラメータ(3など)とを用いて前記抵抗センサの
みの抵抗値を演算出力するようにする。
In order to solve the above-mentioned problems, a signal converter according to the present invention comprises an A / D converter (A / D converter).
And D such as converter 2), the A / D converter (having the A / D conversion output data read writing CPU the (1, etc.) and with the via) control such as a switch SW2, resistor sensor (R MSR such as A) a signal converter for measuring the resistance value and obtaining the temperature and the like, wherein one terminal of each of first and second wirings is connected to one terminal of the resistance sensor;
The first wiring and the resistance equal to the one terminal of the third wiring with (wiring resistance r or the like) connected to the other terminal of the resistance sensor, a predetermined DC voltage (DC voltage source E R, etc.) The first and the third through a predetermined series resistance (R, etc.)
In the signal converter applied between the other terminals (terminals I O , I −, etc.) of the first wiring, the voltage (V O) between the other terminals of the first and third wirings is controlled by the CPU. Etc., hereinafter referred to as a first measurement voltage).
Means for switching and inputting to the conversion means (switches SW1-1, SW1-1)
SW1-3, etc.) and a voltage between the other terminals of the second and third wirings (such as V + , hereinafter referred to as a second measured voltage) controlled by the CPU.
Means for switching and inputting to the conversion means (switches SW1-2, SW1-2)
SW1-3, etc.), and the CPU is configured to convert the output data of the first and second measured voltages by the A / D converter and a predetermined operation parameter (3 ) To calculate and output the resistance value of only the resistance sensor.

【0009】また、請求項2の信号変換器では、請求項
1に記載の信号変換器において、前記演算パラメータは
前記第1および第3の配線の持つ抵抗値を無視し得る状
態とし、前記抵抗センサを既知の異なる値を持つ2つの
抵抗(RMSR,F 、RMSR, B など)に夫々置換えたときの
前記第1または第2の計測電圧(VO,F 、VO,Bなど)
の前記A/D変換出力データを用いて定められたもので
あるようにする。
According to a second aspect of the present invention, in the signal converter according to the first aspect, the operation parameters are such that the resistance values of the first and third wirings can be ignored. The first or second measurement voltage (V O, F , V O, B, etc.) when the sensor is replaced by two resistors (R MSR, F , R MSR, B, etc.) having known different values, respectively.
Is determined using the A / D conversion output data.

【0010】[0010]

【作用】基準電圧源ER から所定の直列抵抗Rを介して
配線を含む抵抗センサRMSR に通電を行い、この抵抗セ
ンサRMSR およびその両端に接続された配線2本(配線
抵抗2r)分の電圧降下VO と、この抵抗センサRMSR
およびその1端に接続された配線1本(配線抵抗r)分
の電圧降下V+ とのA/D変換データと、事前の調整に
おいて、配線抵抗を除去し、抵抗センサに代わる既知の
抵抗を接続し、その電圧降下の測定データから求めて保
持している演算パラメータとからCPUに抵抗センサの
配線抵抗を含まぬ正確な抵抗値を演算出力させる。
A current is supplied from the reference voltage source E R to the resistance sensor RMSR including the wiring via a predetermined series resistance R, and the resistance sensor RMSR and two wirings (wiring resistance 2r) connected to both ends thereof are connected. the voltage drop V O of the resistive sensor R MSR
And A / D conversion data of a voltage drop V + for one wire (wiring resistance r) connected to one end thereof, and in a prior adjustment, the wiring resistance is removed, and a known resistance replacing the resistance sensor is replaced. The CPU then causes the CPU to calculate and output an accurate resistance value that does not include the wiring resistance of the resistance sensor, from the calculation parameters obtained and held from the measured data of the voltage drop.

【0011】[0011]

【実施例】図1はこの発明の実施例を示す回路図で、図
2の従来回路例と比較すると、ブリッジ回路の部分が、
1つの電圧源ER と、1つの抵抗Rと、抵抗センサR
MSRで構成される。また、前記以外の回路構成は、図2
の回路例と等価である。抵抗センサRMSR は夫々内部抵
抗rを持つ3本(この例ではセンサの上端側に2本、下
端側に1本)の配線を介してこの信号変換器の端子
O ,I+ ,I- に接続されている。本発明においても
スイッチSW1(SW1−1,SW1−2,SW1−
3)の切換によって、端子I- に対する端子IO の電圧
O および同じく端子I- に対する端子I+ の電圧V+
をA/D変換回路2に与えて測定するが、この入力電圧
O ,V+ は次式(1),(2)で表わされる。
FIG. 1 is a circuit diagram showing an embodiment of the present invention. Compared with the conventional circuit example shown in FIG.
One voltage source E R , one resistor R, and a resistance sensor R
Consists of MSR . The circuit configuration other than the above is shown in FIG.
Is equivalent to the circuit example of FIG. Resistive sensor R MSR is three with each internal resistance r (2 present on the upper side of the sensor in this example, one on the lower end side) terminal I O of the signal converter via the wire, I +, I - It is connected to the. In the present invention, the switch SW1 (SW1-1, SW1-2, SW1-
By the switching of 3), the terminal I - voltage at the terminal I O for V O and also terminals I - for terminals I + voltage V +
Is applied to the A / D conversion circuit 2 and measured. The input voltages V O and V + are expressed by the following equations (1) and (2).

【0012】〔数1〕 VO =(2r+RMSR )×ER /(R+2r+RMSR )………………(1) V+ =(r+RMSR )×ER /(R+2r+RMSR ) ………………(2) ここで、rは前述のように抵抗センサRMSR と信号変換
器間を接続する配線の1本分の抵抗である。次に(1)
および(2)式によりrを消去すると次式(3)が得ら
れる。
[Equation 1] V O = (2r + R MSR ) × E R / (R + 2r + R MSR ) (1) V + = (r + R MSR ) × E R / (R + 2r + R MSR ) ... (2) Here, r is a resistance of one wire connecting the resistance sensor RMSR and the signal converter as described above. Then (1)
Eliminating r by equation (2) yields equation (3).

【0013】〔数2〕 RMSR =〔V+ −(VO −V+ )〕×R/(ER −VO )……………(3) この(3)式は電圧源ER と抵抗Rの値を予め定量的に
求めることができれば、RMSR を求めることができるこ
とを表している。そこでこのER ,Rの値を求めるため
に、配線抵抗r=0にて、RMSR を2つの既知の固定値
MSR,F およびRMSR,B に置換えて各々の入力電圧V
O,F およびVO,B を求める。すると(3)式により、次
式が得られる。
[Equation 2] R MSR = [V + -(V O -V + )] × R / (E R -V O ) (3) Equation (3) is a voltage source E R If the value of the resistance R can be determined quantitatively in advance, it is possible to determine R MSR . Therefore, in order to obtain the values of E R and R, at the wiring resistance r = 0, R MSR is replaced with two known fixed values R MSR, F and R MSR, B and each input voltage V
Obtain O, F and V O, B. Then, the following equation is obtained from the equation (3).

【0014】〔数3〕 RMSR,F =〔VO,F ×R/(ER −VO,F )………………………(4−1) RMSR,B =〔VO,B ×R/(ER −VO,B )………………………(4−2) ここで、RMSR およびVO の添字FおよびBはフルスケ
ールレンジおよびベーススケールレンジを表す。
[Equation 3] R MSR, F = [V O, F × R / (E R −V O, F )... (4-1) R MSR, B = [V O, B × R / (E R -V O, B) ........................... (4-2) where the subscript F and B R MSR and V O is the full-scale range and the base scale range Represents

【0015】この(4−1),(4−2)の2式より、
電圧源ER と抵抗Rの値を求めると、次式のようにな
る。 〔数4〕 R=K×RMSR,F ………………(5) ER =(1+K)×VO,F ………………(6) 但し K= (VO,F −VO,B )/〔(RMSR,F ×VO,B /RMSR,B ) −VO,F 〕 ……(7) 従って(5)〜(7)を(3)式に導入することで、次
式(8)が得られる。
From the two equations (4-1) and (4-2),
When the values of the voltage source E R and the resistance R are obtained, the following expression is obtained. [Equation 4] R = K × R MSR, F (5) E R = (1 + K) × V O, F (6) where K = (V O, F − V O, B ) / [(R MSR, F × V O, B / R MSR, B ) −V O, F ] (7) Therefore, (5) to (7) are introduced into the equation (3). Thus, the following equation (8) is obtained.

【0016】〔数5〕 RMSR =〔V+ −(VO −V+ )〕×RMSR,F /〔VO,F + (VO,F −VO )/K〕 ………………(8) このようにして予めの調整段階で前述のように配線抵抗
r=0の状態で抵抗センサを固定値RMSR,F およびR
MSR,B に置換えてこのときの信号変換器への入力電圧V
O,F およびVO,B を計測してK((7)式)を計算し、
このRMSR,F 、V O,F 、Kの値をCPU1のメモリに保
持して置き、実際の温度計測時には、そのとき計測した
入力電圧VO およびV+ から式(8)をCPU1に実行
させることにより配線抵抗の影響なしに正確にセンサ抵
抗値RMSR を計測することができる。
[Equation 5] RMSR= [V+− (VO-V+)] × RMSR, F / [VO, F+ (VO, F-VO) / K] (8) In this way, the wiring resistance is determined as described above in the pre-adjustment stage.
The resistance value of the resistance sensor is fixed at r = 0.MSR, FAnd R
MSR, BTo the input voltage V to the signal converter at this time.
O, FAnd VO, BAnd calculate K (Equation (7)),
This RMSR, F, V O, F, K in the memory of the CPU 1.
At the time of actual temperature measurement
Input voltage VOAnd V+Executes equation (8) for CPU1 from
Sensor resistance accurately without the influence of wiring resistance.
Resistance value RMSRCan be measured.

【0017】[0017]

【発明の効果】本発明によれば所定の電圧源から所定の
直列抵抗を介して抵抗センサに通電し、抵抗センサの2
本分の配線抵抗を含む電圧VO と、同じく抵抗センサの
1本分の配線抵抗を含む電圧V+ との2つの電圧測定デ
ータと、予め調整段階で求めた演算パラメータを用いて
抵抗センサの配線抵抗を含まぬ抵抗値を演算出力させる
ようにしたので、正確な計測を可能とすると共に、安価
を信号変換器を提供できる利点が得られる。
According to the present invention, a current is supplied to the resistance sensor from a predetermined voltage source through a predetermined series resistor, and
The voltage V O including the wiring resistance of the current sensor and the voltage V + including the wiring resistance of one of the resistance sensors are also used. Since the resistance value that does not include the wiring resistance is calculated and output, there is obtained an advantage that accurate measurement can be performed and a low-cost signal converter can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の1実施例としての構成を示す回路図FIG. 1 is a circuit diagram showing a configuration as one embodiment of the present invention.

【図2】図1に対応する従来の回路図FIG. 2 is a conventional circuit diagram corresponding to FIG.

【図3】図2の計算手順の説明図FIG. 3 is an explanatory diagram of a calculation procedure in FIG. 2;

【符号の説明】[Explanation of symbols]

1 CPU 2 A/D変換回路 3 演算パラメータ RMSR 抵抗センサ R 固定抵抗 R1 固定抵抗 R2 固定抵抗 C コンデンサ SW1(SW1−1〜SW1−3) スイッチ SW2(SW2−1〜SW2−3) スイッチ AMP1 演算増幅器 AMP2 演算増幅器 AMP3 演算増幅器 ER 直流電圧源1 CPU 2 A / D conversion circuit 3 Operation parameter R MSR resistance sensor R Fixed resistance R 1 Fixed resistance R 2 Fixed resistance C Capacitor SW1 (SW1-1 to SW1-3) Switch SW2 (SW2-1 to SW2-3) Switch A MP1 operational amplifier A MP2 operational amplifier A MP3 operational amplifier E R DC voltage source

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】A/D変換手段と、このA/D変換手段を
制御すると共にそのA/D変換出力データを読込むCP
Uとを持ち、抵抗センサの抵抗値を計測してその温度な
どを求める信号変換器であって、 第1および第2の配線の夫々の一方の端末を前記抵抗セ
ンサの一方の端子に接続し、この第1の配線と等しい抵
抗値を持つ第3の配線の一方の端末を前記抵抗センサの
他方の端子に接続し、 所定の直流電圧を所定の直列抵抗を介して前記第1およ
び第3の配線の他方の端末間に印加してなる信号変換器
において、 前記CPUによって制御され、前記第1および第3の配
線の他方の端末間の電圧(以下第1の計測電圧という)
を前記A/D変換手段に切換え入力する手段と、 同じく前記CPUによって制御され、前記第2および第
3の配線の他方の端末間の電圧(以下第2の計測電圧と
いう)を前記A/D変換手段に切換え入力する手段とを
備え、 前記CPUは前記第1および第2の計測電圧の前記A/
D変換手段による変換出力データと、予め行われた計測
に基づいて保持する所定の演算パラメータとを用いて前
記抵抗センサのみの抵抗値を演算出力することを特徴と
する信号変換器。
An A / D converter and a CP for controlling the A / D converter and reading the A / D conversion output data.
U and a signal converter for measuring the resistance value of the resistance sensor and obtaining its temperature and the like, wherein one terminal of each of the first and second wirings is connected to one terminal of the resistance sensor. One end of a third wiring having a resistance value equal to that of the first wiring is connected to the other terminal of the resistance sensor, and a predetermined DC voltage is applied to the first and third terminals via a predetermined series resistance. A signal converter applied between the other terminals of the first wiring and a voltage between the other terminals of the first and third wirings (hereinafter referred to as a first measured voltage)
Means for switching and inputting to the A / D conversion means, and a voltage between the other terminals of the second and third wirings (hereinafter referred to as a second measured voltage) which is also controlled by the CPU. Means for switching and inputting to the conversion means, wherein the CPU outputs the A / A of the first and second measured voltages.
A signal converter for calculating and outputting a resistance value of only the resistance sensor using conversion output data by a D conversion unit and a predetermined calculation parameter held based on a measurement performed in advance.
【請求項2】請求項1に記載の信号変換器において、前
記演算パラメータは前記第1および第3の配線の持つ抵
抗値を無視し得る状態とし、前記抵抗センサを既知の異
なる値を持つ2つの抵抗に夫々置換えたときの前記第1
または第2の計測電圧の前記A/D変換出力データを用
いて定められたものであることを特徴とする信号変換
器。
2. The signal converter according to claim 1, wherein the operation parameters are such that the resistance values of the first and third wirings can be ignored, and the resistance sensor has a known different value. The first when each of the resistors
Alternatively, the signal converter is determined using the A / D conversion output data of the second measurement voltage.
JP04328311A 1992-12-09 1992-12-09 Signal converter Expired - Fee Related JP3129005B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04328311A JP3129005B2 (en) 1992-12-09 1992-12-09 Signal converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04328311A JP3129005B2 (en) 1992-12-09 1992-12-09 Signal converter

Publications (2)

Publication Number Publication Date
JPH06174559A JPH06174559A (en) 1994-06-24
JP3129005B2 true JP3129005B2 (en) 2001-01-29

Family

ID=18208822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04328311A Expired - Fee Related JP3129005B2 (en) 1992-12-09 1992-12-09 Signal converter

Country Status (1)

Country Link
JP (1) JP3129005B2 (en)

Also Published As

Publication number Publication date
JPH06174559A (en) 1994-06-24

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