JP3126445B2 - keyboard - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a keyboard for transmitting a key code when detecting the start and end of pressing of a key.

[0002]

2. Description of the Related Art Conventionally, a keyboard transmits a key code to a CPU such as a personal computer or a word processor every time a predetermined repeat time elapses when a key is kept pressed.

[0003]

However, in the above conventional example, since the keyboard manages the repeat time, in order to change the repeat time, hardware for setting the repeat time is provided on the keyboard, or the CPU is connected to the keyboard. It is necessary to provide a receiving circuit for designating the repeat time, and there is a disadvantage that the cost increases.

In order to solve this problem, a method is considered in which the keyboard does not repeat, and the CPU repeats. However, in this case, the code for detecting the end of key press cannot be correctly received due to noise or the like. In such a case, there is a problem that the CPU cannot know the end of the key press and repeats the key indefinitely.

[0005]

In order to solve the above-mentioned problems, according to the present invention, a keyboard has a plurality of keys, a detecting means for detecting the start and end of pressing of each of the plurality of keys, and an apparatus. A key code corresponding to a key whose start or end of pressing is detected by the detecting means is transmitted to the main body, and it is detected by the detecting means that all of the plurality of keys are in a non-pressed state. Sending means for sending a code indicating the state.

[0006]

The start and end of pressing are detected for each of a plurality of keys on a keyboard, and a key code corresponding to the key for which the start or end of pressing is detected is transmitted to the apparatus main body. When it is detected that all the keys are in the non-pressed state, a code indicating the state is transmitted.

[0007]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a basic configuration of an embodiment of the present invention.
A is a key which is pressed by a keyboard operator. Reference numeral B denotes a key press detection unit that detects the start and end of press of the key A, outputs a key code, and outputs a signal indicating that all the keys are not pressed when they are not pressed. C is a key-no-press detecting means. When the key-press detecting means outputs a signal indicating that all keys are not pressed, a key-no-press code is output. D is a transmitting means for transmitting the key code output by the key press detecting means B and the key no press code output by the key no press detecting means C.

FIG. 2 shows the overall structure of a keyboard according to one embodiment of the present invention. In the figure, reference numeral 1 denotes a key matrix, which is composed of 16 rows and 8 columns as shown in FIG.
A decoder 2 selects one of the rows of the key matrix 1. Reference numeral 3 denotes a one-chip CPU having an input port 4, an output port 5, a RAM 6, a ROM 7, a CPU
It includes a core 8, a serial port 9, and a timer unit 12.

Reference numeral 5 denotes an output port from which the decoder 2 outputs a 4-bit row selection signal. 6 is an input port,
The key press information of one row of the key matrix 1 selected by the decoder 2 is input. 6 is a RAM,
Stores information required for keyboard operations. 7 is ROM
And the control procedure shown in FIGS. 5 to 8 is stored. 8 is C
It is a PU core and controls the keyboard.

Reference numeral 9 denotes a serial port, and a TXD signal 1
After step 1, the key code is transmitted by start-stop synchronous serial transfer. If the RDY signal 10 is off, the CPU is not ready to receive, so no transmission is performed. When transmission is possible and transmission data is not set, an interrupt signal is output to the CPU core 8.

Reference numeral 10 denotes an RDY signal output from the CPU, which indicates that the CPU is ready for reception. 11
Is a TXD signal output by the keyboard, and transmits a key code to the CPU.

Reference numeral 12 denotes a timer, which is used for setting a timing required for controlling the keyboard.

FIG. 3 is a detailed explanatory diagram of the key matrix 1. The decoder 2 decodes the signal output from the output port 5, and only one of the 16 output signals has a low potential.
All the remaining output signals are in a high impedance state. If the key contact 3 of the row having the low potential is pressed, the low potential is input to the corresponding bit of the input port 4. If the key contact 13 is not depressed, it is pulled up by the resistor 15, so that a high potential is input to the bit corresponding to the input port 4. Therefore, by inverting the data input to the input port 4, data of a bit of the selected row where a key is pressed is 1 and data of a bit where the key is not pressed is 0 is obtained.

FIG. 4 is a detailed explanatory diagram of the RAM 6. O
NKEY 16 stores the number of pressed keys. S
The TIME 17 is a software timer that stores a time until a code to be transmitted when all keys are not pressed is transmitted in units of 10 ms.

BUF 18 is a buffer for storing transmission data, and is a 16-byte array consisting of BUF (0) to BUF (15). The BUF 18 is used as a first-in first-out (FIFO) ring memory,
The number of data is stored in CTR19, the storage position is stored in I20, and the extraction position is stored in J21.

LL22 and CL23 are respectively LL (0)
~ LL (15), 1 consisting of CL (0) ~ CL (15)
In a 6-byte array, one bit corresponds to one key state. LL22 stores the state of the previous key press, CL2
Numeral 3 stores the current key pressed state.

L24, B25 and X26 are used as workpieces in the key reading process shown in FIG. L24 stores a row number, B25 stores a bit number, and X26 stores a change in a key pressed state.

The initial values of these RAM areas are all zero.

FIG. 5 is a flowchart showing the entire processing of the keyboard.

After turning on the power, the timer 12 is set to 10 ms in step S1, and a key reading process is performed in step S2. The details of this process are shown in FIG. Next, the process proceeds to step S3, where the number of pressed keys O set in step S2 is O.
Check the contents of NKEY16. If it is not 0, there is a key that has been pressed.
Clear 17 If it is 0, there is no key pressed, and the contents of the TIME 17 are checked in step S4. Since STIME 17 is initially 0, 10 is set in STIME 17, that is, 100 mS in step S 9. After the second time, the value is not 0, and the process proceeds to step S5 and STI
Subtract 1 from ME17. Next, in step S6, the result is determined. If STIME17 is 0, 100 ms has elapsed, and code transmission is performed.

First, at step S7, the transmission data number CT
Check R19. If this is not 16, there is a free space in the transmission buffer BUF18.
A special code FFH indicating that all keys are not pressed is transmitted, and 1 is sent to TIME 17 in step S9.
0, that is, 100 mS is set. This state is step S
Since the state is the same as when 9 is initially set to 9, the operation is repeated while all keys are not pressed, and as a result, FFH is transmitted every 100 mS.

In step S7, CTR 19 is set to 16
In this case, the transmission cannot be performed because there is no free space in the transmission buffer BUF18. In this case, step S1
At 1, 1 is added to STIME 17. Since this state is the same as the state before subtracting 1 from the STIME 17 in step S5, the same processing is performed again next time, and if there is free space in the transmission buffer BUF18, FFH is transmitted.

In any case, the process finally proceeds to step S10, waits until the time-out of the timer 12, that is, 10 ms has elapsed after the timer setting, and returns to step S1. Therefore, these processes are repeated every 10 ms.

FIG. 6 is a flowchart showing the details of the transmission process in step S9 in FIG. 5 and step S43 in FIG. In the transmission processing, the transmission data is simply stored in the transmission buffer, and the actual serial transmission is performed by the transmission interrupt processing shown in FIG.

First, in step S13, the transmission buffer BU
It is stored at the position indicated by I20 in F18. Next, 1 is added to I20 in step S14. If the result is 16, the process proceeds from step S15 to step S16, where B
I20 is set to 0 to indicate the head of the UF18. In any case, the process proceeds to step S17, where the transmission data number CT
After adding 1 to R19 and permitting serial transmission in step S18, the process ends.

FIG. 7 is a flowchart showing a transmission interrupt process which operates asynchronously with the processes shown in FIGS. 5, 6, and 8. When transmission is permitted in step S18 in FIG. 6, a transmission interrupt occurs because the transmission data is not set in the serial port 9.

First, in step S19, the transmission data number CT
Check R19. If it is not 0, there is transmission data, so in step S20 the transmission buffer BUF2
The transmission data is extracted from the position indicated by J21 of 0 and set to the serial port 9 to start serial transmission. Next, in step S21, 1 is added to J21.
If the result is 16, the process proceeds from step S22 to step S23, where J2 is set to indicate the head of BUF18.
Set 1 to 0. In either case, the process proceeds to step S24, where 1 is subtracted from the number of superstitious data CTR19, and then the process ends.

At the end of serial transmission, a transmission interrupt occurs again. At this time, if the superstitious data exists, the above-described process is performed. If the superstitious data does not exist, the process proceeds from step S19 to step S25, where the serial transmission is prohibited and the process ends.

FIG. 8 is a flowchart showing details of the key reading process in step S2 of FIG. First, step S
At 26, 0 is set to the row number L24. Next, a row is selected by outputting the contents of L24 to the output port 5 in step S27. Next, in step S28, key data is input from the input port 4 and inverted to match the logical state, and then stored at the position indicated by L24 in the CL 23. Next, 1 is added to L24 in step S29.
The above processing is repeated 16 times, and when the input of all the rows is completed, the process proceeds from step S30 to step S31, and L24
Is set to 0 again.

Next, in step S32, LL22 and C
The exclusive OR of the rows indicated by L24 in L23 is calculated,
Store in X26. Since the previous key pressed state is stored in LL22 and the current key pressed state is stored in CL23, the change of the key pressed state is stored in exclusive OR X26 thereof. If this is 0, there is no change in the key pressed state, so the process proceeds from step S33 to step S34. If X26 is not 0, step S33
Then, the process proceeds to step S36, where the bit number B25 is set to 0. Next, in step S37, the CTR 19 is checked. If CTR 19 is not 16, transmission buffer B
Since there is a space in the UF 18, the process proceeds to step S38.
If the bit indicated by B25 of X26 is off, the state of the key corresponding to that bit has not changed, and the process proceeds to step S44. If it is on, in step S39, the line number L24 and the bit number B25 are converted into a key code to be transmitted. Here, the key code ranges from 0 to 7EH. If the bit indicated by B25 in the row indicated by L24 in the CL23 is ON, it means that the key has been newly pressed, so the process proceeds from step S40 to step S41, and LL2
By setting the bit indicated by B25 in the row indicated by L24 in 3, the previous key pressed state is updated to match the current key pressed state. Next, in step S42,
One is added to the number of pressed keys ONKEY16.

If the bit indicated by B25 in the line indicated by L24 in the CL23 is off, the depression of the key has been released, and the process proceeds from step S40 to step S46. By resetting the bit indicated by B25, the previous key pressed state is updated to match the current key pressed state. Next, in step S47, 1 is subtracted from the number of pressed keys ONKEY16.
Next, in step S48, bit 7 of the key code obtained in step S39 is set to indicate key-off.

In any case, the process proceeds to step S43, where the key code is transmitted, and in step S44, 1 is stored in B25.
Add. Next, proceeding to step S45, if B25 is not 8, the processing of all bits has not been completed, so the processing returns to step S37, and the above processing is repeated. When the processing of all bits is completed, the process proceeds to step S34.

In step S34, 1 is added to L24. Next, the process proceeds to step S35, and if L24 is not 16, processing of all rows has not been completed, so step S3
2 and the above processing is repeated. When the processing for all the rows is completed, the key reading processing is completed.

If the CTR 19 is 16 in step S37, there is no space in the transmission buffer BUF18.
Since the key code cannot be transmitted, the key reading process ends. In this case, the previous key pressed state LL22
Is not updated, the transmission of the key code is postponed until the key reading process is performed again after 10 ms.

(Other Embodiments) In the above embodiment,
In the process of key press detection processing, the number of pressed keys ONKE
The value of Y16 is increased or decreased, and it is detected that all the keys are not depressed when ONKEY16 is 0. Alternatively, it may be detected by the following means.

(1) It is detected that all keys are not pressed by referring to any of the previous key pressed state LL22, the current key pressed state CL23, or the key data input from the input port 4.

(2) In the process of the key press detection process, no process relating to the detection that all the keys are not pressed is not performed. In the process of the key no-press detection process, the previous key press state LL22 or the current key press state is detected. Key pressed state CL
23, it is detected that all keys are not pressed.

[0039]

As described above, the keyboard according to the present invention detects the start and end of pressing of each of a plurality of keys, and notifies the apparatus body of the key whose start or end is detected. A corresponding key code is transmitted, and when it is detected that all of the plurality of keys are in the non-pressed state, a code indicating the state is transmitted. Even if the CPU of the device main unit that repeats the key until the key is not received correctly due to noise or the like, a code indicating that all keys are not pressed is transmitted. This code can stop the key repeat and avoid the serious obstacle of infinite key repeat.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a basic configuration of an embodiment.

FIG. 2 is a block diagram showing the overall circuit configuration of the embodiment.

FIG. 3 is a detailed explanatory diagram of the key matrix 1;

FIG. 4 is a detailed explanatory diagram of a RAM 6;

FIG. 5 is a flowchart showing the overall processing of the embodiment.

FIG. 6 is a flowchart illustrating details of a transmission process.

FIG. 7 is a flowchart illustrating details of a transmission interruption process.

FIG. 8 is a flowchart illustrating details of a key reading process.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Key matrix 2 Decoder 3 1-chip microprocessor 4 Input port 5 Output port 6 Writable memory (RAM) 7 Read-only memory (ROM) 8 CPU core 9 Serial port 10 Ready signal (RDY) 11 Transmission signal (TXD) 12 Timer 13 Key contact 14 Resistor 16 Number of pressed keys (ONKEY) 17 Software timer (STIME) 18 Transmission buffer (BUF) 19 Number of transmission data (CTR) 20 Transmission buffer storage position (I) 21 Transmission buffer extraction position (J) 22 Previous key pressed state (LL) 23 Current key pressed state (CL) 24 Line number (L) 25 Bit number (B) 26 Change in key pressed state (X)

Claims (2)

(57) [Claims] 1. A plurality of keys, detecting means for detecting the start and end of pressing of each of the plurality of keys, and a key whose start or end is detected by the detecting means for an apparatus main body. And sending means for sending a code indicating the state when the detecting means detects that all of the plurality of keys are in the non-pressed state. Characteristic keyboard. 2. The apparatus according to claim 1, wherein said detecting means includes a storing means for storing a total number of keys in a pressed state, and increases or decreases the total number of keys stored in said storing means when the start and end of pressing of each key are detected. 2. The keyboard according to claim 1, wherein when the total number is 0, it is detected that all of the plurality of keys are in a non-pressed state.