JP3121734B2 - Semiconductor device and metal ball for semiconductor device bump - Google Patents
Semiconductor device and metal ball for semiconductor device bumpInfo
- Publication number
- JP3121734B2 JP3121734B2 JP30996794A JP30996794A JP3121734B2 JP 3121734 B2 JP3121734 B2 JP 3121734B2 JP 30996794 A JP30996794 A JP 30996794A JP 30996794 A JP30996794 A JP 30996794A JP 3121734 B2 JP3121734 B2 JP 3121734B2
- Authority
- JP
- Japan
- Prior art keywords
- bump
- electrode
- platinum
- semiconductor device
- ball
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Description
【０００１】[0001]
【産業上の利用分野】この発明は、所謂バンプを用い
て、半導体回路チップを基板もしくはリード電極に接続
することにより実装されるようにした半導体装置に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounted by connecting a semiconductor circuit chip to a substrate or a lead electrode using so-called bumps.
【０００２】[0002]
【従来の技術】近年、電子機器の小型・軽量化及び薄型
化に伴い、集積回路化した半導体チップの実装におい
て、薄型で高密度のものが要求されてきている。これら
の半導体チップを実装する技術としては、ワイヤボンデ
ィング、ＴＡＢのフィルムキャリア、フリップチップ等
が実用化されている。このうちフリップチップ方式で
は、半導体チップの電極上にバンプを固着し、この面を
プリント基板やガラス基板に対向させて、バンプと基板
電極とを半田等の低融点金属によって接続する。またＴ
ＡＢ方式では、リード先端が錫メッキされたＴＡＢテー
プにバンプを介してチップを接続するが、これらの方式
は、高密度化が要求される実装において多用されてい
る。2. Description of the Related Art In recent years, as electronic devices have become smaller, lighter and thinner, there has been a demand for thinner and higher-density semiconductor chips mounted on integrated circuits. As a technique for mounting these semiconductor chips, wire bonding, TAB film carriers, flip chips, and the like have been put to practical use. Among them, in the flip chip method, a bump is fixed on an electrode of a semiconductor chip, this surface is opposed to a printed board or a glass substrate, and the bump and the board electrode are connected by a low melting point metal such as solder. Also T
In the AB system, a chip is connected via a bump to a TAB tape whose lead end is tin-plated, but these systems are frequently used in mounting that requires high density.
【０００３】図１は、バンプ用金ワイヤを用いたフリッ
プチップ法による半導体チップの実装例を示している。
図１（ａ）において、半導体チップ１０のアルミニウム
電極１１上に、金ワイヤ１２の先端にて放電による溶融
により形成したボール１３が熱圧着もしくは超音波を併
用した熱圧着により接合される。更に、ボール１３の直
上部でワイヤ１２を切断して、図１（ｂ）に示すように
金バンプ１４を電極１１上に形成する。FIG. 1 shows an example of mounting a semiconductor chip by a flip chip method using gold wires for bumps.
In FIG. 1A, a ball 13 formed by melting by discharge at the tip of a gold wire 12 is bonded to an aluminum electrode 11 of a semiconductor chip 10 by thermocompression bonding or thermocompression using ultrasonic waves. Further, the wire 12 is cut immediately above the ball 13 to form a gold bump 14 on the electrode 11 as shown in FIG.
【０００４】次に、図１（ｃ）に示すようにプリント基
板等の基板１５上で銅により形成された配線パターンの
電極部１６に、スクリーン印刷法等により半田ペースト
層１７を形成する。図１（ｄ）に示すように半導体チッ
プ１０上に形成された金バンプ１４と基板１５の電極部
１６とを位置合わせしてマウントする。そして、図１
（ｅ）に示すようにリフロー半田付けにより、半導体チ
ップ１０と基板１５とが接続されるというものである。Next, as shown in FIG. 1C, a solder paste layer 17 is formed on the electrode portion 16 of the wiring pattern made of copper on a substrate 15 such as a printed board by a screen printing method or the like. As shown in FIG. 1D, the gold bumps 14 formed on the semiconductor chip 10 and the electrode portions 16 of the substrate 15 are aligned and mounted. And FIG.
As shown in (e), the semiconductor chip 10 and the substrate 15 are connected by reflow soldering.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、上述の
例のように実装される半導体装置において、特に金バン
プ１４のリフロー半田付け時や高温保管試験時に、該金
バンプ１４の金が所謂、半田くわれを起こし、接続不良
が生じるという問題があった。However, in the semiconductor device mounted as in the above-mentioned example, the gold of the gold bump 14 is so-called solder, especially during reflow soldering of the gold bump 14 or during a high-temperature storage test. There has been a problem that the connection is broken and a connection failure occurs.
【０００６】この発明はかかる実情に鑑み、半田くわれ
を有効に減少し得る半導体装置及び半導体装置用バンプ
等を提供するものである。The present invention has been made in view of the above circumstances, and provides a semiconductor device and a bump for a semiconductor device which can effectively reduce solder cracks.
【０００７】[0007]
【課題を解決するための手段】本発明による半導体装置
は、半導体チップ上に形成したアルミニウム電極もしく
はアルミニウム合金電極上に、純白金もしくは白金合金
から成るバンプが接続され、基板電極又はリード電極に
対して、錫もしくは錫鉛合金の低融点金属を介して、前
記バンプが接続されていることを特徴とする。According to the semiconductor device of the present invention, a bump made of pure platinum or a platinum alloy is connected to an aluminum electrode or an aluminum alloy electrode formed on a semiconductor chip, and a bump is formed on a substrate electrode or a lead electrode. The bump is connected via a low melting point metal such as tin or a tin-lead alloy.
【０００８】本発明の半導体装置において、前記アルミ
ニウム電極もしくはアルミニウム合金電極上に、チタ
ン，ニッケル，チタン−タングステン合金，クロム及び
銅等の少なくとも１種から成り、その膜厚が０．００１
ミクロン以上、１ミクロン以下の薄膜が形成され、この
薄膜上に前記バンプが形成される。In the semiconductor device according to the present invention, at least one of titanium, nickel, titanium-tungsten alloy, chromium, copper and the like is formed on the aluminum electrode or the aluminum alloy electrode, and the film thickness is 0.001.
A thin film of not less than 1 micron and not more than 1 micron is formed, and the bump is formed on the thin film.
【０００９】また、本発明の半導体装置バンプ用金属ボ
ールは、半導体チップ上に形成した電極に接続されるべ
き白金又は白金合金ボールであって、金属細線を一定寸
法に切断して、溶融することにより、その直径が１０ミ
クロン以上、５００ミクロン以下の球形に形成されたこ
とを特徴とする。The metal ball for a semiconductor device bump of the present invention is a platinum or platinum alloy ball to be connected to an electrode formed on a semiconductor chip. Thus, the diameter is formed in a spherical shape of 10 microns or more and 500 microns or less.
【００１０】[0010]
【００１１】[0011]
【００１２】[0012]
【作用】この発明は、半導体チップ上に形成したアルミ
ニウム電極もしくはアルミニウム合金電極上に、純白金
もしくは白金合金から成るバンプを接続すると共に、基
板電極もしくはＴＡＢにおけるリード電極に、錫もしく
は錫鉛合金等の低融点金属を介して該バンプを接続した
半導体装置を提供する。白金は、金と比較して融点が高
く、また、接合後や高温での動作試験中に接合部にて相
互拡散する。これにより錫，鉛との合金が形成されて
も、金の場合と比較して熱的に安定であり、接合信頼性
が高く、半田くわれの少ないバンプ接続構造を実現す
る。According to the present invention, a bump made of pure platinum or a platinum alloy is connected to an aluminum electrode or an aluminum alloy electrode formed on a semiconductor chip, and tin or a tin-lead alloy or the like is connected to a substrate electrode or a lead electrode in TAB. A semiconductor device in which the bumps are connected via the low melting point metal. Platinum has a higher melting point than gold, and interdiffuses at the joint after joining and during operation tests at high temperatures. As a result, even if an alloy of tin and lead is formed, a bump connection structure that is thermally stable compared to the case of gold, has high bonding reliability, and has little solder breakage is realized.
【００１３】バンプ金属として、白金以外の高融点金属
は、アルミニウム電極側への接合性が十分でなく、また
酸化傾向が強いものでも、接合が問題となる。アルミニ
ウム電極は、その表面が一般には酸化膜で覆われてい
る。従って、バンプを接続するためには、その酸化膜を
破壊して接続する必要があり、バンプの密着性や、バン
プとアルミニウム金属の相互拡散後の信頼性を高めるた
めには、半導体チップ上に形成したアルミニウム電極も
しくはアルミニウム合金電極上に、Ｔｉ，Ｎｉ，ＴｉＷ
合金，Ｃｒ，Ｃｕ等の１種または２種以上で成り、合計
厚みが０．００１μｍ以上、１μｍ以下の薄膜を形成
し、該薄膜上に純白金もしくは白金合金から成るバンプ
を接続することが有効である。As a bump metal, a high-melting-point metal other than platinum does not have sufficient bonding properties to the aluminum electrode side, and even if it has a strong tendency to oxidize, bonding poses a problem. The surface of the aluminum electrode is generally covered with an oxide film. Therefore, in order to connect the bump, it is necessary to break the oxide film to make the connection. In order to improve the adhesion of the bump and the reliability after the interdiffusion between the bump and the aluminum metal, it is necessary to connect the bump on the semiconductor chip. Ti, Ni, TiW on the formed aluminum electrode or aluminum alloy electrode
It is effective to form a thin film made of one or more of alloys, Cr, Cu, etc. and having a total thickness of 0.001 μm or more and 1 μm or less, and connect a bump made of pure platinum or a platinum alloy on the thin film. It is.
【００１４】薄膜が０．００１μｍ以下の厚みでは、ア
ルミニウム表面を均一に覆うことが困難で、薄膜形成の
効果が少なく、また、１μｍ以上の薄膜を形成しても、
効果はほぼ一定であり、コスト高となる。If the thickness of the thin film is less than 0.001 μm, it is difficult to uniformly cover the aluminum surface, the effect of forming the thin film is small, and even if a thin film of 1 μm or more is formed,
The effect is almost constant and the cost is high.
【００１５】バンプの接続方法としては、白金又は白金
合金から成り、直径が１０μｍ以上５０μｍ以下である
球形バンプを用い、チップの各電極に位置合わせし、配
列して接続することが好ましい。この接合は、熱圧着又
は超音波を併用して熱圧着する。直径１０μｍ以下で
は、接合時の変形量を十分にとれず、すべてのバンプを
安定して接続することが困難であり、また、５００μｍ
以上では、狭ピッチの要求に有効に対応することが困難
となる。As a method of connecting the bumps, it is preferable to use spherical bumps made of platinum or a platinum alloy and having a diameter of 10 μm or more and 50 μm or less, aligned with each electrode of the chip, arranged and connected. This bonding is performed by thermocompression bonding or thermocompression bonding together with ultrasonic waves. When the diameter is 10 μm or less, the deformation at the time of joining cannot be sufficiently obtained, and it is difficult to stably connect all the bumps.
Above, it is difficult to effectively respond to the demand for a narrow pitch.
【００１６】また、本発明のバンプ形成用の白金極細線
は、白金バンプの純度９５％以上が好ましい。白金純度
９５％未満では、硬度が高く、このため接合時にチップ
へのダメージを与える危険性が高まる。ボールの形成
は、極細線にした白金又は白金合金を一定寸法に切断
し、溶解させることにより、球形で精度の高いボールが
得られる。一定の球形を得るためには、極細線の線径が
細い程、一定寸法に切断する長さが長くなり、球形寸法
精度が高くなるが、通常の伸線では、直径１０μｍ未満
の伸線が困難であること、また取扱いが容易でなくな
る。また、７０μｍを超える径では、切断精度が悪く、
特に球形寸法精度の点で好ましくない。アルミニウム電
極側への接続は前述したようにボールを事前に形成し
て、配列接合する方法の他に、通常のワイヤボンディン
グ装置により、ボールボンディングを行って、バンプを
形成するスタッドバンプ方式を採用することもできる。The platinum ultrafine wire for forming a bump according to the present invention preferably has a purity of the platinum bump of 95% or more. If the platinum purity is less than 95%, the hardness is high, and the risk of damaging the chip during bonding increases. The ball is formed by cutting and melting platinum or platinum alloy which has been made into a fine wire into a certain size to obtain a spherical ball with high accuracy. In order to obtain a constant spherical shape, the smaller the diameter of the ultrafine wire, the longer the length of cutting into a certain dimension and the higher the spherical dimensional accuracy, but with normal wire drawing, wire drawing with a diameter of less than 10 μm is obtained. Difficult and difficult to handle. If the diameter exceeds 70 μm, the cutting accuracy is poor,
Particularly, it is not preferable in terms of spherical dimensional accuracy. The connection to the aluminum electrode side adopts a stud bump method in which a ball is formed by a normal wire bonding apparatus to form a bump, in addition to the method of forming balls in advance and arranging and joining as described above. You can also.
【００１７】本発明の白金極細線によれば、放電によっ
て真球度が高く、且つ表面に酸化膜のないボールを容易
に形成することができる。また、アルミニウム電極膜へ
の接合は、上述したように、表面の酸化膜を破壊して接
合することが必要であり、特に酸化膜厚が厚くて接合性
が劣化する場合には、白金を合金化して、ボール硬度を
上げる対策が有効である。金，パラジウム，インジウム
の５％以下の添加で、かなりの改善効果を得ることがで
きる。また、その添加量が５％を超えると、ボールが硬
くなると同時に、ボール形成性も不安定である。また他
の合金元素添加では、ボールの真球度が劣化してしまう
ため好ましくない。According to the ultrafine platinum wire of the present invention, a ball having a high sphericity and having no oxide film on the surface can be easily formed by electric discharge. As described above, bonding to an aluminum electrode film requires destruction of the oxide film on the surface and bonding. In particular, when the oxide film is thick and the bondability is deteriorated, platinum is alloyed. To increase the ball hardness is effective. A considerable improvement effect can be obtained by adding 5% or less of gold, palladium and indium. On the other hand, if the addition amount exceeds 5%, the ball becomes hard and the ball forming property is unstable. Further, the addition of other alloy elements is not preferable because the sphericity of the ball is deteriorated.
【００１８】このように本発明によれば、半田接合性が
良好で、熱的安定性が高く、しかも長期間高い信頼性を
保証し得る半導体実装が可能となる。本発明は半田接合
以外に、錫合金，鉛合金，錫−インジウム合金，鉛−イ
ンジウム合金等の低融点金属での接合にも応用できる。As described above, according to the present invention, it is possible to mount a semiconductor which has good solder jointability, high thermal stability, and can guarantee high reliability for a long time. The present invention can be applied to joining with a low melting point metal such as a tin alloy, a lead alloy, a tin-indium alloy, and a lead-indium alloy, in addition to the solder joining.
【００１９】[0019]
【実施例】次に、本発明の実施例を詳細に説明する。こ
の実施例において、図１で既に説明したようにボールボ
ンディング方式を採用して、白金バンプを形成するもの
とする。本実施例では、半導体チップ上に形成されてい
る電極上に白金ワイヤ（白金極細線）を用いて、ボール
ボンディング法によりバンプを形成すべきボールを接続
した。Next, embodiments of the present invention will be described in detail. In this embodiment, it is assumed that the platinum bump is formed by employing the ball bonding method as already described with reference to FIG. In this embodiment, a ball on which a bump is to be formed is connected by a ball bonding method using a platinum wire (a platinum fine wire) on an electrode formed on a semiconductor chip.
【００２０】この場合、ワイヤボンディング装置を用
い、キャピラリより白金（又は白金合金）の極細線を挿
通し、該キャピラリ先端から引き出した白金又は白金合
金の極細線の先端を、放電によって溶融することによ
り、ボール状に形成し、このボール状の極細線を、キャ
ピラリによってチップ電極上に熱圧着させ、ボール状の
直上部にて極細線を切断し、チップ電極に対してバンプ
が形成・接続される。In this case, a fine wire of platinum (or platinum alloy) is inserted through the capillary by using a wire bonding apparatus, and the tip of the fine wire of platinum or platinum alloy drawn out from the tip of the capillary is melted by electric discharge. , Formed into a ball shape, and the ball-shaped ultrafine wire is thermocompression-bonded to the chip electrode by a capillary, and the ultrafine wire is cut immediately above the ball shape, and a bump is formed and connected to the chip electrode. .
【００２１】更に、プリント基板等の基板上に形成され
ている配線薄膜と接続され且つチップ電極に対向して形
成された電極部に対して、スクリーン印刷法によって半
田ペースト層を形成しする。半導体チップ上の白金バン
プと基板電極部と位置合わせして固定し、リフロー半田
付けによって両者の接続を行った。Further, a solder paste layer is formed by a screen printing method on an electrode portion connected to a wiring thin film formed on a substrate such as a printed circuit board and opposed to the chip electrode. The platinum bump on the semiconductor chip and the substrate electrode portion were aligned and fixed, and the two were connected by reflow soldering.
【００２２】[0022]
【表１】 [Table 1]
【００２３】表１において、本実施例で使用した白金ワ
イヤの線径，成分及びボールの直径が示されている。接
合評価は、バンプ接合後の接合強度（シェア強度）が２
０ｇ以下のもの又は、チップにクラッチを生じたものを
不良（×印）とした。また半田接合後、信頼性の試験で
は、１２５℃で５０時間加熱の後、接合部の電気抵抗が
１０Ω以上上昇したものを不良（×）とした。なお、表
１において、Ｎｏ．１〜１０は、上述のワイヤボンディ
ング方式によるものであり、そのうちＮｏ．９及び１０
はこれに対する比較例を示している。また、この比較例
（Ｎｏ．１０）において、金ワイヤも使用した。Table 1 shows the diameters, components, and ball diameters of the platinum wires used in this embodiment. The bonding evaluation was that the bonding strength (shear strength) after bump bonding was 2
Those having 0 g or less, or those having a clutch on the chip were determined to be defective (marked x). In the reliability test after the solder bonding, a sample in which the electrical resistance of the bonded portion increased by 10Ω or more after heating at 125 ° C. for 50 hours was determined to be defective (×). In Table 1, No. Nos. 1 to 10 are based on the above-described wire bonding method. 9 and 10
Shows a comparative example for this. In this comparative example (No. 10), a gold wire was also used.
【００２４】また、この実施例では、ボール配列方式で
もバンプ形成を行った（Ｎｏ．１１〜１４）。この場
合、直径２５μｍのを白金ワイヤを用いて、これを事前
に切断し、その切断片を２０００℃に加熱された炉中に
て落下溶解させることによりボールを形成した。そし
て、そのボールをチップ電極上に配列接合し、上記と同
様の評価を行った結果も示す。なお、Ｎｏ．１４は、こ
れに対する比較例を示している。In this embodiment, bump formation was also performed by the ball arrangement method (Nos. 11 to 14). In this case, a platinum wire having a diameter of 25 μm was cut in advance using a platinum wire, and the cut piece was dropped and melted in a furnace heated to 2000 ° C. to form a ball. Then, the balls were arranged and joined on the chip electrodes, and the results of the same evaluation as described above are also shown. In addition, No. 14 shows a comparative example for this.
【００２５】次に、更に別の実施例においては、高温で
の信頼性試験を目的として、半導体チップのアルミニウ
ム電極膜（膜厚１μｍ）上にＴｉＷの合金膜（Ｔｉ１０
％，Ｗ９０％）を５００Åに形成し、これに白金バンプ
を接続した。この場合、白金バンプは、事前にボール状
に形成して熱圧着で接合したものと（試料）、ワイヤ
ボンディング装置と白金ワイヤ（径３０μｍ）を用いて
ボールバンプを形成したもの（試料）の両方を作成し
た。Next, in still another embodiment, for the purpose of a reliability test at a high temperature, a TiW alloy film (Ti10) is formed on an aluminum electrode film (thickness: 1 μm) of a semiconductor chip.
%, W 90%) at 500 °, and a platinum bump was connected thereto. In this case, the platinum bump is formed into a ball shape in advance and bonded by thermocompression bonding (sample), and the ball bump is formed using a wire bonding apparatus and a platinum wire (diameter 30 μm) (sample). It was created.
【００２６】バンプの接合性を向上させるために、事前
にＴｉＷ膜上にＡｕ膜２０００Åを形成したものをチッ
プ電極として用いた。ボールはいずれも径７５μｍと
し、接合後の圧着径は平均で９０μｍであった。比較の
ために、Ａｌ上に直接白金ボールを接合したものも作成
した（試料）。そして基板と半田接続し、加熱試験を
行なった。In order to improve the bondability of the bump, a TiW film in which an Au film 2000 Å was formed in advance was used as a chip electrode. Each ball had a diameter of 75 μm, and the bonded diameter after bonding was 90 μm on average. For comparison, a sample in which a platinum ball was directly joined to Al was also prepared (sample). Then, it was solder-connected to the substrate, and a heating test was performed.
【００２７】この場合、半田の量は、ボールの体積とほ
ぼ同等とした。また、加熱試験温度は、２２０℃とし、
各試料とも１０Ω以上の電気抵抗の上昇が生じた時間
（限界時間）を調査した。この限界時間は、試料では
６５０時間であり、試料では７００時間、そして試料
では１５０時間であった。この結果、ＴｉＷ合金薄膜
の形成は、高温での長期信頼性に優れた特性を示すこと
が明らかとなった。In this case, the amount of solder was substantially equal to the volume of the ball. The heating test temperature was 220 ° C.
For each sample, the time (limit time) at which the electrical resistance increased by 10Ω or more was examined. This time limit was 650 hours for the sample, 700 hours for the sample, and 150 hours for the sample. As a result, it has been clarified that the formation of the TiW alloy thin film exhibits excellent long-term reliability at high temperatures.
【００２８】[0028]
【発明の効果】以上説明したように本発明によれば、バ
ンプにおける半田くわれを有効に防止することにより、
半田くわれの少ないバンプ接続構造を実現し、半導体の
実装において高い信頼性を保証することができる等の利
点を有している。As described above, according to the present invention, by effectively preventing solder cracks at bumps,
It has advantages such as realizing a bump connection structure with few solder cracks and ensuring high reliability in semiconductor mounting.
【図１】バンプ用金ワイヤを用いたフリップチップ法に
よる半導体チップの実装例を示す図である。FIG. 1 is a diagram showing a mounting example of a semiconductor chip by a flip chip method using a gold wire for a bump.
１０ 半導体チップ １１ アルミニウム電極 １２ 金ワイヤ １３ ボール １４ 金バンプ １５ 基板 １６ 電極部 DESCRIPTION OF SYMBOLS 10 Semiconductor chip 11 Aluminum electrode 12 Gold wire 13 Ball 14 Gold bump 15 Substrate 16 Electrode part
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 21/60 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 21/60
Claims (3)
電極もしくはアルミニウム合金電極上に、純白金もしく
は白金合金から成るバンプが接続され、基板電極又はリ
ード電極に対して、錫もしくは錫鉛合金の低融点金属を
介して、前記バンプが接続されていることを特徴とする
半導体装置。1. A bump made of pure platinum or a platinum alloy is connected to an aluminum electrode or an aluminum alloy electrode formed on a semiconductor chip, and a low melting point metal of tin or a tin-lead alloy is applied to a substrate electrode or a lead electrode. A semiconductor device, wherein the bump is connected to the semiconductor device via a semiconductor device.
ウム合金電極上に、チタン、ニッケル、チタン−タング
ステン合金、クロム及び銅の少なくとも一種から成り、
その膜厚が０．００１ミクロン以上、１ミクロン以下の
薄膜が形成され、この薄膜上に前記バンプが形成される
ことを特徴とする請求項１に記載の半導体装置。2. An aluminum electrode or an aluminum alloy electrode comprising at least one of titanium, nickel, titanium-tungsten alloy, chromium and copper,
2. The semiconductor device according to claim 1, wherein a thin film having a thickness of 0.001 μm or more and 1 μm or less is formed, and the bump is formed on the thin film.
れるべき白金又は白金合金ボールであって、 金属細線を一定寸法に切断して、溶融することにより、
その直径が１０ミクロン以上、５００ミクロン以下の球
形に形成されたことを特徴とする半導体装置バンプ用金
属ボール。3. A platinum or platinum alloy ball to be connected to an electrode formed on a semiconductor chip, wherein the metal thin wire is cut into a certain size and melted,
A metal ball for a semiconductor device bump, wherein the ball has a diameter of 10 microns or more and 500 microns or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30996794A JP3121734B2 (en) | 1994-11-18 | 1994-11-18 | Semiconductor device and metal ball for semiconductor device bump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30996794A JP3121734B2 (en) | 1994-11-18 | 1994-11-18 | Semiconductor device and metal ball for semiconductor device bump |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08148496A JPH08148496A (en) | 1996-06-07 |
| JP3121734B2 true JP3121734B2 (en) | 2001-01-09 |
Family
ID=17999528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30996794A Expired - Fee Related JP3121734B2 (en) | 1994-11-18 | 1994-11-18 | Semiconductor device and metal ball for semiconductor device bump |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3121734B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6342442B1 (en) * | 1998-11-20 | 2002-01-29 | Agere Systems Guardian Corp. | Kinetically controlled solder bonding |
| US7242099B2 (en) * | 2001-03-05 | 2007-07-10 | Megica Corporation | Chip package with multiple chips connected by bumps |
| US7215030B2 (en) | 2005-06-27 | 2007-05-08 | Advanced Micro Devices, Inc. | Lead-free semiconductor package |
| JP2008192833A (en) | 2007-02-05 | 2008-08-21 | Shinko Electric Ind Co Ltd | Manufacturing method of semiconductor device |
-
1994
- 1994-11-18 JP JP30996794A patent/JP3121734B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08148496A (en) | 1996-06-07 |
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